DE10118529C1 - Process for structuring a flat substrate made of glass-like material - Google Patents

Abstract

A method for structuring a surface substrate consisting of glass-like material is described. DOLLAR A The method according to the invention is characterized by the combination of the following method steps: DOLLAR A - providing a semiconductor surface substrate consisting of a semiconductor material, DOLLAR A - structuring at least one surface of the semiconductor surface substrate to obtain depressions on the surface, DOLLAR A - Connecting the surface of the semiconductor surface substrate with the glass-like surface substrate, wherein the structured surface of the semiconductor surface substrate is brought together with a surface of the glass-like surface substrate at least partially overlapping, DOLLAR A - annealing of the connected surface substrates, in such a way that at least partial areas of the glass-like surface flow into it Material in the recesses of the structured surface of the semiconductor surface substrate, DOLLAR A - material removal at least of the re-solidified glass-like surface substrate, such that the glass-like surface chensubstrat adopts a surface that is flush with the structured surface of the semiconductor surface substrate.

Description

The invention relates to a method for structuring a glass-like Material of existing flat substrate.

Glass or vitreous materials as a material in modern microelectronics or Compared to other materials, micromechanics in particular have plastics numerous advantages with regard to their comparable with semiconductor materials,  low coefficient of thermal expansion and also have a great mechanical as well as chemical stability, which makes these materials are of great importance in many technical areas.

However, the manufacture is particularly interesting from a technical point of view Products, especially micromechanical and microelectronic Components made of glass set very narrow limits, as far as the Microstructuring of glass only few suitable etching processes are available, so that so far only mechanical processes such as sawing, grinding, polishing, Cracks, ultrasound or sandblasting are used. That’s why Structuring options for glass severely restricted. With these conventional processing techniques, however, is a structuring of glass in the micro and in particular sub-micrometer range with the in the semiconductor Component technology required precision possible.

Because of these severely restricted structuring options Microstructure body in all z. Currently known methods made of plastic. So describes, for example, DE 43 07 869 A1 a method in the microstructure body molded from plastic or sintered materials using a mold insert become. The micro-structured mold insert is made of a solid body, made of metal, ceramic, glass, stone or single crystal material precision machining, additive or subtractive structuring manufactured. Then the mold insert is filled with flowable material, covered and after its solidification, the material is covered by the mold insert Cut. However, the microstructure body produced in this way also has the Disadvantage on that it is made of a material with a large thermal Expansion coefficient is made and compared to glass-like materials has lower mechanical and chemical stability.

WO 97/19027 A1 describes a basic substrate and a method for its production Manufacture explained, which has a trench structure in the biological Sample material is introduced. This is used to structure the basic substrate heated so that it can be easily deformed and when the required temperature a stamp unit made from a non-deformable  Material exists, applied to the base substrate. Then that will Base substrate cooled and the stamp unit removed. With this one The processes described can also be made of glass substrates Materials are deformed, the combination of any areas made of glass and silicon on one and the same carrier, depending on which properties are local are necessary, but can also not be achieved with this method.

If the technical limits in glass processing could be broken, so new areas of application could be opened up in which composite materials Silicon and glass play a major role. Such composite elements can take advantage of the complementary properties of both materials. To the For example, glass has a very low electrical and compared to silicon thermal conductivity, however, unlike silicon, is visible Wavelength range optically transparent.

In addition to silicon, glass or glass-like materials also play an important role the implementation of micromechanical components. Especially with regard to one Encapsulating the components at wafer level is glass as an electrically insulating Material often used. But also in this context one comes across the Microstructuring to the limits mentioned above.

With the previously known methods, it is not possible to create an intimate structure to produce a semiconductor, for example silicon and glass, the geometry of which is laterally in the Micro and sub-micro range can be dimensioned freely. However, this would be  desirable, so that on the same support any areas of glass and silicon can be combined and above all dimensioned, depending according to which properties are required locally.

The invention is based on the object of a method for structuring a glass-like material existing surface substrate to indicate that a Structuring of glass or glass-like materials, preferably in the form of a Flat substrates with structural dimensions in the micro and sub-micro range almost should be made arbitrarily. In particular, the material glass in the Microelectronics as well as micromechanics with regard to processing ability and Range of applications reach a level comparable to that of semiconductor materials. The aim of the method is to produce such a precise and cost-effective way structured structured glass-like substrates as well as allow. That too should Processes basically offer the possibility of semiconductor substrates and glass-like ones To bring surface materials into intimate contact with each other and in To structure the composite shape with one another in the desired manner.

The object underlying the invention is achieved in claim 1 specified. The subject of claim 21 is a with this method manufactured and structured glass-like sheet substrate. Furthermore preferred uses of the products that can be produced by the method specified. Subject of the subclaims and the description in particular with reference to the figures relate advantageously to the inventive concept further education features.

The method according to the invention is used in semiconductor processing use usual shaping processes. That's how molding processes are widely used in particular for single-crystal silicon in semiconductor technology and belong to the standard procedures. By combining Lithography processes with wet chemical isotropic as well as anisotropic  There are a large number of etching processes and various dry etching processes Possibilities for the production of almost any structured silicon surfaces Available. Due to the mass application in semiconductor technology, these are Process available at low cost.

In order to be able to use the structuring methods successfully used in semiconductor technology also on glass or glass-like materials, the method according to the invention below is used, which is composed in detail of the following method steps:
First, a semiconductor surface substrate consisting of a semiconductor material is provided, for example in the form of a silicon wafer, which is structured in a subsequent step using the known techniques. With conventional lithography processes, for example, digital or continuous structures are transferred into a photosensitive lacquer which is applied, for example, to a silicon substrate, preferably a single-crystalline silicon wafer. With the contact or projection exposure customary in the semiconductor industry, standard methods for the transmission of digital structures are available. With the help of gray-tone lithography, surfaces of almost any shape can be imaged. After exposure, the unexposed coating volume is removed in a developer bath. The topography of the lacquer is transferred into the silicon by etching processes. Both wet chemical etching processes (KOH processes) and, in particular, plasma etching processes (plasma etch, reactive ion etch (RIE)) are possible. With both processes, comparatively deep structures with structural dimensions in the submicron range can also be produced.

Now an intimate connection of the surface of the semiconductor surface substrate with a glass-like surface substrate, the structured surface of the semiconductor Flat substrate with a surface of the glass-like flat substrate at least partially overlapping. For a firm and intimate connection  Both surface substrates are particularly suitable for anodic bonding, so that one Hermetically sealed connection between the two surface substrates is created.

The technique of anodic bonding has been around since the late 1960s known in which two highly planar substrates, usually consisting of one Metal and an insulator substrate heated on a so-called "hot plate". in the The case described above is the semiconductor and the glassy Surface substrate joined together. In addition, there is a tension between the two Surface substrates of up to 1000 V are applied. The negative pole is on glass-like surface substrate, so that those present in the glass matrix migrate positive, mobile ions towards the cathode. The immovable, and thus Fixed oxygen ions form a negative on the border to the semiconductor Space charge region. For one thing, the resulting electrostatic force leads to one close contact of the two substrate surfaces. On the other hand, the strong electric fields at the interface between the semiconductor surface substrate, For example, a silicon wafer, and the glass triggered an electrochemical reaction in the course of which at the interface forms an oxide that forms both substrates connects with each other.

When anodic bonding of Si and glass is used as a glass-like surface substrate Borosilicate glass (Pyrex ™, Borofloat ™) used in the thermal Expansion coefficient is largely adapted to silicon. However, at this process the two disc-shaped materials as vertical Composite (single or multiple) stacked on top of each other.

The actual structure-transferring step now takes place from the pre-structured semiconductor flat substrate to the glass-like flat substrate, by means of a tempering process of the connected flat substrates. In a furnace process in which the glass-like material is heated to the plastic region above the glass temperature T _G , the glass material completely fills the structural openings or the depressions within the semiconductor surface substrate. After corresponding cooling of both intimately connected surface substrates, the thermal expansion behavior of which is comparable or even identical, as a result of which little or no thermal stress occurs, the glass-like surface substrate has the structure of the semiconductor surface substrate in the negative form.

Then the surface of the glass-like surface substrate except for the pre-structured semiconductor surface ground back and polished, e.g. B. by Chemical-mechanical polishing, so that after completion of this Processing step a composite surface substrate is obtained in the glass or glass-like material is shaped with structural dimensions that so far only Semiconductor materials and especially single crystal silicon were reserved.

In further advantageous processing steps, the back of the semiconductor Surface substrate processed by the excess semiconductor material, for example. Silicon is also removed by grinding and polishing. That leaves one Substrate left that is made of semiconductor material in certain areas and others the glassy material.

In addition, it is possible to add the semiconductor material in a further etching process remove, for example, very narrow holes or openings in the glass substrate to obtain. Other mechanical grinding and polishing processes can do so connect to open the openings precisely or corresponding Obtain opening contours.

Taking advantage of the flow properties of glass in the heated state can therefore Surface topography of a structured semiconductor surface substrate, e.g. in the form of a silicon master, can be transferred exactly into glass-like materials. This results in considerable advantages in production and in terms of Precision. The advantages of silicon technology (exact Shaping processes down to the sub-µm range, variety of Structuring options) and the good material properties of glass be combined.  

With sufficiently large structural heights in the original semiconductor surface substrate and complete impression in the glass-like surface substrate by a suitable Glass flow process, surfaces can be created that are completely by the reach through new composite substrate. Depending on the area distribution can be used in this way glass wafers with silicon bushings or silicon wafers be created with a glass window.

A particularly important aspect here is the very good thermal compatibility both materials, e.g. silicon and glass (borosilicate glasses such as Pyrex®, Tempax® or Borofloat glass). Because of the almost perfect match of the thermal expansion coefficient between silicon and Pyrexglas® can be to a certain extent produce a thermally homogeneous substrate. In particular kick therefore no effects due to thermally induced stress such as a tendency to crack or bend the substrates.

The thickness of both surface substrates is typically between 0.1 mm and 1 mm. It will be emphasized at this point that the lateral geometry of the Segmentation of the semiconductor and glass-like surface substrate is not a basic one Is subject to restriction. The areas of different materials can be connected or not connected. The minimal Dimensions of the areas depend on the precision of the primary semiconductor Structuring method and the mechanical stability of the wafer or chip from. Anisotropic dry etching ("Deep RIE") is used for the silicon structures about an aspect ratio (height: width) of 10: 1. In order to For example, breakthroughs would occur in a 500 µm thick glass wafer Holes with a diameter of 50 µm. The finest glass structures can, however have smaller dimensions because it is possible to make very fine holes in silicon etching, for example by means of pore etching.

The invention is hereinafter described without limitation of the general The inventive concept based on exemplary embodiments with reference to the drawing is described as an example. Show it:

Fig. 1 flow chart of the inventive method for producing a patterned glass-like surface of the substrate,

Fig. 2 plan view of a glass-like surface substrate having electrical feedthroughs,

Fig. 3a, b for examples of using a processed glass-like surface substrate, and

Fig. 4 top view of a semiconductor surface substrate with insulated electrical feedthroughs.

The process steps according to the invention are shown in a schematic sequence in FIG. 1. The illustrations shown in FIGS. 1a to 1f have hatched surface areas which correspond to the glass-like surface substrate, for example a single-crystal silicon wafer. The areas of black design relate to the semiconductor area substrate, which is structured in a predetermined manner.

In Fig. 1a, the glass-like surface substrate is intimately disposed on the already pre-structured semiconductor surface substrate by way of anodic bonding. Both surface substrates include intermediate volumes, which are predetermined by the geometry of the depressions within the surface of the semiconductor surface substrate. The two surface substrates are advantageously joined under vacuum conditions, so that after the anodic bonding according to FIG. 1a has taken place, in a subsequent annealing process ( FIG. 1b) the glass-like surface substrate heated above the glass transition temperature is completely distributed into the structure openings of the pre-structured semiconductor surface substrate. The annealing process, which is preferably carried out in an oven process, is carried out under normal pressure conditions or under elevated pressure conditions. The driving force with which the plastic glass material is driven into the structure openings is in principle the vacuum enclosed within the structure openings, but the process can be supported by any overpressure conditions within the tempering furnace. At constant temperature and corresponding process time, however, the material properties of the glass-like flat substrate have a decisive influence on the form and accuracy of the structural impression.

After the two surface substrates, which are now closely intermeshed, have cooled accordingly, material is removed by means of suitable grinding and / or polishing processes. Depending on the later use, the semiconductor surface substrate can be removed from below according to FIG. 1c, so that a glass-like surface substrate is formed which contains finely structured semiconductor regions, or the glass-like surface substrate is removed from above in accordance with method step FIG. 1d , so that the glass-like surface substrate is flush with the structured surface of the semiconductor surface substrate (see FIG. 1d).

FIG. 1e finally shows the result of a further material removal process, which eliminates the corresponding surface substrate portions that project beyond the structured areas (see FIGS. 1c, 1d). At this stage, a finely structured glass-like flat substrate is obtained, which is completely interspersed with a large number of semiconductor openings. Such a composite component can, as will be explained below, serve for the selective electrical contacting of microelectronic components.

In Fig. 1f provided with perforations or openings complete vitreous substrate surface is shown which is obtained after carrying out an etching process in which the semiconductor material regions shown in Fig. 1 are removed.

As an alternative to the complete removal of the structured semiconductor surface substrate by means of the etching process indicated in FIG. 1f, it is also possible to separate the two surface substrates from one another, for example after completion of cooling after the tempering process, by introducing a suitable separating layer between the two surface substrates. It is thus possible, in particular, that the pre-structured semiconductor flat substrate can be reused by applying suitable separating layers, as a result of which the process costs can be considerably reduced. For this purpose, it is necessary that one or more separating layers are introduced between the two surface substrates before the connection of the two surface substrates. In principle there are several options:

• a) On the semiconductor surface substrate, for example Si wafer, a Carbon layer (or diamond layer or diamond-like layer or SiC) applied the one Sticking the glass to the silicon prevents. The connection of the Si wafer with The glass wafer is reached by a ring of solder, which is the two wafers connects vacuum-tight at the edge of the wafer. Although the solder is at the process temperature where the glass flow takes place liquid, the poor wetting of the Uncoated glass or carbon layers, however, prevents the solder from becoming too can penetrate far between the wafers. The separation of the two wafers can either done purely mechanically, the solder ring can also be removed by etching or the carbon layer is removed by an oxidation process (approx. 400-500 ° C under oxygen) between the two substrates. Before further use of the silicon wafer, these layers must be under Under certain circumstances this separation layer can be applied again.  
• b) On the Si wafer, an adhesion-promoting layer is made from a suitable one Metal applied e.g. B. Tantalum. Another metal is on this layer applied, e.g. B. tin. Tin also prevents the glass from sticking to the Silicon and is liquid during the glass flow process. The separation of the two The wafer can either be removed during a further tempering step above the The melting point of tin is purely mechanical or the metal becomes selective etched out to silicon and glass.
• c) A second layer is applied to the silicon wafer, with which the Glass wafers can be connected (e.g. by anodic bonding). Examples of this would be silicon, titanium, aluminum or tantalum. At the end of the whole process this sacrificial layer is selectively removed from the glass or silicon by etching. In order to To avoid attacking the original Si wafer, the wafer can also be provided with suitable layers, e.g. As silicon nitride or silicon carbide.

The manufacturing process can be modified with the appropriate separating layers be that the silicon wafer can be used several times. In certain circumstances the separating layers must be reapplied before being used again. The structured glass wafer obtained after the silicon wafer has been separated off must finally only be sanded on the back to complete Get breakthroughs. These breakthroughs can be in a further process such. B. be galvanically filled with metals.

In general, electrical is used in microelectronics and microsystem technology Contacting of chips via pads lying on the edge of the chips. In a series of However, this is disadvantageous in use cases and is therefore not desired.

For example

• - For electrical reasons to reduce signal losses, e.g. B. for small capacitive signals or HF signals. The electrical feedthrough offers a lower series resistance, lower stray capacities and lower Inductors than contacting over the edge.  
• - for space reasons. This is especially true for systems that are seamlessly array-shaped must be composed of several chips, e.g. B. large area Detector arrays or micromirror arrays. In these cases, the inner Chips on the pad area can be dispensed with. But also for individual components there are often space problems, e.g. B. in medical micro probes (electrodes for stimulation or registration).
• - if several functional chips are stacked on top of one another and a stack form. For example, the top level of sensors (e.g. optical) exist and the signal processing electronics are in the chip underneath.
• - Probe cards consist of micro contact arrays for automated electrical Test of chips, wafers or circuit boards. In this case it is electrical Reasons, in the case of larger trial cards also one for reasons of space Vias desired.

In those cases, through-contacting by the chip is an alternative is possible with a glass substrate processed according to the invention.

Fig. 2 shows a schematic plan view of a processed glass wafer (white area) provided with electrical contacts (black areas) is penetrated. Such a structure can be obtained in the method step according to FIG. 1e. The electrical contacts through the glass wafer can consist of highly conductive silicon (process without a separating layer) or of metals (process with a separating layer and subsequent metallization of the free openings in the glass wafer).

The use of such structured substrates for the construction of micromechanical components for the high-frequency range 1-100 GHz appears to be particularly advantageous. A specific example of this can be seen in FIGS . 3a) and b). In this example, a micromechanical component (micro-mechanical switch) is built up on a glass substrate with electrical feedthroughs ( FIG. 3a). At the end of the entire production process, the entire structure is hermetically sealed with a lid wafer by means of a soldering process, the electrical contacts between the two wafers also being produced. Alternatively, the electrical contacts can also be introduced into the cover ( FIG. 3b).

The electrical contact areas shown in FIG. 2 also serve for targeted heat dissipation. Areas of application are conceivable for applications in which heat has to be dissipated in certain areas in a glass substrate. The silicon or metal bushings are used here as heat conduction paths.

FIG. 4 shows an exemplary embodiment of a silicon wafer (black areas) which has annular glass areas (white areas) for the purpose of isolated electrical feedthroughs. Such a structure can also be obtained in a somewhat modified form in the course of the method step according to FIG. 1e. Such silicon wafers, in which glass is incorporated in certain areas for electrical, thermal or optical reasons, are suitable for a large number of different applications:

Silicon wafers with thermally insulated areas

The structures according to FIGS. 1d or 1e are suitable for these applications. Thermally insulated areas on silicon wafers are particularly necessary for thermal sensors, for example thermopiles, bolometers or pyroelectric sensors. So far, membrane structures have been produced in or on the chip for these sensor types in order to ensure thermal insulation. However, for reasons of stability, these sensors are not suitable for areas of application with high mechanical loads.

Silicon wafer with electrically insulated areas

The structures according to FIGS. 1d or 1e can also be used for this purpose. Passive RF components (e.g. inductors) or MEMS components with high quality can be placed on the glass areas. Due to the losses in the substrate, high grades cannot be achieved on pure silicon substrates.

Silicon wafer with optical windows

The structures according to FIG. 1c or 1e can be used for this. Applications are e.g. B. light collimators with a specific shape or collimator arrays with narrow openings.

In general, the production of hermetically sealed connections is already at the wafer level a very important topic in microsystem technology. Movable microstructures must always be protected against adverse environmental conditions best at the wafer level. In addition to the cost aspects of encapsulation Speaking at the wafer level plays above all a protection against the necessary Separation processes play a very important role. Because it is often hermetic tight sealing is required, the problem of inevitably arises electrical feedthroughs below the sealing surfaces. In this Relationship between the encapsulation of microelectronic components the method according to the invention supports CSP technology (chip Side packaging).

In the case of silicon sensors, methods based on glass solders have become available proven, however process temperatures of approx. 400 ° C are required, clearly too high for metallic micro elements. They are also suitable Connection techniques based on glass solders only for sealing via a comparatively low topography (approx. 0.5 µm).

Leave hermetically sealed connections at temperatures below 250-300 ° C produce on the other hand by soldering. This inevitably results here Problem that the supply lines with the available insulation materials and their process-technically producible layer thicknesses are highly capacitive to one another are coupled. Therefore, such bushings for the manufacture of micromechanical components for high frequencies actually. Only by the use of bushings through the substrate or lid sufficient separation of the lines is possible.  

In addition to the aspects already mentioned, the production of Implementations also improved handling of the entire chip. In particular, components constructed in this way are also suitable for use within flip-chip processes or even using the chip directly in the PCB assembly z. B. as an SMD component.

In conclusion, it should be pointed out that the method according to the invention Parallel production of a large number of individual structured glass-like Surface substrates enables, moreover, as part of a batch process can be produced, whereby the process is also among the Aspects of industrial mass production are ideal.

Claims (25)

1. Method for structuring a flat substrate consisting of glass-like material by means of the combination of the following method steps:

• Providing a semiconductor flat substrate consisting of a semiconductor material,
• Structuring at least one surface of the semiconductor flat substrate in order to obtain depressions on the surface,
• Connecting the surface of the semiconductor surface substrate to the glass-like surface substrate, the structured surface of the semiconductor surface substrate being brought together at least partially overlapping a surface of the glass-like surface substrate,
• Tempering the connected surface substrates in such a way that at least partial areas of the glass-like material flow into the depressions of the structured surface of the semiconductor surface substrate,
• - Material removal of at least the reconsolidated glass-like surface substrate, such that the glass-like surface substrate assumes a surface that is flush with the structured surface of the semiconductor surface substrate.

2. The method according to claim 1, characterized in that on the surface of the semiconductor surface substrate, that of the surface connected to the glass-like sheet substrate opposite, semiconductor material is removed until at least partial areas of the in the depressions that flowed into the glass-like material are exposed, which are flush complete with the surface of the semiconductor surface substrate.   3. The method according to claim 1 or 2, characterized in that the semiconductor surface substrate of the vitreous Flat substrate is separated. 4. The method according to claim 3, characterized in that the separation of the glass-like sheet substrate from the semiconductor surface substrate by etching away the semiconductor material. 5. The method according to claim 3, characterized in that the separation of the two surface substrates from one another by providing a separating layer between the two surface substrates. 6. The method according to claim 5, characterized in that the separation layer before the merging of the two Surface substrates on the structured surface of the semiconductor surface substrate is applied to preserve structure and is designed as a sacrificial layer in the way thermal and / or chemical action is destroyed and a separation of the two Allows substrates from each other. 7. The method according to claim 5 or 6, characterized in that a metal layer is used as the separating layer, which has a melting point below the melting points of the substrates lies. 8. The method according to claim 5 or 6, characterized in that an oxidizable layer as the separating layer is used, the supply of oxygen and / or thermal energy chemically converted. 9. The method according to claim 5 or 6, characterized in that a carbon layer, Diamond layer, diamond-like layer or SiC is used.   10. The method according to any one of claims 1 to 9, characterized in that the vitreous material and the semiconductor material have almost the same thermal expansion coefficient. 11. The method according to any one of claims 1 to 10, characterized in that the consisting of a glass-like material Surface substrate is a boron-silicate glass. 12. The method according to any one of claims 1 to 11, characterized in that the semiconductor surface substrate is a silicon substrate is. 13. The method according to any one of claims 1 to 12, characterized in that the connection of the semiconductor surface substrate with the glass-like surface substrate is carried out by anodic bonding. 14. The method according to any one of claims 1 to 13, characterized in that during the connection process negative pressure prevails so that after the connection in the recesses of the surface of the semiconductor surface substrate, between the semiconductor surface substrate and the glassy sheet substrate is preserved. 15. The method according to any one of claims 1 to 14, characterized in that during the annealing an overpressure on the from Semiconductor surface substrate surface facing away from the glass-like surface substrate acts. 16. The method according to any one of claims 1 to 15, characterized in that the tempering process by controlling the Temperature and the duration is carried out such that the inflow of the glassy material in the recesses of the semiconductor surface substrate terminated when the glassy material completely fills the wells.   17. The method according to any one of claims 3 to 16, characterized in that after the separation of both surface substrates the glass-like surface substrate is mechanically reworked from one another to Obtaining openings penetrating vertically through the surface substrate. 18. The method according to claim 17, characterized in that the breakthroughs with an electrically conductive Material to be replenished. 19. The method according to any one of claims 1 to 17, characterized in that the structuring of the semiconductor surface substrate using lithography technology and subsequent etching technology to produce Structures with structural dimensions in the micro and / or sub-micrometer range. 20. The method according to claim 19, characterized in that the structures are in the form of depressions Aspect ratio (height or depth: width) of 10: 1. 21. Glass-like sheet substrate, produced by a process according to Claims 1 to 20, characterized in that the glass-like sheet substrate perpendicular to Breakthroughs in which the substrate is electrically conductive Material is provided. 22. Glass-like sheet substrate according to claim 21, characterized in that the filled with electrically conductive material Breakthroughs are arranged in an array. 23. Use of the glass-like sheet substrate according to claim 21 or 22 for electrical contacting of components from microelectronics or Micromechanics.   24. Use of the method according to one of claims 1 to 20 for Production of a semiconductor interspersed with a glass-like material Surface substrate. 25. Use according to claim 24, characterized in that the semiconductor surface substrate is a silicon wafer, for purposes of electrical and / or thermal insulation or for reasons optical transparency at least partially penetrating the silicon wafer glassy material areas.