DE10001869B4 - In both directions blocking controllable semiconductor switching element - Google Patents
In both directions blocking controllable semiconductor switching element Download PDFInfo
- Publication number
- DE10001869B4 DE10001869B4 DE10001869A DE10001869A DE10001869B4 DE 10001869 B4 DE10001869 B4 DE 10001869B4 DE 10001869 A DE10001869 A DE 10001869A DE 10001869 A DE10001869 A DE 10001869A DE 10001869 B4 DE10001869 B4 DE 10001869B4
- Authority
- DE
- Germany
- Prior art keywords
- zone
- switching element
- semiconductor switching
- doped
- source
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 46
- 230000000903 blocking effect Effects 0.000 title claims abstract description 28
- 230000007717 exclusion Effects 0.000 claims description 12
- 239000002800 charge carrier Substances 0.000 claims description 11
- 239000000463 material Substances 0.000 claims description 10
- 230000006798 recombination Effects 0.000 claims description 9
- 238000005215 recombination Methods 0.000 claims description 9
- 239000012535 impurity Substances 0.000 claims description 7
- 230000001737 promoting effect Effects 0.000 claims description 5
- 230000004888 barrier function Effects 0.000 abstract description 3
- 230000003071 parasitic effect Effects 0.000 description 11
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 4
- 239000000969 carrier Substances 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000000295 complement effect Effects 0.000 description 2
- 230000001419 dependent effect Effects 0.000 description 2
- 230000004907 flux Effects 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 210000000746 body region Anatomy 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0843—Source or drain regions of field-effect devices
- H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/167—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table further characterised by the doping material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
Halbleiterschaltelement,
das folgende Merkmale aufweist:
– einen Halbleiterkörper (1)
mit einer ersten Leitungszone (10) eines ersten Leitungstyps (n),
einer zweiten Leitungszone (32, 34) des ersten Leitungstyps (n),
die eine stark dotierte Zone (34) und eine schwächer dotierte Zone (32) aufweist,
und einer zwischen der ersten und zweiten Leitungszone (10; 32,
34) angeordneten Sperrzone (20) eines zweiten Leitungstyps (p),
– eine Steuerelektrode
(40) zur Bewirkung eines leitenden Kanals in der Sperrzone (20)
bei Anlegen eines Ansteuerpotentials,
dadurch gekennzeichnet,
daß
die
erste Leitungszone (10) eine stark dotierte Zone (12) zum Anschluß einer
Anschlußelektrode
(50) und eine die stark dotierte Zone (12) in dem Halbleiterkörper (1)
umgebende schwächer
dotierte Zone (14) aufweist.Semiconductor switching element, comprising:
A semiconductor body (1) having a first conduction region (10) of a first conduction type (n), a second conduction region (32, 34) of the first conduction type (n) comprising a heavily doped zone (34) and a weaker doped region (32 ), and a barrier zone (20) of a second conductivity type (p) arranged between the first and second conduction zones (10, 32, 34),
A control electrode (40) for causing a conductive channel in the blocking zone (20) upon application of a driving potential,
characterized in that
the first line region (10) has a heavily doped zone (12) for connecting a connection electrode (50) and a weakly doped zone (14) surrounding the heavily doped zone (12) in the semiconductor body (1).
Description
Die vorliegende Erfindung betrifft ein Halbleiterschaltelement gemäß den Merkmalen des Oberbegriffs des Anspruchs 1.The The present invention relates to a semiconductor switching element according to the features of the preamble of claim 1.
Derartige Halbleiterschaltelemente sind beispielsweise Feldeffekttransistoren (FET), insbesondere MOSFET, bei denen die Source-Zone eine erste Leitungszone, die Drain-Zone eine zweite Leitungszone und der sogenannte Body-Bereich oder Bulk eine Sperrzone bilden. Die Leitungszonen sind dabei p- oder n-dotiert, die Sperrzone ist komplementär zu den Leitungszonen dotiert. Die Gate-Elektrode bildet bei FET eine Steuerelektrode, welche bei MOSFET durch eine Isolationsschicht gegenüber dem Halbleiterkörper, in dem das Bauteil ausgebildet ist, bzw. gegenüber der Sperrzone und den Leitungszonen isoliert ist. Bei Anlegen eines Ansteuerpotentials an die Steuerelektrode bildet sich ein leitender Kanal in der Sperrzone zwischen den beiden Leitungszonen aus. Hierdurch ist das Leitverhalten bzw. das Schaltverhalten des MOSFET steuerbar.such Semiconductor switching elements are, for example, field effect transistors (FET), in particular MOSFET, in which the source zone has a first conduction zone, the drain zone a second conduction zone and the so-called body region or bulk form a restricted zone. The conduction zones are p- or n-doped, the blocking zone is doped complementary to the conduction zones. The gate electrode forms a control electrode in FET, which at MOSFET through an insulating layer with respect to the semiconductor body, in the component is formed, or with respect to the restricted zone and the line zones is isolated. Upon application of a drive potential to the control electrode a conductive channel forms in the exclusion zone between the two Line zones off. As a result, the conductive behavior or the switching behavior of the MOSFET controllable.
Bei sogenannten Vertikal-MOSFET ist es üblich in einem Halbleiterkörper des ersten Leitungstyps eine oder mehrere Wannen des zweiten Leitungstyps anzuordnen, in denen wiederum jeweils eine Wanne des ersten Leitungstyps angeordnet ist. Anschlußelektroden für die Drain- und Source-Zonen befinden sich dabei an gegenüberliegenden Seiten des Halbleiterkörpers.at So-called vertical MOSFET, it is common in a semiconductor body of the first conductivity type one or more wells of the second conductivity type to arrange, in turn, in each case a tub of the first conductivity type is arranged. terminal electrodes for the Drain and source zones are located opposite each other Sides of the semiconductor body.
Die erste und zweite Leitungszone, d.h. die Source- und Drain-Zone, sind bei dieser Ausführung nicht identisch aufgebaut. Hieraus resultieren verschiedene Sperrspannungen je nachdem, ob bei nicht anliegendem Ansteuerpotential eine Flußspannung, d.h. eine positive Spannung bei n-Kanal-MOSFET und eine negative Spannung bei p-Kanal-MOSFET, zwischen der Drain- und der Source-Elektrode oder der Source- und der Drain-Elektrode angelegt wird. In Drain-Source-Richtung lassen sich Sperrspannungen bis zu 600V erreichen, während die Sperrspannung in Source-Drain-Richtung, die auch als Rückwärtsrichtung des MOSFET bezeichnet wird, bei bekannten MOS-FET in Siliziumtechnologie nur etwa 5V beträgt.The first and second conduction zones, i. the source and drain zones, are not in this design identically constructed. This results in different reverse voltages depending on whether, if the drive potential is not present, a forward voltage, i.e. a positive voltage at n-channel MOSFET and a negative one Voltage at p-channel MOSFET, between the drain and the source electrode or the source and the drain electrode is applied. In drain-source direction can be blocking voltages up to 600V, while the reverse voltage in the source-drain direction, which is also referred to as the reverse direction of the MOSFET, in known MOS-FET in silicon technology is only about 5V.
Die
Die
Die
Der vorliegenden Erfindung liegt daher die Aufgabe zugrunde, ein steuerbares Halbleiterschaltelement mit einer erhöhten Sperrspannung zwischen der ersten und zweiten Leitungszone, d.h. in Rückwärtsrichtung, zur Verfügung zu stellen.Of the The present invention is therefore based on the object, a controllable Semiconductor switching element with an increased blocking voltage between the first and second conduction zones, i. in reverse direction, available too put.
Dieses Ziel wird durch ein Halbleiterschaltelement mit den Merkmalen des Anspruchs 1 gelöst.This The object is achieved by a semiconductor switching element with the features of Claim 1 solved.
Danach weist das Halbleiterschaltelement neben den eingangs genannten Merkmalen eine erste Leitungszone auf, die eine stark dotierte Zone zum Anschließen einer Anschlußelektrode und eine die stark dotierte Zone umgebende schwächer dotierte Zone aufweist. Die Ausgestaltung der ersten Leitungszone, d.h. der Source-Zone bei MOSFET, mit unterschiedlich stark dotierten Bereichen bewirkt eine erhöhte Sperrspannung bei Anlegen einer Flußspannung zwischen der ersten und zweiten Leitungszone, also in Rückwärtsrichtung des Halbleiterschaltelements.After that has the semiconductor switching element in addition to the features mentioned above a first conduction zone having a heavily doped region for connecting a terminal electrode and a weaker doped zone surrounding the heavily doped zone. The design of the first conduction zone, i. the source zone in MOSFET, with differently heavily doped areas causes a increased Reverse voltage when applying a forward voltage between the first and second conduction zone, that is in the reverse direction of the semiconductor switching element.
Vorteilhafte Ausgestaltungen der Erfindung sind Gegenstand der Unteransprüche.advantageous Embodiments of the invention are the subject of the dependent claims.
Vorzugsweise ist die stark dotierte Zone als dünne Schicht in einer wannenartig ausgebildeten schwach dotierten Zone angeordnet. Die Dotierung der stark dotierten Zone mit Fremdatomen zur Bereitstellung von Ladungsträgern des ersten Leitungstyps beträgt vorzugsweise mehr als 1015 cm–2 und die Dotierung der schwächer dotierten Zone mit Fremdatomen beträgt vorzugsweise zwischen 1013 cm–2 und 1014 cm–2. Die Dicke der ersten Leitungszone, bzw. deren Höhe in vertikaler Richtung des Halbleiterkörpers beträgt vorzugsweise etwa 1-2μm.Preferably, the heavily doped zone is arranged as a thin layer in a trough-like weakly doped zone. The doping of the heavily doped zone with impurities to provide charge carriers of the first conductivity type is preferably more than 10 15 cm -2 and the Do The doping of the weaker doped zone with foreign atoms is preferably between 10 13 cm -2 and 10 14 cm -2 . The thickness of the first conduction zone, or its height in the vertical direction of the semiconductor body is preferably about 1-2μm.
Die Sperrzone ist vorzugsweise ebenfalls wannenartig und in der zweiten Leitungszone ausgebildet und nimmt die erste Leitungszone auf, wobei sie die erste Leitungszone und die zweite Leitungszone voneinander trennt. Die Dotierung der zweiten Leitungszone mit Fremdatomen zur Abgabe von Ladungsträgern des zweiten Leitungstyps beträgt vorzugsweise weniger als 1013 cm–2, die Dicke, bzw. Höhe in vertikaler Richtung des Halbleiterkörpers, der Sperrzone beträgt vorzugsweise etwa 3-4 μm.The blocking zone is also preferably trough-shaped and formed in the second line zone and receives the first line zone, wherein it separates the first line zone and the second line zone from each other. The doping of the second conduction zone with impurities to emit charge carriers of the second conductivity type is preferably less than 10 13 cm -2 , the thickness or height in the vertical direction of the semiconductor body, the barrier zone is preferably about 3-4 microns.
Gemäß einer weiteren Ausführungsform der Erfindung ist vorgesehen, die Sperrzone über einen Widerstand mit der ersten Leitungszone, insbesondere der stark dotierten Zone der ersten Leitungszone, zu verbinden. Eine andere Ausführungsform sieht vor, die Sperrzone "floatend" anzuordnen.According to one another embodiment the invention is provided, the exclusion zone via a resistor with the first conduction zone, in particular the heavily doped zone of the first Line zone to connect. Another embodiment provides to arrange the blocking zone "floating".
Eine weitere Ausführungsform der Erfindung sieht vor, ein Material in der Sperrzone anzuordnen, das die Rekombination von Ladungsträgern des ersten und zweiten Leitungstyps in der Sperrzone fördert. Durch die Abfolge der ersten Leitungszone vom ersten Leitungstyp, der Sperrzone vom zweiten Leitungstyp und der zweiten Leitungszone vom ersten Leitungstyp ist in dem Halbleiterschaltelement ein parasitärer Bipolartransistor gebildet, der die Sperrspannung des Halbleiterschaltelements mitbestimmt. Die Sperrzone bildet die Basis, die erste Leitungszone den Emitter und die zweite Leitungszone den Kollektor des parasitären Bipolartransistors. Dabei hat sich gezeigt, daß durch Einbringen eines die Rekombination von ersten und zweiten Ladungsträgern fördernden Materials in die Sperrzone, und damit die Basis des parasitären Bipolartransistors, die Stromverstärkung dieses Bipolartransistors stark reduziert und dessen Durchbruchspannung, und damit die Durchbruchspannung des MOSFET, gegenüber solchen MOSFET ohne derartigen Rekombinationsbereich gesteigert werden kann. Diese Maßnahme erhöht sowohl die Sperrspannung eines MOSFET in Drain-Source-Richtung als auch in Source-Drain-Richtung.A another embodiment The invention provides to arrange a material in the restricted zone, the the recombination of charge carriers promotes the first and second conductivity type in the restricted zone. By the sequence of the first conduction zone of the first conductivity type, the Exclusion zone of the second conduit type and the second conduit zone of First conductivity type is a parasitic bipolar transistor in the semiconductor switching element formed, which also determines the reverse voltage of the semiconductor switching element. The Exclusion zone forms the base, the first conduction zone the emitter and the second conduction region is the collector of the parasitic bipolar transistor. It has been shown that by Introducing a recombining of the first and second charge carriers promotional Material into the blocking zone, and thus the base of the parasitic bipolar transistor, the current gain this bipolar transistor greatly reduced and its breakdown voltage, and thus the breakdown voltage of the MOSFET, over such MOSFET can be increased without such recombination. This measure elevated both the reverse voltage of a MOSFET in the drain-source direction than also in source-drain direction.
Die vorliegende Erfindung wird nachfolgend in Ausführungsbeispielen anhand von Figuren näher erläutert. Es zeigen:The The present invention will be described below in exemplary embodiments with reference to FIG Figures explained in more detail. It demonstrate:
In den Figuren bezeichnen, sofern nicht anders angegeben, gleiche Bezugszeichen gleiche Teile mit gleicher Bedeutung.In denote the figures, unless otherwise indicated, like reference numerals same parts with the same meaning.
Der
MOSFET weist einen n-dotierten Halbleiterkörper
Die
Source-Zone
Die
Dotierung der Sperrzone
Die
Ausgestaltung der Source-Zone
Wie
aus
Vorzugsweise
sind einige oder alle Source-Zonen
Bei
dieser Ausführungsform
ist in der Sperrzone
Durch
die Abfolge der n-dotierten Source-Zone
Die Kollektor-Emitter-Sperrspannung des parasitären Bipolartransistors bestimmt die Sperrspannung des MOSFET sowohl in Drain-Source-Richtung als auch in Source-Drain-Richtung, wobei die Sperrspannung in Source-Drain-Richtung aufgrund des unsymmetrischen Aufbaus geringer als in Drain-Source-Richtung ist.The Collector-emitter reverse voltage of the parasitic bipolar transistor determined the blocking voltage of the MOSFET both in the drain-source direction as also in source-drain direction, wherein the reverse voltage in the source-drain direction due to the asymmetrical structure lower than in the drain-source direction is.
Die
Basis des parasitären
Bipolartransistors, bzw. die Sperrzone
Das
in die Sperrzone eingebrachte, die Rekombination von n- und p-Ladungsträgern fördernde Material
wirkt diesem Effekt entgegen. Das Ausbilden des Bereiches
- DD
- Drain-AnschlußDrain
- GG
- Gate-AnschlußGate
- RR
- Widerstandresistance
- SS
- Source-AnschlußSource terminal
- 11
- HalbleiterkörperSemiconductor body
- 22
- Rückseite des Halbleiterkörpersback of the semiconductor body
- 1010
- erste Leitungszonefirst embedment
- 1212
- stark dotierter Bereichstrongly doped area
- 1414
- schwächer dotierter Bereichweaker endowed Area
- 2020
- Sperrzoneexclusion zone
- 4040
- Steuerelektrodecontrol electrode
- 5050
- Anschlußelektrodeterminal electrode
- 32, 3432 34
- zweite Leitungszonesecond embedment
- 7070
- Rekombinationsbereichrecombination
Claims (9)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10001869A DE10001869B4 (en) | 2000-01-18 | 2000-01-18 | In both directions blocking controllable semiconductor switching element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10001869A DE10001869B4 (en) | 2000-01-18 | 2000-01-18 | In both directions blocking controllable semiconductor switching element |
Publications (2)
Publication Number | Publication Date |
---|---|
DE10001869A1 DE10001869A1 (en) | 2001-07-26 |
DE10001869B4 true DE10001869B4 (en) | 2006-10-26 |
Family
ID=7627848
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE10001869A Expired - Fee Related DE10001869B4 (en) | 2000-01-18 | 2000-01-18 | In both directions blocking controllable semiconductor switching element |
Country Status (1)
Country | Link |
---|---|
DE (1) | DE10001869B4 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102006016049A1 (en) * | 2006-04-04 | 2007-10-18 | Infineon Technologies Austria Ag | Power semiconductor component, has charge carrier recombination zone with high temperature resistance in such a manner that recombination zone withstands locally when subjected to metallization process and/or soldering process |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10217610B4 (en) | 2002-04-19 | 2005-11-03 | Infineon Technologies Ag | Metal-semiconductor contact, semiconductor device, integrated circuit and method |
DE10262169B4 (en) * | 2002-04-19 | 2016-11-03 | Infineon Technologies Ag | Semiconductor device and integrated circuit arrangement so |
DE10227832C1 (en) * | 2002-06-21 | 2003-11-13 | Infineon Technologies Ag | Bridge circuit for controlling inductive load using MOSFETs has at least one transistor of each series transistor pair provided with floating or high ohmic body zone |
DE102004063959B4 (en) | 2004-06-15 | 2010-06-02 | Infineon Technologies Ag | Method for producing a low-resistance connection electrode as a buried metallic layer in a semiconductor body for a semiconductor component |
CN113809728B (en) * | 2021-11-16 | 2022-03-01 | 上海维安半导体有限公司 | Integrated blocking type surge protection device |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5473176A (en) * | 1993-09-01 | 1995-12-05 | Kabushiki Kaisha Toshiba | Vertical insulated gate transistor and method of manufacture |
EP0726603A2 (en) * | 1995-02-10 | 1996-08-14 | SILICONIX Incorporated | Trenched field effect transistor with PN depletion barrier |
EP0656661B1 (en) * | 1993-11-12 | 1999-03-10 | Denso Corporation | DMOSFET with a resistance for improving the reverse bias conduction |
-
2000
- 2000-01-18 DE DE10001869A patent/DE10001869B4/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5473176A (en) * | 1993-09-01 | 1995-12-05 | Kabushiki Kaisha Toshiba | Vertical insulated gate transistor and method of manufacture |
EP0656661B1 (en) * | 1993-11-12 | 1999-03-10 | Denso Corporation | DMOSFET with a resistance for improving the reverse bias conduction |
EP0726603A2 (en) * | 1995-02-10 | 1996-08-14 | SILICONIX Incorporated | Trenched field effect transistor with PN depletion barrier |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102006016049A1 (en) * | 2006-04-04 | 2007-10-18 | Infineon Technologies Austria Ag | Power semiconductor component, has charge carrier recombination zone with high temperature resistance in such a manner that recombination zone withstands locally when subjected to metallization process and/or soldering process |
DE102006016049B4 (en) * | 2006-04-04 | 2016-12-15 | Infineon Technologies Austria Ag | Semiconductor component, in particular power semiconductor component with charge carrier recombination zones and method for producing the same |
Also Published As
Publication number | Publication date |
---|---|
DE10001869A1 (en) | 2001-07-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE19539541B4 (en) | Lateral trench MISFET and process for its preparation | |
DE10120030B4 (en) | Lateralhalbleiterbauelement | |
DE19611045C1 (en) | Field effect transistor e.g. vertical MOS type | |
DE3110230C2 (en) | ||
EP0879481B1 (en) | Field effect controlled semiconductor component | |
DE10214151B4 (en) | Semiconductor device with increased breakdown voltage in the edge region | |
DE102010000531B4 (en) | Semiconductor device, electronic component and method of manufacturing a semiconductor device | |
DE19630740B4 (en) | Bipolar transistor with shorting anode and laterally arranged insulated gate electrode | |
DE4110369C2 (en) | MOS semiconductor device | |
DE19711729B4 (en) | Horizontal field effect transistor and method for its production | |
DE102005014743B4 (en) | MOS field plate trench transistor means | |
DE112012004026T5 (en) | Semiconductor device | |
DE102004058021A1 (en) | Semiconductor device and method for its production | |
DE10224201B4 (en) | Semiconductor device with breakdown current path and manufacturing method thereof | |
DE10309400B4 (en) | Semiconductor device with increased dielectric strength and / or reduced on-resistance | |
DE19923466B4 (en) | Junction-isolated lateral MOSFET for high / low-side switches | |
DE10001869B4 (en) | In both directions blocking controllable semiconductor switching element | |
DE19534154C2 (en) | Power semiconductor device controllable by field effect | |
WO2001043200A1 (en) | Controllable semiconductor switching element that blocks in both directions | |
DE102016110645A1 (en) | SEMICONDUCTOR DEVICE WITH ONE FIRST FIELD PLATE AND A SECOND FIELD PLATE TRANSISTOR | |
DE102005045910B4 (en) | Lateral SOI device with reduced on-resistance | |
DE3138747A1 (en) | Normally-off field-effect transistor of the depletion type | |
DE102006055742B4 (en) | Semiconductor device arrangement with a plurality of adjacent to a drift zone control electrodes | |
DE10301939B4 (en) | Field Effect Transistor | |
DE10005772B4 (en) | Trench MOSFET |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
OP8 | Request for examination as to paragraph 44 patent law | ||
8364 | No opposition during term of opposition | ||
R119 | Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee |