DD235350B1 - MODULAR PARALLEL INTERFACE - Google Patents

Description

For this 3 pages drawings

Field of application of the invention

The invention relates to an interface, which allows any number of functional units to an information-processing system, usually a computer, to connect and thus to transmit data in any format in parallel form. The main field of application of the invention are information technology systems which transmit data in parallel form and which have different requirements with regard to the number of functional units to be connected, data security and data format.

Characteristic of the known technical solutions

Facilities with which the connection options of functional units can be multiplied to a computer, z. B. from DE-AS 2147995 and the references cited therein. For this purpose, multiplexers are used, to which a line bundle on the computer side and a plurality of line bundles on the process side are connected. A computer-supplied address signal determines whether one and if so, which of the process-side trunk group is currently switched through and thus the same information as the computer-side trunk group leads. Such arrangements are characterized in that the multiplexer on the computer side η terminals for data and control lines and a number of address lines for selecting one of m process-side bundles of data and control lines, to which a switching is to take place. On the process side, the multiplexer m · η has connections for data and control lines, which are connected to functional units of the process.

It is further known to further multiply the connection possibilities, in which, instead of one or more functional units of the process, further multiplexers are connected to the first multiplexer, to which either functional units of the process or further multiplexers are connected. This results in a tree structure with the multiplexers as branch points.

A disadvantage of these solutions, first, that on the process side very many connections must be provided at the multiplexer, namely m times as many connections, as a trunk group requires, and secondly, that the number of switched through binary information, i. the data and control lines that define the multiplexer. If the number of binary information is the same for all functional units, then there are no problems due to the last-mentioned disadvantage. In many cases, however, the information requirement of different functional units is different. Sometimes only a few bits are sufficient, sometimes several bytes, eg. B. to eight bits, required. It is economically disadvantageous if the multiplexer must be designed for the largest possible number of bits, which is not needed in many cases. On the other hand, the multiplexers, when designed for a certain number of bits, also referred to hereinafter as the data width, are not suitable for the construction of such systems requiring a larger data width. It must then be used a new type or at least a variant of the multiplexer. Another disadvantage of the known solutions is that the number and meaning of the control signals which control the data exchange in the entire interface are the same. In most cases, these signals are used to implement a hand-shake signal game, for which request and acknowledgment signals are required. However, it also happens that in a number of functional units, such a signal game is not required or on the other hand, even more control signals are necessary.

Next is disadvantageous in known solutions, that in case of failure of a multiplexer all information that is passed through this, be suppressed or falsified.

Another way to extend an existing I / O interface is included in DD-WP 123400. Here, additional modules (address memory, group control, state memory) are used to increase the number of controllable units, whereby the uniformity of the system is severely disturbed and the cost is disproportionately increased. The same applies to the arrangement according to DD-WP 230101, where additional collecting registers are provided. The information transfer takes place here in two stages, which can cause time problems. Both solutions have the defect that the information exchange with the additionally connected devices differs considerably from that with the "normally" connected units, which complicates the software and in particular it is not possible to connect a specific device optionally at any point of the interfaces without changing anything other than its address (modularity point of view).

The construction of redundant systems in which information transmission over a second path is made possible when the first path is disturbed is associated with a greater overhead in all known systems.

Object of the invention

With the invention, a modular parallel interface is to be created, which avoids these disadvantages and can be produced with less effort, in particular line outlay, and also allows simpler, more reliable redundant systems.

Explanation of the essence of the invention

On the basis of the known tree structure and of the stated objective, an analysis of the technical causes of defects reveals that all the disadvantages are due to the multiplexed branching principle. The object of the invention is therefore to change the branching principle and to replace the multiplexer with more suitable expansion modules, which are suitable in a uniform design for different operating conditions.

Starting from a variably branched tree structure with expansion blocks, which contain one of the number of data channel inputs to be branched number of controllable driver stages, an address encoder and for bidirectional data channels a data direction logic, as they are known from I / O interfaces, this object is achieved according to the invention, that all branches are implemented with uniform extension modules using separate address lines per extension level, which are located at the outputs of the address decoder and that the inputs of the controllable driver stages of the other branches are connected in parallel.

Advantageously, tristate gates can be used for the controllable driver stages, some of which have subjunctive-linking inputs.

An advantageous embodiment of the invention consists in uniform expansion modules relatively small data width, of which several control side are connected in parallel for larger data width. Redundant systems can be implemented if two or more expansion modules are connected in parallel on the process side. With the invention, it is possible to allow the construction of systems with any data width and any number of functional units and any type and number of control signals with only one type of expansion modules. The number of process-side connections to each multiplexer is reduced to the number of data supplied to the computer and control lines. The multiplication of the number of these connections by the factor m typical of multiplexers is avoided, as well as the binding to a data format. In addition, the structure of redundant systems is greatly simplified. When using the interface expansion module according to the invention, the signals to be transmitted are only turned on to the output and then fed in the following on the interface expansion module wiring the information inputs a number k of functional units or other interface extension modules, where k is equal to or less than the number η is 1 out of η outputs of the address decoder. In this case, the outputs of the address decoder are connected to the permission signal inputs of the connected further interface extension modules or with an equivalent function in the input of a functional unit of the process. The function of the permission signal input in both cases is to allow traffic when the allow signal is active, and not otherwise. The fact that the information to be transmitted is only switched through, but not distributed in the interface expansion module, this has only as many data outputs as inputs. Enlarging the data width is possible by using several interface expansion modules whose permission signal inputs are connected in parallel, ie which are active or inactive at the same time. Does the interface expansion block z. B. a data width of 8 bits, it can be increased in this way to 16,24 and more bits and it is easily possible to work in different parts of the interface with different data formats. This is an economic factor, because the modules called multiplexers are designed for the maximum data width of the overall system, even if significantly less data is sufficient to control many functional units. The resulting types of multiplexers with their disadvantages for manufacturing and service is avoided with the invention.

In one possible embodiment of the invention, data channels can also be designed as bidirectional channels, and there is another control input for the direction switching signal with which the transmission direction is controlled. This also makes entries possible via the interface expansion block. Since in many cases more signals are sent from the central control unit to the periphery, i. in the direction of dispensing, as vice versa, i. in the input direction, because in the output direction address signals are still being transmitted to form subaddresses with which the branch to which the switching is made is defined in the tree structure formed by the interface, it is expedient if the interface extension module has both a bidirectional and additionally has a unidirectional data channel in the output direction.

Execution example

To further clarify the solution according to the invention, this is explained in more detail below in some embodiments.

In the accompanying drawings show

1 shows an example in which information is distributed with the aid of an interface expansion module to further η interface expansion modules and with the η input information to a

Input information are summarized; Fig. 2: an example of the parallel operation of two interface expansion modules to achieve a larger

Data width and Figure 3: an example of the process-side parallel operation of two interface expansion modules for the purpose of constructing a redundant system.

In FIG. 1, EB 0, EB 1.1 and EB 1.2 designate interface expansion modules according to the invention. The interface expansion module EB 0 is connected to the information processing system, not shown, for. As the computer, connected to the following lines:

- Data DBI on a bidirectional data channel

- Data DUI on a unidirectional data channel

a binary coded address information ADR1

a permission signal EN

- a control signal OFF for the control of the outputs

a direction switching signal R for controlling the transmission direction of the bidirectional channel.

The data DBI and DUI consist of several bits, z. B. one byte to 8 bits.

The interface expansion module contains a logic L not shown in detail, with which control signals for the driver stages and the address decoder DC are derived from the signals EN, OFF and R, which act as follows:

- When control signal OFF is active, all outputs of the interface expansion module are in high-resistance state.

- With inactive permission signal EN are independent of the address signal ADR1 all outputs of the address decoder DC inactive and also all outputs of the driver stages TO and TU.

When the permission signal EN and the control signal OFF are active, exactly one output ADRN1 to ADRNn is active at the output of the address decoder DC, namely the one selected by the binary address signal ADR1, and the data DUI are switched through to the output via the driver stages TU and stand there as data DUO available for further distribution. The driver stages TO and TI are additionally influenced by the direction switching signal R as follows:

When the direction switching signal R is active, the driver stages TO are active and the data DBI appear as data DBO at the output, if at the same time the permission signal EN and the control signal ON are active. The outputs of the driver stages TI are in high-resistance state.

• If the direction switching signal R is inactive, the outputs of the driver stages TO are high-ohmic and the driver stages TI are active. The data DBO appears at the input as data DBI.

The address lines ADRN1 to ADRNn of the interface expansion module EBO are connected to the permission inputs EN of the interface expansion modules EB 1.1 to EN 1.η in such a way that ADRN1 is connected to theEN input of EB 1.1, ADRN2 to the EN input of EB 1.2 and so on ,

The data lines DBO are connected to the inputs DBH of the interface expansion modules EB 1.1 to EB 1.n and also the data lines DUO to the inputs DUM.

Furthermore, the signal distribution level in which the interface expansion module EBO is located is referred to as the address level O and the level of the interface expansion modules EB 1.1 and EB 1.2 as the address level 1. The arrangement according to FIG. 1 adjusts the information flow Interface with tree structure, as it describes the mentioned comparison solution also. In each address level, the number of connectable interface expansion blocks can be expanded by the factor η. The place of an interface extension module is replaced by a functional unit of the process to be controlled or monitored at the end of the tree structure. The functional units of the process fulfill the same requirements as the interface expansion modules. They are only active when their permission signal EN is active and they are switched to data reception when the direction signal R is active, otherwise they supply data to the interface. In contrast to known arrangements, however, the connection of the interface expansion modules or the functional units of the following address level does not take place in such a way that for each interface extension module or each functional unit of the following address level on the preceding interface expansion module a connection device, for. As a plug, is present, which provides all the necessary connections for the following interface expansion module or a functional unit of the process, but it is for all the following interface expansion modules or functional units of the process, only one terminal device available, to which all are connected in parallel as shown in Fig.1. The output data DBO and DUO are always applied to all interface extension modules or functional units of the following address level as data DBII and DUH in parallel when the permission signal EN of the preceding address level, in FIG. 1 of the interface expansion module EBO, is active. In the dirirektionalen channel over

the terminals DBH to terminal DBO the input. Which of the connected interface expansion modules EB 1.1 to EB 1 .n receive the data or which data should be transmitted is determined by the permission signal EN at its input. According to the condition, only one interface expansion module or only one functional unit receives an active permission signal EN from the address decoder of the preceding address level. Only this interface expansion block or functional unit evaluates the data or sends input data when the direction signal R is inactive. If the permission signal of the interface expansion module EBO itself is inactive, none of the inputs ADRN1 to ADRNn of the address decoder DC is active in the interface expansion module EBO: There is no information transmission via the interface expansion module EBO and in particular none of the following interface expansion modules or Function units are activated.

The decoder DC in the interface expansion modules EB 1.1 to EB 1.n -in Figure 1, only EB 1.1 and EB 1.2 are shown is an address signal ADR2 is supplied, which again an output of each decoder can be active when its permission signal EN is active at the same time , The latter is the prerequisite at the same time only with an interface expansion module of the case. The address signal ADR2 may either be provided by a centralized assembly of the system or it may be taken from the prior address plane unidirectional output data DU0. The latter is expedient, because then a disturbance on the address lines ADR2 affects only a smaller group of interface extension modules or functional units. In addition, so that the property of many circuit series better met that can be connected to an output only a limited number of inputs. The effect of the signals OFF will be described with reference to FIG.

Fig. 2 illustrates an arrangement demonstrating the property of the interface according to the invention to be variable with respect to the data width.

EB 1 and EB 2 are interface expansion modules whose inputs EN and R are connected in parallel. They are both active at the same time and work simultaneously in the same direction of transmission. The following functional units FE1 and FE2 are supplied with data DB01, DB02, DU01 and DU02 by both interface expansion modules. You can enter data via DBOI and DBO2 if the direction signal R is inactive. Thus, the data width is doubled compared to FIG. 1 for the functional units FE1 and FE2. This can be continued by parallel work of further interface expansion modules.

In Fig. 2 it is assumed that the functional unit FE 3 has only a small information requirement. It is therefore only connected to the interface expansion module EB1.

Which of the functional units FE1 to FE3 is active is determined as shown in FIG. 1 by the address signal ADR at the address input of the interface expansion module EB1. The address decoder of the interface expansion module EB 2 remains unused.

FIG. 3 shows an arrangement with which it is shown how redundant systems can be realized with the interface according to the invention. The two interface expansion blocks EBX and EBY are connected in parallel on the output side. They supply the functional units FE4 and FE5 as well as other data, not shown in FIG. 3, with data or enable them to input data. However, the data lines DBIX and DUIX on the input side to the interface expansion blocks EBX and EBY on the one hand and DBIY and DUIY on the other hand differ. Although they transfer information with usually the same meaning, but over a different transmission path. Likewise, the address ADR with which the respective functional unit to be activated is selected and the permission signal EN are provided via two different paths. The outputs of the address decoders in the interface expansion blocks EBX and EBY, as well as their data outputs, are connected in parallel. Recall that any output of an address decoder can only provide a control signal when the OFF input is inactive. For the two control inputs for the output stages OFFX and OFFY, only one of them is inactive. If OFFX is inactive, the information transmission and addressing takes place via the channel with the index "X." The same applies to channel Y. If one of the two channels is disturbed, the information transmission can be continued via the other, in particular the paths X and Y is also connected to two different central control units It is expedient to provide the signal OFFY from channel X and vice versa In this way it is possible to switch off the other with the channel which is still functioning.

Claims (4)

1. Modular parallel interface in variably branched tree structure with extension modules, which contain one of the branching number of data channel inputs corresponding number of controllable driver stages, an address decoder and for bidirectional data channels a data direction logic, characterized in that all branches with uniform extension modules using separate address lines per extension level are realized, which are at outputs of the address decoder and that the inputs of the controllable driver stages of the further branches are connected in parallel. 2. Modular parallel interface according to item 1, characterized in that the controllable driver stages are tristate gates, a part of which has conjunctive-linking inputs. 3. Modular parallel interface according to item 1, characterized in that for larger data width more extension modules are connected to each other control side parallel. 4. Modular parallel interface according to item 1, characterized in that extension modules are connected in parallel on the process side for redundant systems.