DD231697A1 - ELECTRONIC TOTALIZER - Google Patents

Abstract

The invention relates to a circuit arrangement that can be used for a simple and fast electronic summation. The invention has for its object to provide an arrangement for electronic summation counting, which makes a distinction in the exact number even at the same time incoming pulses. The arrangement used for the realization is furthermore intended to allow further measuring tasks to be solved in various ways, such as limit value monitoring and triggering of alarm signals when certain values are reached or not achieved, which solve an automation of monitoring tasks. According to the invention, the object is achieved in that, on the basis of input memories which are activated at specific measuring times, the level of the input variable can be stored.

Description

Field of application of the invention

The invention relates to a circuit arrangement for an electronic totalizer, whose task area is characterized, the count of different pulse trains, in which the sum of the output pulses is required as an output variable.

Characteristic of the known technical solution

In the metrological detection of different pulse trains, in which the sum of the pulses delivered is interesting, the following methods are known:

1. The counting of each pulse train and subsequent summation by humans or by computer use, such. B. in the GDR PS 152644 set forth.

2. Direct coupling of all pulse trains to a counter, e.g. set out in the DDRPS 137391.

The disadvantage is that individual pulses can occur at the same time and thus counted only as a pulse.

Furthermore, in some DE OS such as OS 2529736, OS 24332396, OS 21407841 electronic summing and totalizer are known, but based on a different inventive solution principle and are too high in technical complexity.

In another known summation counter, according to US Patent 30728888, the received pulses, e.g. B. Watt hour counters, stored in specially designated storage units, with a memory unit is provided for each counter or channel. Again, the technical complexity is too high.

Object of the invention

The aim of the invention is that a simple and fast method for electronic sum counting are used

The invention has for its object to provide an arrangement for electronic summation, which makes a distinction into the exact number even with the same time incoming pulses.

The arrangement used for implementation should continue to allow as many other different types of measurement tasks to be solved, such as limit value monitoring and triggering of alarm signals when certain values are reached or not achieved, which triggers an automation of monitoring tasks.

Purpose of the invention is to make a simple summation of different pulse trains possible with a circuit arrangement and to exclude a suppression of individual pulses.

Explanation of the essence of the invention

According to the invention the object is achieved in that due to input memories, which are activated at certain measuring times, the level of the input variable can be stored. Due to the double number of input memories per measuring channel, which both store the input variable at different times, a statement can be made by means of a downstream equivalence circuit as to whether a signal level change has taken place during the measuring time. When changing the input level so logically a pulse edge must have been present, which leads a pulse to an event counter. By an appropriate Torung any number of measuring channels can be switched to an event counter, with an upper limit is given by the maximum clock frequency of the input memory with respect to the input signal frequency, it must be guaranteed that at least 2 samples of a measurement signal with maximum input frequency during a Meßzyklusses be taken have to.

Since this form of pulse edge detection leads to an apparent doubling of the input pulses, it is expedient to provide a reduction ratio of 2: 1.

embodiment

In the D-trigger (1) , the input-side signal level (H or L) is detected at the time of measurement t . At measurement time t ₂ , the input level of D-trigger (2) is detected:

The downstream equivalent circuit (3) outputs an impulse at an input level difference in connection with the gate (4). The downstream coaster (5) 2: 1 is necessary because each edge of the input signal gives a pulse, thus a pulse doubling must be compensated. The added counter (6) then detects the real amount of incoming pulses.

For each channel, an equivalent circuit is set up, which will be unlocked at the measuring times according to the pulse diagram (Figure 2) and summed behind the gate.

For the 1st half measuring cycle a suppression of the pulses is necessary, since the D-triggers can stand arbitrarily and thus can cause false impulses. This blanking is realized with the stop input. The sampling periods must be chosen so small that 2 samples can be taken at maximum input frequency.

Claims (2)

Invention claim: 1. Electronic totalizer consisting of several parallel D-triggers and this downstream equivalence and gate circuit, which in turn are arranged in the same arrangement in parallel and subsequently by coasters and pulse counter, characterized in that the level of the input signal for detecting the pulse edge at certain measuring times a measurement cycle is cached. 2. Electronic totalizer according to item 1, characterized in that an antivalence of the stored at different measurement times input signal level triggers a count pulse. For this 2 pages drawings