DD102251A5 - - Google Patents

Info

Publication number
DD102251A5
DD102251A5 DD166072A DD16607272A DD102251A5 DD 102251 A5 DD102251 A5 DD 102251A5 DD 166072 A DD166072 A DD 166072A DD 16607272 A DD16607272 A DD 16607272A DD 102251 A5 DD102251 A5 DD 102251A5
Authority
DD
German Democratic Republic
Application number
DD166072A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of DD102251A5 publication Critical patent/DD102251A5/xx

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/187Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/191Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using at least two different signals from the frequency divider or the counter for determining the time difference
DD166072A 1972-05-24 1972-10-06 DD102251A5 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CH768572A CH539978A (de) 1972-05-24 1972-05-24 Vorrichtung zur Regelung von Frequenz und Phase eines Oszillators

Publications (1)

Publication Number Publication Date
DD102251A5 true DD102251A5 (de) 1973-12-05

Family

ID=4329000

Family Applications (1)

Application Number Title Priority Date Filing Date
DD166072A DD102251A5 (de) 1972-05-24 1972-10-06

Country Status (10)

Country Link
US (1) US3805182A (de)
CA (1) CA977044A (de)
CH (1) CH539978A (de)
DD (1) DD102251A5 (de)
DE (1) DE2239994C3 (de)
FR (1) FR2185892B1 (de)
GB (1) GB1353720A (de)
IT (1) IT967354B (de)
NL (1) NL7210712A (de)
SE (1) SE376702B (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3895365A (en) * 1974-06-14 1975-07-15 Lockheed Electronics Co Shaft position encoder apparatus
US4075577A (en) * 1974-12-30 1978-02-21 International Business Machines Corporation Analog-to-digital conversion apparatus
US3983506A (en) * 1975-07-11 1976-09-28 International Business Machines Corporation Acquisition process in a phase-locked-loop by gated means
US4023116A (en) * 1976-07-08 1977-05-10 Fairchild Camera And Instrument Corporation Phase-locked loop frequency synthesizer
US4092604A (en) * 1976-12-17 1978-05-30 Berney Jean Claude Apparatus for adjusting the output frequency of a frequency divider
DE3726224A1 (de) * 1987-08-07 1989-02-16 Lancier Masch Peter Verfahren zur stabilisierung der ausgangsfrequenz eines spannungsgesteuerten oszillators sowie oszillator- und sensoreinrichtung, die nach dem verfahren arbeitet

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1379675A (fr) * 1963-08-08 1964-11-27 Labo Cent Telecommunicat Perfectionnements aux oscillateurs verrouillés en phase

Also Published As

Publication number Publication date
CH539978A (de) 1973-07-31
FR2185892A1 (de) 1974-01-04
FR2185892B1 (de) 1977-04-29
CA977044A (en) 1975-10-28
NL7210712A (de) 1973-11-27
SE376702B (de) 1975-06-02
US3805182A (en) 1974-04-16
GB1353720A (en) 1974-05-22
DE2239994B2 (de) 1974-07-25
IT967354B (it) 1974-02-28
DE2239994C3 (de) 1978-09-28
DE2239994A1 (de) 1973-12-06

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