CS180653B1 - Method of manufacturing of semiconducting arrangements - Google Patents

Method of manufacturing of semiconducting arrangements

Info

Publication number
CS180653B1
CS180653B1 CS7200006335A CS633572A CS180653B1 CS 180653 B1 CS180653 B1 CS 180653B1 CS 7200006335 A CS7200006335 A CS 7200006335A CS 633572 A CS633572 A CS 633572A CS 180653 B1 CS180653 B1 CS 180653B1
Authority
CS
Czechoslovakia
Prior art keywords
semiconducting
arrangements
manufacturing
semiconducting arrangements
Prior art date
Application number
CS7200006335A
Other languages
Czech (cs)
English (en)
Inventor
Kurt Drescher
Original Assignee
Kurt Drescher
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kurt Drescher filed Critical Kurt Drescher
Publication of CS180653B1 publication Critical patent/CS180653B1/cs

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H10P32/141—
    • H10P32/171—
    • H10P95/00—
CS7200006335A 1971-09-16 1972-09-15 Method of manufacturing of semiconducting arrangements CS180653B1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DD15775571 1971-09-16

Publications (1)

Publication Number Publication Date
CS180653B1 true CS180653B1 (en) 1978-01-31

Family

ID=5484328

Family Applications (1)

Application Number Title Priority Date Filing Date
CS7200006335A CS180653B1 (en) 1971-09-16 1972-09-15 Method of manufacturing of semiconducting arrangements

Country Status (4)

Country Link
CS (1) CS180653B1 (Direct)
DE (1) DE2238808A1 (Direct)
FR (1) FR2154479A1 (Direct)
HU (1) HU165229B (Direct)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI501292B (zh) * 2012-09-26 2015-09-21 財團法人工業技術研究院 形成圖案化摻雜區的方法

Also Published As

Publication number Publication date
FR2154479A1 (Direct) 1973-05-11
DE2238808A1 (de) 1973-03-22
HU165229B (Direct) 1974-07-27

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