CS180653B1 - Method of manufacturing of semiconducting arrangements - Google Patents
Method of manufacturing of semiconducting arrangementsInfo
- Publication number
- CS180653B1 CS180653B1 CS7200006335A CS633572A CS180653B1 CS 180653 B1 CS180653 B1 CS 180653B1 CS 7200006335 A CS7200006335 A CS 7200006335A CS 633572 A CS633572 A CS 633572A CS 180653 B1 CS180653 B1 CS 180653B1
- Authority
- CS
- Czechoslovakia
- Prior art keywords
- semiconducting
- arrangements
- manufacturing
- semiconducting arrangements
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
- H01L21/2255—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DD15775571 | 1971-09-16 |
Publications (1)
Publication Number | Publication Date |
---|---|
CS180653B1 true CS180653B1 (en) | 1978-01-31 |
Family
ID=5484328
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CS7200006335A CS180653B1 (en) | 1971-09-16 | 1972-09-15 | Method of manufacturing of semiconducting arrangements |
Country Status (4)
Country | Link |
---|---|
CS (1) | CS180653B1 (en) |
DE (1) | DE2238808A1 (en) |
FR (1) | FR2154479A1 (en) |
HU (1) | HU165229B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI501292B (en) | 2012-09-26 | 2015-09-21 | Ind Tech Res Inst | Method of forming patterned doped regions |
-
1972
- 1972-08-07 DE DE2238808A patent/DE2238808A1/en active Pending
- 1972-08-21 HU HUMO842A patent/HU165229B/hu unknown
- 1972-09-07 FR FR7231798A patent/FR2154479A1/fr not_active Withdrawn
- 1972-09-15 CS CS7200006335A patent/CS180653B1/en unknown
Also Published As
Publication number | Publication date |
---|---|
FR2154479A1 (en) | 1973-05-11 |
HU165229B (en) | 1974-07-27 |
DE2238808A1 (en) | 1973-03-22 |
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