CN87208590U - Intellectual chessboard system - Google Patents

Abstract

The utility model relates to electronic equipment, which is used for a chess match and a training. The electronic equipment is composed of a checkerboard with a switch matrix, chesses which can trigger the switch, and an analogue-digital conversion circuit which can convert a chess state to a data. The analogue-digital conversion circuit can realize the collection and the treatment of the status parameter of the chesses by a CPU or a single chip computer through the procedure; the status parameter of the chesses is converted to the digital quantity; a watching for a chess variation, a recording for a chess variation, a timekeeping for a chess variation, and a displaying for a chess variation are all achieved via transmitting the digital quantity into a computer. The utility model can further raise the level of chess games.

Description

Intellectual chessboard system

The utility model belongs to a kind of sports goods, specifically belongs to a kind of electronics that are applicable to board game or training.

Chinese chess and weiqi activity have extremely formal history of a specified duration in China, chess was also carried out in the last few years, because chess game is accompanied by the contention of wisdom and willpower, was subjected to liking of broad masses deeply, through successive generations's research and development, chess player's skill has developed very high level at present.Higher leveled match all is blood-and-thunder contention from beginning to finishing almost, and chess players are in the biotonus of height, and the mentality that is in search, comparison, innovation adds among the manual labor.Yet, even under so nervous occasion still otherwise the time suspended thinking chess manual that goes to note each step to stay valuable data, be beneficial to summing up experience or lesson, instruct later training.In addition, chess players want every next step to press the timing clock button toward contact, have both disperseed energy, may cause error again, sometimes even cause dispute, chess players are very fast in order to strive for think time speed when the record chess manual, clerical mistake easily, and the energy that costs a lot of money in the arrangement process afterwards.The work of this record, arrangement chess manual is just more a large amount of and loaded down with trivial details in daily training.In a word, highly developed electronic technology is compared obviously very inharmonious the equipment that is used for board game and modern times.

The purpose of this utility model promptly is a kind of intelligent chess-plate system of design, it and microcomputer are matched finish automatic record chess players to compete or train in the chess manual and time in per step, also can transmit the scene of match automatically, for chess players preserve a complete errorless technical information, chess players are concentrated on whole energy among the match, develop to higher level to promote chess game.

Basic design of the present utility model is that design is a kind of can each chess piece position of sensing, and can be converted into it the chess-plate system of digital signal.In this system, comprise three parts: the firstth, the chessboard sensor, be equipped with a switch (referring to Fig. 1) (or position transducer) on each position that may begin on the designed chessboard of the utility model, according to Chinese chess, the difference of go or chess requires to form a corresponding switch matrix like this.The secondth, chess piece (referring to Fig. 2) that can trigger switch is to realize the detection of this analog quantity of chess piece position.The structure fibrous root of chess piece is according to the classification and the model supporting design in addition of selected switch (or position transducer).When matrix switch is chosen electromagnetic type near switch, should be equipped with in the bottom of chess piece during as magnetic tongue tube and so on a magnet and or ferromagnetic material, when adopting contact electrode formula switch, should add a conductive metal sheet in the bottom of chess piece, when adopting mechanical switch, as microswitch, chess piece should guarantee that certain counterweight triggers to guarantee normal the pressure during piezoelectricity elastomeric switch etc.Also can adopt the change magnetic resistance, become capacitive approach switch, optoelectronic switch or the like.Whether utilize the state of switch to differentiate chess piece in a word puts in place.Third part is an analog to digital conversion circuit, and its effect is that the matrix switch state is converted into the binary data that computing machine can receive, and sends into computing machine with the form of serial (or parallel).Its cardinal rule is each chessboard to be begun locate coding, obtain one group of complete chess piece state array by certain sequence scanning then, send into computing machine, in computing machine, data are handled the relevant parameter that just obtains each step chess manual according to the software of finishing in advance, can note, also can simultaneously it be presented on the display screen and watch for audience or other relevant personnel scene.

Be the error prevent that the chess piece dislocation from causing, can be on chessboard be begun place's design a positive stop lug boss 4, the bottom of chess piece can be designed one and locate concave station 5, with accurate location, and prevents that accidental vibration etc. from causing the maloperation of computing machine.

How further specify the purpose of this utility model below in conjunction with accompanying drawing realizes:

Fig. 1 is a chessboard, the basic structure synoptic diagram of Fig. 2 chess piece, and wherein 1 is chessboard surface, and 2 is switch, and 3 is switch leads, and 4 is positioning boss, and 5 is spacing concave station, and 6 is bonding agent or other fixture, and 7 is magnet, conductor or mass, 8 is the chess piece body.

Fig. 3 is the basic logic block diagram of analog to digital conversion circuit.

Fig. 4 is the building-block of logic of chessboard reading circuit.

Fig. 5 is the building-block of logic of control circuit and serial line interface thereof, and the block diagram when wherein (a) is for application CPU is (b) for using the block diagram of single-chip microcomputer.

Fig. 6 is the embodiment electrical schematic diagram of an on off state reading circuit.

Fig. 7 is the embodiment electrical schematic diagram that an application CPU makees control circuit.

In fact chessboard part in the utility model is equivalent to the position transducer of a matrix form, we are referred to as the chessboard sensor, thereby the concrete scheme of being taked on checkerboard configuration is at the place of beginning a switch or position transducer to be set, so that the changes in distribution to each instantaneous chess piece is made a response, after software processes, be converted into corresponding chess manual.The selection of switch is diversified, as long as can realize switch state after beginning.Its selection principle is economical, durable, and is reliable, sensitivity.Like this, a complete chessboard just becomes a switch matrix.The variation that relies on off state can detect chess game exactly realizes the digital quantity transmission by analog to digital conversion circuit again.

The variation of on off state represents that promptly the variation of chess game will form new chess manual.The transmission of this variation relies on analog to digital conversion circuit to realize.Fig. 3 has promptly provided the logical design block diagram of this analog to digital conversion circuit.Wherein 4 is control circuit, press good order and the grouping of software design by its control chessboard reading circuit 10 every interval certain hour, all states in the substep sense switch matrix 11, finally be processed into one group of serial (or parallel) data and represent the immediate status parameter of chessboard, these parameters are by serial port 12(or parallel port) send into computing machine as the computing machine raw data.In microcomputer, according to these data, under the control of software kit, realize judging show, write down to be exactly the ten minutes nothing the matter.

One of design key of the present utility model is to choose suitable (on off state) reading circuit.What Fig. 4 provided promptly is the logic rendering of this circuit.Resemble very much a dynamic memor from block diagram.It is made up of a column selection logical address decoder 13 and a status register 14, the figure place of status register promptly is the number of every group of status switch, promptly each number that scans chessboard matrix unit, according to the specification of existing electronic devices and components and the concrete condition of different chess, the register figure place can be 1,4,8 rank address wire does not then choose different numbers according to register figure place and chess.As use eight bit register, and (being eight on off states of single pass), then Chinese chess needs 12 address wires, and go then needs 46-56 bar address wire, and chess then need 10 address wires.If the status register figure place is selected one, 4 or 12,16 then the columns design of address wire also will change accordingly.After address wire of the every gating of control circuit, one group of on off state parameter is converted to eight (or one, four) binary number sends into status register 14, preface cooperates the register of sending into step by step down in the control circuit (RAM) in due course, and sends into microcomputer by serial port (SIO) (or parallel port).

Control circuit is the another key of the utility model design, realize the analog to digital conversion of on off state amount by it, Fig. 5 has promptly provided the structured flowchart of control circuit, wherein (a) is the control circuit that adopts CPU, it stores the RAM of record data, the parallel interface PIO that links to each other with the on off state reading circuit by the EPROM of storage program, the serial port SIO that links to each other with micro computer, with and auxilliary element overlapped and formed.Control circuit also can select for use single-chip microcomputer to realize, because single-chip microcomputer has the accurate bidirectional interface of two group octets.Hardware circuit can be simplified greatly.By Fig. 5 (b) as can be seen single-chip microcomputer can directly be connected by eight accurate bidirectional interfaces with switch reading circuit 10, hardware circuit need only by-election has the EPROM of storage program, the RAM of storage record, and supporting latch (for example 373).Can realize that whole control function realize analog to digital conversion and the data of each scanning are sent into micro computer, thereby can simplify circuit greatly, more crucial is its good in anti-interference performance, and cost is low, stable performance.

For further specifying function of the present utility model, Fig. 6, Fig. 7 have provided one group of embodiment, and it is the electrical schematic diagram of the analog to digital conversion circuit when adopting Z-80CPU to make control circuit.That the on off state reading circuit adopts is 8 bit status registers (74LS273), the N bar column selection circuit passband that cooperates not gates (74LS04) to form by M eight bit address code translators (74LS138), M is that 2(is only logical with 12 column selections when being used for Chinese chess) get final product, it is logical to want M=7-8(to form the 46-56 column selection when being used for go).Per eight of the place's (being status switch) of beginning in the present embodiment is divided into one group, and every gating one row, the state that is about to related column are that binary number is sent in the status register 14 and deposited, and when data bus can take, (74LS244) sent data through triple gate.Every column selection like this is logical once promptly finishes patrolling and examining of one group of chessboard status switch.The data acquisition of scanning reflects the variation of chess game, and these group data can be kept in the RAM district, and can be sent to MICROCOMPUTER PROCESSING.Micro computer is judged the shift position of chess piece according to the variation of state parameter, thereby realizes modification, demonstration, the record of chess game.The flow chart of its pc control software is seen shown in Figure 8.

Fig. 9 is a complete control circuit figure, sample from switch matrix by its realization, and data are delivered in the micro computer by serial port handle, what wherein CPU adopted is the Z-80 chip, EPROM can adopt 2716, RAM adopts 6116, cooperates the SZO of Z-80, and PIO and relevant hardware are formed a practical control circuit.The logical address wire of column selection by Z-80PIO control chessboard reading circuit, and state parameter is sent into RAM and be delivered to microcomputer by the SZO mouth by data line DB0-DB7, this circuit can be controlled the record and the transmission of a plurality of chessboard reading circuits, only must add suitable content on control program and get final product.

After this chess-plate system input is used, the sportsman, the referee, trainer even television relay person and all kinds of staff can alleviate workload and tensity greatly, all energy all can concentrate on the chess game, verily finish supervision in fact by microcomputer, demonstration, record, all kinds of work such as time prompting, reradiated signal output, whenever the chess player has thought deeply a step chess crown, when chess piece makes a decision, micro computer according to number of scans promptly can immediate record under chess manual, note think time, demonstration new chess manual at that time or the like work.Fig. 9 is the constitutional diagram of the chess manual in certain match that represents on the computer display.Having the limit to be expressed as the time of black thinking among the figure, be white below, black both sides' accumulative total think time, represent below whiter side's previous step method.Thereby the level of competition and training is improved greatly, because microcomputer can be noted literal chess manual and reducible one-tenth collection of illustrative plates, training after then being very beneficial for, summary and teaching automatically.Figure 10 promptly is the complete chess manual of this match shown among Fig. 9.It almost is that end of match can be sent to the sportsman after one minute immediately, the coach, even in spectators' hand of each hobby chess.

In addition, can also utilize this chess-plate system, a large amount of data collections are preserved with the floppy disk form, provide the sportsman at any time to call research, thereby the utility model gets power apparatus for an extremely in the chess game modernization in fact.

Claims (10)

1, a kind of being used for competes or trains, intelligent chess-plate system with microcomputer or the supporting application of other display device, it is characterized in that having a chessboard for switch matrix, but the chess piece of trigger switch and the analog to digital conversion circuit that per step chess manual is converted to serial or parallel output formed.

2, according to the said intelligent chess-plate system of claim 1, it is characterized in that under the position that each is begun on the chessboard, being provided with a switch 2(or position transducer), specifically can adopt electromagnetic type or photo-electric or electrode contact or mechanical switch (or position transducer.）

3, according to claim 1 or 2 said intelligent chess-plate systems, it is characterized in that said chessboard can be the chessboard of Chinese chess, go or chess, chessboard is begun and is located to add the positive stop lug boss 4 of a high 1-3mm.

4,, it is characterized in that magnetic patch 7(or contact metal film or mass are equipped with in the bottom of chess piece according to the said intelligent chess-plate system of claim 1), the boss 4 that the bottom of chess piece can be made in location concave station 5 and the claim 3 matches.

5, according to the said intelligent chess-plate system of claim 1, it is characterized in that analog to digital conversion circuit by on off state reading circuit 10, control circuit 9 reaches with the serial data interface 12 of microcomputer or other display device to be formed.

6, according to the said intelligent chess-plate system of claim 5, it is characterized in that on off state reading circuit 10 is made up of address decoder 13 and status register 14, it is logical to carry out column selection by address decoder, realizes that by status register 14 1 or 4 or eight-digit binary number status word read.

7, according to claim 5 or 6 said intelligent chess-plate systems, it is characterized in that the address decoder in the on off state reading circuit 10 can form N column address strobe line by eight bit address code translators and not gate overlap joint, specifically can adopt 74LS138 and 74LS04 overlap joint, when choosing eight bit status registers, during specifically as 74LS273, as to be used for Chinese chess N be 12 row, and go N is 46-56 row, and chess N is 10 row.

8, according to the said intelligent chess-plate system of claim 5, it is characterized in that control circuit is by CPU15, the EPROM16 of control program is housed, the parallel interface 18 that RAM17 is connected with the on off state reading circuit, serial line interface 19 that links to each other with display device or microcomputer and auxiliary circuit element thereof are formed.

9, said according to Claim 8 intelligent chess-plate system is characterized in that CPU can adopt E-80 in the control circuit, and EPROM adopts 2716, and RAM adopts 6116, and serial line interface adopts E-80SIO, and parallel interface adopts the PZO of E-80.

10, according to the said intelligent chess-plate system of claim 5, it is characterized in that control circuit also can adopt single-chip microcomputer 20, the EPROM21 of control program is housed, the RAM22 of storage intermediate data, the serial line interface that is connected with microcomputer is formed, concrete single-chip microcomputer can adopt the arbitrary model in 48/49 series, for example 80C39.

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