CN86101082A - 浸渍阴极 - Google Patents

浸渍阴极 Download PDF

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CN86101082A
CN86101082A CN198686101082A CN86101082A CN86101082A CN 86101082 A CN86101082 A CN 86101082A CN 198686101082 A CN198686101082 A CN 198686101082A CN 86101082 A CN86101082 A CN 86101082A CN 86101082 A CN86101082 A CN 86101082A
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impregnated cathode
melting point
high melting
metal film
point metal
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CN86101082B (zh
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山本惠彦
田口贞宪
会田敏之
渡部勇人
川濑进
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Hitachi Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/515Insulating materials associated therewith with cavities, e.g. containing a gas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out

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  • Solid Thermionic Cathode (AREA)
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Abstract

本发明涉及一种浸渍阴极,其特点是在浸渍阴极颗粒表面至少有两层薄膜:下层是由如Os、Ru、Rh、Pd、Ir、Pt、Re、Mo、W、Ta等组成的高熔点金属薄膜;下层是含Sc2O3的高熔点金属层,并覆盖于下层之上。浸渍阴极颗粒是用电子发射材料浸渍难熔多孔主体而制成。本发明也涉及有此电极的电子管。此阴极表面有长时期稳定的低逸出功单原子层。

Description

本发明涉及一种浸渍阴极和电子管,特别是显示管和检波管,二者均使用所说的浸渍阴极;也涉及一种阴极,其表面有在特低温工作所要求的低逸出功的单原子层,以及使用这种阴极的电子管。
以往使用的低温工作的浸渍阴极(如日本专利公开№,154131/1983所述),其特点是在多孔的W和Sc2O3构成的主体上浸渍电子发射材料;阴极的表面有Ba、Sc和Os的单原子层,形成一低逸出功的表面。但是这种单原子层有如下的缺点:对热冲击或电子轰击不稳定;由于其非均匀分布,寿命较短;在低电场下电子发射性能衰减。
本发明的目的是提供一种浸渍阴极,该浸渍阴极有一低逸出功的单原子层,可以在较长时期内保持稳定并且阴极表面的功函数均匀。本发明的另一目的是提供使用这种阴极的电子管。
这种浸渍阴极和使用该阴极的电子管的特点是:浸渍阴极颗粒表面上至少附有两层薄膜,下层是高熔点金属薄膜,上层是含Sc2O3的高熔点金属层并将下层复盖着;浸渍的多孔阴极颗粒是将难熔的多孔主体用电子发射材料浸渍制成。
图1是本发明具体实施中的浸渍阴极横截面说明图。图2是本发明的阴极和常规低温工作的浸渍阴极电子发射性能的比较图。
本发明提供了一新结构的阴极,以形成对热冲击和电子轰击稳定并且均匀的单原子层,其法是用常规标准型的浸渍阴极(由电子发射材料浸渍难熔多孔主体制成)作为Ba源:在阴极表面上加高熔点金属薄膜以平滑表面;以及在高熔点金属薄膜上再加一层含Sc2O3的高熔点金属薄膜作为Sc和Os源。
常规的阴极表面上的含Ba、Sc和Os的单原子层是由Sc2O3(在浸渍时与电子发射材料不相作用)和多孔主体孔中扩散出来的Ba形成的,因而当Sc2O3不能连续供应时,单原子层则不复存在。另外,非反应性的Sc2O3存在量很小,难于控制。
在本发明中采用含Sc2O3的高熔点金属薄膜(如至少一个选自包括W、Mo、Ta、Tr、Os、Re、Ru、Rh、Pd和Pt的一组金属的薄膜)作为Sc2O3源,并且此薄膜的厚度要求10nm(毫微米)至1μm(微米)。
上述标准型的浸渍阴极的表面作为下层,其平均孔径为5μm。如果上述的金属薄膜直接在此表面上形成,将会产生一些困难:例如,Ba的供应趋于集中在薄膜的直接下方,薄膜的形成会不均匀。本发明提供的薄膜层置于所说的薄膜之下就可以阻止这种情况。一种高熔点的金属已足以形成这种下层薄膜,但最好是选自如Os、Re、Pt、Ru等的高熔点贵金属的至少一种金属,这类金属对电子发射材料的反应性较低。
在下层薄膜中也要有人工控制的微孔或裂隙,以形成能使Ba容易扩散至上层薄膜的结构。推荐的微孔孔径或裂隙宽度为10nm至2μm,最好是10nm至1μm。
对于钡源来说,除了上述标准型浸渍阴极外,也可用能像压制阴极供应Ba之类的材料。
下面以图1叙述本发明的一个典型例子。
图1为本发明的浸渍阴极横截面图解,图中1代表颗粒直径为1.4mm的阴极主体材料,由钨主体2构成,并以电子发射材料浸渍孔隙3,孔隙率为20至25%。电子发子材料是BaCO3、CaCO3和Al2O3的混合物,其克分子比为4∶1∶1,也可用不同的克分子比或在其中加入其它物质。除W外使用Mo、Ta、Re、Ru、Rh、Pd、Os、Ir、Pt的多孔主体或这些金属的合金也是适合的。
首先,将颗粒1插入钽杯4,然后将钽杯4用激光焊于钽管套5的内上部,也可用低温焊代替激光焊。由加热器7加热阴极颗粒1,加热器7是包以氧化铝的芯线6,装置在钽管套5内部的底部。这是作为Ba源的标准型的浸渍阴极。Ba的供应量视阴极颗粒被加热的温度而定,但也可改变电子发射材料的克分子比来调节或者在所说的主体材料中加Zr、Hf、Ti、Cr、Mn、Si和Al之类的活化剂来调节。
用厚度约为500nm的Os层(采用电子轰击加热)作为颗粒1表面的高熔点金属薄膜8。形成这层薄膜的材料,除Os外还有如Ru、Rh、Pd、Ir、Pt、Re等贵金属;如Mo、W和钽的高熔点金属以及这些物质的合金。适合的薄膜厚度为10nm至1μm。Sc2O3源是由含W和Sc2O3的薄膜9构成,厚度10nm至1μm,采用真空喷镀法形成,除W外,用Mo、Re、Ru、Rh、Pd、Os、Ir、Pe和Ta或者这些金属的合金也是适合的。此例中Sc2O3在W中的含量优先选用10%(重量),推荐选择范围为1至50%(重量)。
用这种阴极测定饱和电流密度,将5μS宽、重复周期为100Hz的高压脉冲加于一二极管构造的阳极,测定结果示于图2。图2中10代表阴极的发射特性,此阴极含10%(重量)的Sc2O3和约100nm厚的W薄膜9,Os薄膜8的厚度约为500nm。上述无薄膜8和9的常规阴极是与特性10一致的。但除去在5×10-5托的Ar气中喷镀的包括Ba、Sc和Os的单原子层以后,则特性降低,以11说明之。本发明的阴极几乎不产生电子发射衰减现象致使单原子层消失,如果阴极有一定程度的衰减,可在1150℃加热15分钟即可恢复特性(10)。另外,与未经平滑处理的阴极比较,此阴极的电子发射特性在低电场下有显著的改进。
根据所述,很明显,本发明有这样的效果:如果含Ba、Sc和Os(均为维持低功函数条件的主要因素)的单原子层破坏了,由于单原子层又重新形成,所以观察不到电子发射特性的衰减。如果其电子发射特性确有衰减,只要将阴极于1150℃加热大约15-30分钟,便有完整的单原子层形成,因而维持其长工作寿命和低温工作的特性。
再者,由于用高熔点金属薄膜的平滑处理改进了低电场下电子发射的衰减,将其应用于如显示管的各种电子管便产生了低温工作效应。

Claims (6)

1、一种浸渍阴极,其特征是在有电子发射材料浸渍难熔多孔主体形成的浸渍阴极表面上至少有两层薄膜:下层是高熔点金属薄膜;上层是含Sc2O3的高熔点金属薄膜,并复盖于下层薄膜之上。
2、根据权利要求1所述的浸渍阴极,其特征在于其中所说的高熔点金属薄膜至少是一种选自一组包括W、Mo、Ta、Re、Ru、Rh、Pd、Os、Ir和Pt的金属。
3、根据权利要求1或2所述的浸渍阴极,其特征在于其中所说的下层薄膜的厚度为10nm至1μm,上层薄膜厚度为10nm至1μm。
4、根据权利要求1所述的浸渍阴极,其特征在于其中所说的高熔点金属是有小孔或裂隙的,而所说的小孔的直径或裂隙宽度是在10nm至2μm范围内。
5、具有浸渍阴极的电子管,其特征是此浸渍阴极的制备是在浸渍阴极颗粒表面上至少有两薄膜:下层是高熔点金属薄膜;上层是含Sc2O3的高熔点金属薄膜,并复盖在下层之上,浸渍阴极颗粒是将电子发射材料浸渍难熔多孔主体而制成。
6、根据权利要求5所述的电子管,其特征在于其中浸渍阴极颗粒表面上的下层金属薄膜厚度为10nm至1μm,上层金属薄膜厚度为10nm至1μm。
CN86101082A 1985-02-08 1986-02-06 浸渍阴极 Expired CN86101082B (zh)

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JP60023085A JPS61183969A (ja) 1985-02-08 1985-02-08 電界効果トランジスタ
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102628136A (zh) * 2012-04-13 2012-08-08 北京工业大学 一种铼钨基阴极材料及其制备方法
CN109390195A (zh) * 2018-11-29 2019-02-26 北京工业大学 一种亚微米结构顶层含钪阴极及其制备方法

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KR100236101B1 (ko) * 1997-09-29 1999-12-15 김영환 반도체 소자 및 제조 방법
US8022489B2 (en) 2005-05-20 2011-09-20 Macronix International Co., Ltd. Air tunnel floating gate memory cell
KR100818287B1 (ko) * 2007-01-10 2008-03-31 삼성전자주식회사 폴리 실리콘의 형성방법, 이 폴리 실리콘을 구비하는 박막트랜지스터 및 그 제조방법
JP2008270641A (ja) * 2007-04-24 2008-11-06 Elpida Memory Inc 電界効果トランジスタ
JP2010080561A (ja) 2008-09-25 2010-04-08 Toshiba Corp 不揮発性半導体記憶装置

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102628136A (zh) * 2012-04-13 2012-08-08 北京工业大学 一种铼钨基阴极材料及其制备方法
CN102628136B (zh) * 2012-04-13 2014-02-26 北京工业大学 一种铼钨基阴极材料及其制备方法
CN109390195A (zh) * 2018-11-29 2019-02-26 北京工业大学 一种亚微米结构顶层含钪阴极及其制备方法

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CN86101082B (zh) 1988-12-28

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