CN2938208Y - Power supply sequence control device - Google Patents
Power supply sequence control device Download PDFInfo
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- CN2938208Y CN2938208Y CN 200620056472 CN200620056472U CN2938208Y CN 2938208 Y CN2938208 Y CN 2938208Y CN 200620056472 CN200620056472 CN 200620056472 CN 200620056472 U CN200620056472 U CN 200620056472U CN 2938208 Y CN2938208 Y CN 2938208Y
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Abstract
The utility model is a power supply sequence control device, which sets a power start sequence through a power management sequence control unit. The power management sequence control unit manages a voltage input unit and signals input by a start signal input unit through the power start sequence and frequency signals provided by a clock signal input unit, thereby making a voltage output unit and a start output unit output signals at an appropriate time. Then the signals will be sequentially transmitted to an electronic system (such as computer, cell phone, etc), so that the CMOS chips arranged by the electronic system can be sequentially start up, enabling a smoothly and normal operation of the electronic system.
Description
Technical field
The utility model refers to a kind of device of being convenient to set the power supply sequential control of changing an electronic system especially relevant for the power supply order controller.
Background technology
Evolution along with electronic equipment, more and more many demands are arranged, and need be on same circuit board with the chip design of various difference in functionalitys, for example: South Bridge chip, north bridge chips, display chip or wireless transmission chip, and the order that each core assembly sheet starts all has its special requirement, usually, the slip-stick artist is according to the standard on the databook of each chip, measure the order of each power initiation one by one, but cumbersome measuring process often allows the slip-stick artist step back, thereby the importance of having ignored the power supply sequence starting and having closed, so, will bring deadlock to using the electronic product of this circuit board, can't move smoothly or problem such as compatibility is not good, make the slip-stick artist carry out the engineering of debug again, and cause the risk of research and development, time rises and the unnecessary wasting of resources.
With microprocessor of new generation now, on-the-spot programmable gate array (Field Programmable GateArray, be called for short: FPGA), complicated programmable logic device (Complex Programmable Logic Device, be called for short: integrated circuit (IC) chip such as CPLD), its operating voltage not only is 5 volts or 3.3 volts, each manufacturer may be because different designed capacity or purposes, and the working power of integrated circuit (IC) chip is designed to 1.2 volts, 1.5 volt, 1.8 volt and 2.5 volts etc., and the integrated circuit (IC) chip starting sequence respectively there is its definition separately again.For example, there are some manufacturers to advise the core power supply of the integrated circuit (IC) chip of its production, its order that is activated must be activated earlier before some specific input/output devices are activated, yet the integrated circuit (IC) chip with identical function of other manufacturer then may be just opposite, so, more having increased the degree of difficulty of the power supply startup sequence control of assembly, also is a kind of reason that often allows the slip-stick artist step back.Therefore, for the slip-stick artist, if the power supply sequence list that does not have portion to put in order can be for reference, promptly can produce deadlock, can't move smoothly or problem such as compatibility, have a lot of time flowers in unnecessary debug, this not only can cause slip-stick artist's puzzlement, also can't promote the competitive edge of product.So as if simplifying and coming managing electrical power program in proper order in more humane mode, for deviser and company, this will be the key factor that reduces the research and development time and reduce the research and development risk.
Summary of the invention
Because aforesaid problem, the inventor is through the permanent research and experiment of making great efforts, and development and Design goes out a kind of power supply order controller finally, with by proposition of the present utility model, can contribute to some extent society.
For achieving the above object, the utility model has adopted following technical scheme: a kind of power supply order controller, this device can join with an electronic system, and the power management sequential control unit that this device is set, can be set a power supply startup sequence, a frequency signal that is provided according to this clock signal input block is provided, manage the signal that a set voltage input block of this this device and an enabling signal input block are imported, and make the set voltage output unit of this this device and start the output unit output signal that is in due course, be delivered to this electronic system in order, make the set chip of this electronic system start in order, so, this electronic system can come into operation smoothly.
Compared to prior art, the utility model can be changed the power supply order easily, and needn't can finish change easily with the metering system of wasting time and energy by increasing by an electronic installation.
For ease of to the purpose of this utility model, technical characterictic and effect thereof, do further understanding and understanding, for the embodiment conjunction with figs., be described in detail as follows now:
Description of drawings
Fig. 1 is a configuration diagram of the present utility model
Fig. 2 is the synoptic diagram of power management sequential control of the present utility model unit, input voltage unit, enabling signal input block
Fig. 3 is the synoptic diagram of detecting part of the present utility model
Fig. 4 is the synoptic diagram of microprocessor of the present utility model and input block, storage unit, transmission interface unit, connector unit and display unit
Embodiment
The utility model is a kind of power supply order controller, see also shown in Figure 1, this device includes a power management sequential control unit 10, one clock signal input unit 11, one voltage input block 12, one enabling signal input block 13, wherein a power supply startup sequence can be set in this power management sequential control unit 10, and these clock signal input block 11 available frequency signals, again, this device also is provided with a voltage output unit 14 and an enabling signal output unit 15, wherein this voltage output unit 14 and enabling signal output unit 15, can be according to this power supply startup sequence and this frequency signal, and the output signal that can be in due course, be delivered to an electronic system (as: computing machine in order, mobile phone etc.) set each chip, but make and make this electronic system come into operation smoothly normally by these chip sequential starts.
In a preferred embodiment of the present utility model, this voltage input block 12 can be imported the input voltage of a plurality of different magnitudes of voltage to this power management sequential control unit 10, and this enabling signal input block 13 is then imported a plurality of input enabling signals to this power management sequential control unit 10; The output voltage of the input voltage of 14 exportable these different magnitudes of voltage of coupling of this voltage output unit, the output enabling signal of these input enabling signals of the then exportable coupling of this enabling signal output unit 15.
In this embodiment, see also shown in Figure 2, but but still include an input detecting module 100, a programmed logic array module 101, a program delay circuit module 102, an output detecting module 103, a memory module 104, a sequential module 105 and a control module 106 in this power management sequential control unit 10, wherein this input detecting part 100 can be detected the voltage level of these input voltages and these enabling signals, in order to avoid this power management sequential control unit 10 receives wrong input voltage and enabling signal; But be somebody's turn to do programmed logic array module 101, join with this input detecting module 100, and after but logic state that should programmed logic array module 101 is defined, promptly finish the setting of this power supply startup sequence, make the order of these control module 106 these input voltages of control and these input enabling signals; But should program delay circuit module 102, but join with this programmed logic array module 101 and control module 106, make this control module 106 can be according to this power supply startup sequence, in order to set the output delay time of these input voltages and input enabling signal; But this output detecting module 103 with should join by program delay circuit module 102, but to receive and this input voltage that detecting is imported according to this output delay time from this program delay circuit module 102 and the voltage level of this enabling signal; And this tfi module 105 can read the frequency signal that this clock signal input block is provided, make this voltage output unit 14 and enabling signal output unit 15, can be according to this source boot sequence and this frequency signal, and the output signal that can be in due course is delivered to an electronic system in order.
And this control module 106 can receive the various power supply sequential control orders from the outside, and these power supply sequential control orders are stored in this memory module 104, this power management sequential control unit 10 can read these power supply sequential control orders by this control module 106, but define the logic state of this programmed logic array module 101, to finish the setting of this power supply startup sequence, make this control module 106 can be according to this power supply startup sequence, control the order of these input voltages and these input enabling signals, but and the output delay time of this program delay circuit module 102 of setting, read the frequency signal that this clock signal input block 11 is provided by this tfi module 105 again, make this control module 106 can be according to this frequency signal and power supply startup sequence, make that these input voltages and input enabling signal can be on the opportunitys of the best, be sent to this output detecting module 103 and carry out the detecting of the voltage level of this input voltage and this enabling signal, last output voltage and output enabling signal of being mated by this voltage output unit 14 and 15 outputs of enabling signal output unit again is to finish power initiation.
In this embodiment, see also shown in Figure 3, this input detecting module 100 and output detecting module 103 all are provided with a plurality of detecting parts 1000, these detecting parts 1000 comprise a voltage level comparator 1001, an one surging canceller 1002 and an error indicator 1003, wherein this voltage level comparator 1001 is joined with this surging canceller 1002 and error indicator 1003 simultaneously, and this voltage level comparator 1001 can receive from this voltage input block 12 one of them input voltage, or these enabling signal input block 13 one of them input enabling signals, this voltage level comparator 1001 and the equal reference voltage of magnitude of voltage that can receive the input voltage that receives according to it or import enabling signal, this voltage level comparator 1001 compares this input voltage and reference voltage, after maybe should importing enabling signal and reference voltage and comparing, if this input voltage conforms to reference voltage, maybe this input enabling signal conforms to reference voltage, then being sent to this surging canceller 1002 carries out after surging eliminates, but be sent to this programmed logic array module 101 again, carry out subsequent treatment, and if this input voltage does not conform to reference voltage, maybe this input enabling signal does not conform to reference voltage, then be sent to this error indicator 1003, the output error signal is so that suspend subsequent treatment.
In this embodiment, see also shown in Figure 2 again, but these programmed logic array modules 101 are provided with a plurality of logic gate arrays 1011, after the logic state of these logic gate arrays 1011 is defined respectively, but can constitute the input voltage that these programmed logic array modules 101 are mated or the boot sequence of input enabling signal, again, but but should be provided with a plurality of program delay circuit 1020 by program delay circuit module 102, but these program delay circuit 1020 mate a logic gate array 1011 respectively, but make these program delay circuit 1020 set according to the output delay time that the logic gate array 1011 that mates separately carries out respectively, so that these input voltages or input enabling signal are according to these output delay times, be transported to this output detecting module 103, after finishing detecting by this output detecting module 103 again, by the output signal of this voltage output unit 14 or enabling signal output unit 15 output these input voltages of coupling or input enabling signal.
In the utility model, see also shown in Figure 4, this device also includes a microprocessor 2 and an input block 3, the various power supply sequence control instructions that can import of this input block 3 wherein, after these power supply sequence control instructions are received by this microprocessor 2, again by this microprocessor 2 according to these power supply sequence control instructions, set the power supply startup sequence of this power management sequential control unit 10, so, when using different chips when this electronic system change design, can be according to the power supply sequence control instruction of changed content by the corresponding changed content of these input block 3 inputs, directly change this power supply startup sequence, to solve the control of conventional power source boot sequence, utilize logic gate assembly and the circuit reset on the circuit board, just can reach the power supply shortcoming of control smoothly.
Again, this device still can include a storage unit 4, one transmission interface unit 5, an a connector unit 6 and a display unit 7, wherein this storage unit 4 is joined with this microprocessor 2, after the various power supply sequence control instructions that this input block 3 is imported are received by this microprocessor 2, except that the boot sequence that can set this power management sequential control unit 10, this microprocessor 2 also can be stored in these power supply sequence control instructions in this storage unit 4, and make that this microprocessor 2 can be by the power supply sequence control instruction that reads this storage unit 4, be sent to this display unit 7 again, make this display unit 7 demonstrate these power supply sequence control instructions, so that the user utilizes this input block 3 to change the power supply sequence control instruction, again or, this microprocessor 2 can be by the power supply sequence control instruction that reads this storage unit 4, be sent to this transmission interface unit 5 again, convert this power supply sequence control instruction to unofficial biography data by this transmission interface unit 5 to transmission format protocol that should connector unit, outwards send out by this connector unit 6 again, so that with this unofficial biography data storing in the middle of another reservoir, with as Backup Data.
Again or, this connector unit 6 is from the outside unofficial biography data that receive, by this transmission interface unit 5 this unofficial biography data-switching is become corresponding power supply sequence control instruction again, at this moment, this microprocessor 2 is stored in this power supply sequence control instruction in this storage unit 4 again, and so, this microprocessor 2 where necessary, the power supply sequence control instruction that is stored in this storage unit 4 can be sent to this power management sequential control unit 10, in order to revise the boot sequence of power management sequential control unit 10.
By above-mentioned member as can be known, if this device is after adding an electronic installation, the slip-stick artist can change the power supply order easily, and needn't can finish change easily with the metering system of wasting time and energy, can reduce many research and development times and save development costs, and can allow product ask the city apace, solve the shortcoming of prior art fully.
The above only is the utility model preferred embodiment wherein, is not to be used for limiting practical range of the present utility model; Be that all equalizations of being done according to the utility model claim change and modification, be all the utility model claim and contain.
Claims (7)
1, a kind of power supply order controller is characterized in that, this device comprises:
One clock signal input unit can produce frequency signal;
One voltage input block, this voltage input block can provide the input voltage of a plurality of different magnitudes of voltage;
One enabling signal input block, this enabling signal input block then provides a plurality of input enabling signals;
One voltage output unit, the output voltage of the input voltage of the different magnitudes of voltage of this voltage input block of the exportable coupling of this voltage output unit;
One enabling signal output unit, the output enabling signal of these input enabling signals of the then exportable coupling of this enabling signal output unit;
One power management sequential control unit, this power management sequential control unit can be set a power supply startup sequence, make it can be according to this power supply startup sequence and this frequency signal, control the signal that this voltage input block and enabling signal input block are imported, and make this voltage output unit and start the output unit output signal that is in due course, be delivered to an electronic system in order.
2, power supply order controller according to claim 1 is characterized in that, comprises in this power management sequential control unit:
One control module, this control module can receive the various power supply sequential control orders from the outside, and this control module reads these power supply sequential control orders, to set the power supply startup sequence order of these input voltages and these input enabling signals;
One memory module is joined with this control module, to store these power supply sequential control orders;
One imports detecting module, can detect the voltage level of this input voltage and this input enabling signal;
A but programmed logic array module, join with this input detecting module, after but the logic state of being somebody's turn to do the programmed logic array module is defined, promptly finish the setting of this power supply startup sequence, make this control module control the order of these input voltages and these input enabling signals;
But a program delay circuit module, but join with this programmed logic array module and control module, make this control module can be, in order to set the output delay time of these input voltages and input enabling signal according to this power supply startup sequence;
One output detecting module, but join with this program delay circuit module, but to receive and this input voltage that detecting is imported according to this output delay time from this program delay circuit module and the voltage level of this enabling signal;
One sequential module, this tfi module can read this frequency signal, makes this voltage output unit and starts output unit, can be according to this source boot sequence and this frequency signal, and the output signal that can be in due course is delivered to this electronic system in order.
3, power supply order controller according to claim 2 is characterized in that, this input detecting module and output detecting module all are provided with a plurality of detecting parts, and these detecting parts comprise:
One voltage level comparator, this voltage level comparator can receive from this one of them input voltage of voltage input block, or one of them input enabling signal of this enabling signal input block, this voltage level comparator and the equal reference voltage of magnitude of voltage that can receive the input voltage that receives according to this voltage level comparator or import enabling signal;
One surging canceller, join with this voltage level comparator, and can receive from this voltage level comparator this input voltage and reference voltage are compared, after maybe should importing enabling signal and reference voltage and comparing, conform to reference voltage at this input voltage, the signal under this input enabling signal and the state that reference voltage conforms to maybe, and carry out after surging eliminates, but be sent to this programmed logic array module again, carry out subsequent treatment;
One error indicator, join with this voltage level comparator, and can receive from this voltage level comparator this input voltage and reference voltage are compared, after maybe should importing enabling signal and reference voltage and comparing, do not conform to reference voltage at this input voltage, this input enabling signal and the reference voltage signal under the state that do not conform to maybe is in order to the output error signal.
4, power supply order controller according to claim 2, it is characterized in that, but these programmed logic array modules are provided with a plurality of logic gate arrays, after these logic gate arrays are defined, but constitute the input voltage that these programmed logic array modules are mated or the enable logic order of input enabling signal.
5, power supply order controller according to claim 4, it is characterized in that, but but should be provided with a plurality of program delay circuit by the program delay circuit module, but these program delay circuit mate a logic gate array respectively, but but make these program delay circuit according to the programmed logic array of mating separately, carry out the setting of output delay time, and these input voltages or input enabling signal are according to these output delay times, be transported to this output detecting module, after finishing detecting by this output detecting module again, by the output signal of this voltage output unit or these input voltages of enabling signal output unit output coupling, or the output enabling signal of coupling input enabling signal.
6, power supply order controller according to claim 1 is characterized in that, this device also comprises:
One input block, this input block can be imported various power supply sequence control instructions;
One microprocessor, this microprocessor can receive these power supply sequence control instructions, and according to these power supply sequence control instructions, set the boot sequence of this power management sequential control unit.
7, power supply order controller according to claim 6 is characterized in that, this device also can comprise:
One storage unit, join with this microprocessor, after the various power supply sequence control instructions that this input block is imported are received by this microprocessor, except that the boot sequence that can set this power management sequential control unit, this microprocessor also can be stored in these power supply sequence control instructions in this storage unit;
One display unit, join with this microprocessor, this microprocessor can be by the power supply sequence control instruction that reads this storage unit, be sent to this display unit again, make this display unit demonstrate these power supply sequence control instructions, so that the user utilizes this input block to change the power supply sequence control instruction;
One transmission interface unit joins with this microprocessor and this connector unit, and this transmission interface unit can receive this microprocessor by the power supply sequence control instruction that this storage unit read, and converts this power supply sequence control instruction to unofficial biography data;
A connector unit joins with this transmission interface unit, and can receive these unofficial biography data and transmit to the outside, and can by this transmission interface unit this unofficial biography data-switching be become corresponding power supply sequence control instruction again from the outside unofficial biography data that receive.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200620056472 CN2938208Y (en) | 2006-03-20 | 2006-03-20 | Power supply sequence control device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200620056472 CN2938208Y (en) | 2006-03-20 | 2006-03-20 | Power supply sequence control device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN2938208Y true CN2938208Y (en) | 2007-08-22 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200620056472 Expired - Lifetime CN2938208Y (en) | 2006-03-20 | 2006-03-20 | Power supply sequence control device |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101387901B (en) * | 2007-09-10 | 2010-11-24 | 英业达股份有限公司 | Multi-voltage supply apparatus for considering power starting sequence and power supply enabling circuit thereof |
| CN103135728A (en) * | 2011-11-29 | 2013-06-05 | 英业达股份有限公司 | Control method for switch on of power source and system for switch on of power source |
| CN107978275A (en) * | 2018-01-19 | 2018-05-01 | 昆山国显光电有限公司 | Control signal transmission circuit and method |
-
2006
- 2006-03-20 CN CN 200620056472 patent/CN2938208Y/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101387901B (en) * | 2007-09-10 | 2010-11-24 | 英业达股份有限公司 | Multi-voltage supply apparatus for considering power starting sequence and power supply enabling circuit thereof |
| CN103135728A (en) * | 2011-11-29 | 2013-06-05 | 英业达股份有限公司 | Control method for switch on of power source and system for switch on of power source |
| CN107978275A (en) * | 2018-01-19 | 2018-05-01 | 昆山国显光电有限公司 | Control signal transmission circuit and method |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term |
Granted publication date: 20070822 |
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| EXPY | Termination of patent right or utility model |