CN2922324Y - Video service device - Google Patents
Video service device Download PDFInfo
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- CN2922324Y CN2922324Y CNU2006201133124U CN200620113312U CN2922324Y CN 2922324 Y CN2922324 Y CN 2922324Y CN U2006201133124 U CNU2006201133124 U CN U2006201133124U CN 200620113312 U CN200620113312 U CN 200620113312U CN 2922324 Y CN2922324 Y CN 2922324Y
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Abstract
The utility model relates to a flush type video service device which solves core problems such as compression and transmission of video signal in network video monitoring and adopts a dual core chip proposal of a reduced instruction central processing unit (CPU) and a digital signal processor (DSP). The video service device consisting of a cabinet, an integrated circuit motherboard and an external power source is characterized in that: on the integrated circuit motherboard, the reduced instruction CPU (homemade ARCA or MIPS) and the DSP (TMS320DM642) are connected through a PCI bus and the CPU and the DSP have each a synchronous dynamic RAM; the CPU is connected with a flash, an audio coding and decoding output interface chip, an Ethernet interface chip and a serial port interface chip; and the DSP is connected with a Video coding/decoding interface chip and an audio coding/decoding input interface chip. The video service device mainly used for network video monitoring can be applicable for trades needing network video monitoring at any time such as bank, traffic and electric power.
Description
One, technical field
The utility model relates to the embedded network video server (Network Video Server is abbreviated as NVS) that a kind of security protection industry network field of video monitoring is adopted.This video server can be widely used in government, bank, factory, security, traffic, waterpower, electric power, telecommunications, army, prison, school, hospital, intelligent residential district, oil field, factory and other has the industry of real-time network video monitoring demand.
Two, background technology
Along with computer hardware and software technology rapid development, the video/audio treatment technology has been obtained synchronous development and has been used widely in every work and sphere of life, for people provide transmission platform and multiple input, processing and output means efficiently.Adopt the supervisory control system of advanced multimedia technology, because of can be in real time, image, reflect and become one of important technical of modern management, monitoring, control gradually by monitored Properties of Objects truly.The Internet video technology is as a kind of advanced person's multimedia technology, and one of them main focus is exactly the embedded digital video monitoring system.In the prior art, the embedded remote video monitoring system all adopts special chip basically, often can only handle the single channel vision signal.The utility model has been adopted a kind of design concept that is different from prior art fully, makes digital signal processing chip can realize the compression processing of multi-channel video signal, has greatly satisfied requirements of different users.
Three, summary of the invention
For solving the problem of the existing video server of existing market at aspects such as power consumption, video qualities, the utility model adopts the central processing unit (CPU) and Digital Signal Processing (DSP) the double-core chip solution of reduced instruction set, control by CPU, carry out Signal Compression by DSP and handle.This utility model has realized H.264 video compression standard, the embedded video server that makes a single dsp chip is the video of Real Time Compression as many as three road CIF (352 * 288) precision and one road D1 (704 * 576) precision simultaneously, the power consumption and the cost of video server are declined to a great extent, and the way of performance and single device support significantly rises.Also increased serial interface, jtag interface, warning input/output interface in addition, made more perfect function.
The technical solution adopted in the utility model is:
(1) adopt reduced instruction CPU, as No. 2, Noah's ark, MIPS, its dominant frequency can reach 400MHz, and the CPU chip integration has become serial ports, AC97 interface, pci interface, 10M/100M Ethernet interface, USB interface, universaling I/O port, dma controller;
(2) adopt high-performance, low-power consumption dsp chip, as TMS320DM642, strengthen the disposal ability of master chip, its dominant frequency can reach 600MHz, supports the input of 4 road audio frequency and 4 road videos, output;
(3) adopt the high-performance video capture processor, reduce cost and improve the vision penetrability of vision signal;
(4) adopt high-performance audio collection chip, support multiplexed and reduce cost;
(5) adopt high-speed synchronous dynamic random access memory (SDRAM) chip, improve inside and outside deposit data exchange velocity.
(6) video coding/decoding interface chip is directly linked to each other with four video input signals binding posts (BNC).
(7) the audio coding/decoding input interface chip is directly linked to each other with four audio input signal binding posts (BNC).
As shown in drawings, DSP is connected with CPU by pci bus; CPU and DSP be external SDRAM separately respectively; Flash memory, audio coding/decoding and output interface chip, Ethernet interface chip and serial interface chip directly link to each other with CPU; Video coding/decoding interface chip and audio coding/decoding input interface chip directly link to each other with DSP.In this manner these chips are coupled together, can realize the function of this utility model, and improve performance greatly.
The critical piece function of video server described in the utility model is as described below: dsp chip is a Media Processor, and its function is that audio-video signal operation compression is handled, and supporting peripheral various interface; The synchronous DRAM chip is a system storage, is used for the dsp operation program and handles audio-video signal, and its storage speed is more than 100M; The function of video coding/decoding chip is four road video analog signals are transformed to digital signal, send DSP to handle; The function of audio coding/decoding chip is four road audio analog signals are transformed to digital signal, send DSP to handle.
The operation principle of video server described in the utility model is as follows: at first by analogue audio frequency and the video signal digitization of audio frequency and video coding/decoding module with input, digitized signal is sent to DSP and compresses processing, and the vision signal after the compression is sent to far-end for user's real time monitoring and preservation by network.
Four, description of drawings
Fig. 1 is that circuit links block diagram in the surface-mounted integrated circuit of the present utility model.
The utility model is made up of cabinet, surface-mounted integrated circuit and external power supply. Wherein surface-mounted integrated circuit is pacified Be contained in the cabinet the external power supply of cabinet. As shown in drawings, described surface-mounted integrated circuit comprises: the side No. 2 central processing units of boat (CPU) (1), TMS320DM642 digital signal processor (DSP) (2), The synchronous DRAM of CPU (3), flash memory (4), serial ports (RS232, RS485) The synchronous DRAM (7) of interface (5), Ethernet interface (6), DSP, video coding/decoding interface (8), audio frequency coding/decoding input interface (9) and audio frequency coding/decoding output interface (10). DSP passes through pci bus Be connected with CPU; CPU and DSP be external SDRAM separately respectively; Flash memory, audio frequency coding/decoding Directly link to each other with CPU with output interface chip, Ethernet interface chip and serial interface chip; Video Coding/decoding interface chip and audio frequency coding/decoding input interface chip directly link to each other with DSP.
Five, embodiment
Video server described in the utility model is made up of cabinet, surface-mounted integrated circuit and external power supply, and described surface-mounted integrated circuit comprises: CPU, DSP, synchronous DRAM (SDRAM), flash memory, video coding/decoding chip, audio coding/decoding chip, Ethernet interface chip, serial ports (RS232, RS485) interface chip, jtag interface, warning input/output interface, real-time timepiece chip, serial electrically-erasable read-only memory and level translator.As shown in drawings, DSP is connected with CPU by pci bus; CPU and DSP be external SDRAM separately respectively; Flash memory, audio coding/decoding and output interface chip, Ethernet interface chip and serial interface chip directly link to each other with CPU; Video coding/decoding interface chip and audio coding/decoding input interface chip directly link to each other with DSP.Video coding/decoding interface chip is directly linked to each other with four video input signals binding posts (BNC).The audio coding/decoding input interface chip is directly linked to each other with four audio input signal binding posts (BNC).
The beneficial effect of video service described in the utility model is that single dsp chip is supported four road CIF precision Video and four tunnel audio compressions and network remote real-time monitor and preservation, support online with one road CIF Precision switches to the D1 precision and carries out long-range fine definition supervision. The total power consumption of a described video server Less than 10 watts. Compare with the conventional video server, under the video server manufacturing cost of the present utility model Fall more than 30%.
Claims (7)
1. video server, this video server is made up of cabinet, surface-mounted integrated circuit and external power supply, it is characterized in that described surface-mounted integrated circuit comprises: the synchronous DRAM of central processing unit (CPU), digital signal processor (DSP), CPU and DSP, flash memory, video coding/decoding interface chip, audio coding/decoding input and output interface chip, Ethernet interface chip and serial ports (RS232 and RS485) interface chip, wherein DSP is connected with CPU by pci bus; The synchronous DRAM of CPU and DSP links to each other with DSP with CPU respectively; Flash memory, audio coding/decoding and output interface chip, Ethernet interface chip and serial interface chip link to each other with CPU; Video coding/decoding interface chip, audio coding/decoding input interface chip link to each other with DSP.
2. video server according to claim 1 is characterized in that described central processing unit is No. 2 central processing units of Noah's ark.
3. video server according to claim 1 is characterized in that described central processing unit is the MIPS central processing unit.
4. video server according to claim 1, it is characterized in that described DSP chip is a Media Processor, its model is TMS320DM642, and its function is audio-video signal operation compression is handled, and peripheral various interface is supported.
5. video server according to claim 1 is characterized in that described synchronous DRAM chip is a system storage, and it is used for the digital signal processor working procedure and handles audio-video signal, and storage speed is more than 100M.
6. video server according to claim 1 is characterized in that described video coding/decoding interface chip links to each other with four video input signals binding posts (BNC).
7. video server according to claim 1 is characterized in that described audio coding/decoding input interface chip links to each other with four audio input signal binding posts (BNC).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2006201133124U CN2922324Y (en) | 2006-04-28 | 2006-04-28 | Video service device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2006201133124U CN2922324Y (en) | 2006-04-28 | 2006-04-28 | Video service device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN2922324Y true CN2922324Y (en) | 2007-07-11 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNU2006201133124U Expired - Fee Related CN2922324Y (en) | 2006-04-28 | 2006-04-28 | Video service device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN2922324Y (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102098425B (en) * | 2009-12-15 | 2013-03-20 | 上海威乾视频技术有限公司 | Microminiature digital video monitoring module |
| CN111010531A (en) * | 2019-10-15 | 2020-04-14 | 北京凯斯隆机电技术开发有限公司 | Simplified video monitoring system integrating product video acquisition, processing and network communication |
-
2006
- 2006-04-28 CN CNU2006201133124U patent/CN2922324Y/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102098425B (en) * | 2009-12-15 | 2013-03-20 | 上海威乾视频技术有限公司 | Microminiature digital video monitoring module |
| CN111010531A (en) * | 2019-10-15 | 2020-04-14 | 北京凯斯隆机电技术开发有限公司 | Simplified video monitoring system integrating product video acquisition, processing and network communication |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C56 | Change in the name or address of the patentee |
Owner name: BEIJING TAIKESHANG ELECTRONIC TECHNOLOGY CO., LTD. Free format text: NEW ADDRESS: ROOM 103, CHUANGYE PLAZA, NO.2, JINGSHUYUAN ROAD, HAIDIAN DISTRICT, BEIJING CITY, ZIP CODE:100083 |
|
| CP02 | Change in the address of a patent holder |
Address after: Room 103, pioneer Plaza, 2 Jing Shu Yuan Road, Beijing, Haidian District, China: 100083 Patentee after: Taikeshang Electronic Science & Technology Co., Ltd., Beijing Address before: B208 building, Tsinghua University, Beijing, Haidian District, 100084 Patentee before: Taikeshang Electronic Science & Technology Co., Ltd., Beijing |
|
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20070711 Termination date: 20100428 |