CN2842931Y - High-speed multi-picture multi-screen fased displaying treatment apparatus - Google Patents
High-speed multi-picture multi-screen fased displaying treatment apparatus Download PDFInfo
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- CN2842931Y CN2842931Y CN 200520042049 CN200520042049U CN2842931Y CN 2842931 Y CN2842931 Y CN 2842931Y CN 200520042049 CN200520042049 CN 200520042049 CN 200520042049 U CN200520042049 U CN 200520042049U CN 2842931 Y CN2842931 Y CN 2842931Y
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Abstract
The utility model relates to a kind of display processing unit for syncretizing multiple frames and multiple screens in high speed, comprises at least more than one video signal source; Also comprise a preceding level processor, level processor after; Level processor comprises a prime central processing unit before described, and at least more than one prime input card is with corresponding at least more than one prime output card of prime input card; Level central processing unit after described back level processor comprises one, at least more than one back level input card is with corresponding at least more than one back level output card of back level input card; Since with various data allocations to be processed given different modules, improved processing speed; On a processor, can show 2-8 road signal source, and can guarantee that the high-speed real-time of each road signal shows; More if desired picture shows simultaneously, only needs a plurality of backs level to carry out cascade, and perhaps prime cooperates the back level to carry out layer connection, just can enlarge the quantity of I/O channel, satisfies various demands.
Description
Technical field
The utility model relates to a kind of video display processing unit, relates in particular to a kind of large-screen display processing unit for syncretizing multiple frames and multiple screens.
Background technology
Hard-edge splicing series products is called video wall splicer, TV wall controller again, show wall controller, combination controller, multi-screen processor, multi-screen splicing processor, show that wall splicer, large-screen processor, number splice processor, multi-screen presentation manager, show the wall processor, major function is to distribute to N video display unit (as the rear-projection unit) after a complete picture signal is divided into the N piece, finishes with a plurality of ordinary video unit and forms a jumbotron dynamic image display screen.Insert when can support various video equipment, as: DVD, video camera, satellite receiver, set-top box, standard computer a-signal.The video wall processor can realize that the output of a plurality of physics is combined into a ultrahigh resolution after the resolution stack and shows output, make screen wall constitute a ultrahigh resolution, super brightness, super large display size the logic display screen, finish a plurality of signal sources (network signal, rgb signal and vision signal) windowing on screen wall, move, the Presentation Function of variety of way such as convergent-divergent; But the hard-edge splicing has obvious cut-off rule (being usually said physics piece), and it is integrated to reach panorama, can not realize real degree of depth third dimension.
The solution of lap splice series products part the gap problem of hard-edge splicing, promptly the picture of two projecting apparatus overlaps, but does not do the light processing of advancing to fade out; Though this lap splice does not have the physics splicing seams, the brightness of lap is 2 times of view picture remainder, and showing as lap on display effect is a bright wisp; When the series products release is merged on soft limit, just be eliminated at once.
It is seamless spliced soft limit integration technology that series products is merged on soft limit; Initial is mainly used in the large screen projection visualization systems such as virtual emulation and virtual reality, in recent years, development along with software and hardware technology, seamless spliced technology has been widely used in commander's control, virtual emulation training, industrial designing for manufacturing, scientific research and complex decision process, and becomes more and more popular in the application of display and demonstration, advertisement, entertainment field.
Seamless spliced be a kind of special, require than higher projection display applications, it not only requires super large, a complete width of cloth screen, all used projections also have specific (special) requirements to projection oversize picture.The user both can select the projector of producer's special use, also can select general projector, cooperated seamless spliced application specific processor to realize seamless spliced effect.
As seen from Figure 1: existing display processing unit takes single device to finish splicing usually: various input equipments are (as DVD, VCD, real-time photography is first-class) by input card analog video signal is transformed into digital data transmission to central processing unit, central processing unit receives the vision signal of a large amount of not process codings (as the real-time CIF signal of 25 frames, data volume approximately is every road video per second 352*288*25*3=7.6M Bytes=60M bits), (4 road video per seconds will carry out the video data typing of 240M bits in the video fusion of central processing unit realization multipath input data, and utilize processor to carry out real-time amalgamation), and finish the cutting output of view picture video, flow to each output card respectively.Whole process takies great bus bandwidth and processor resource, for the quantity of quantity that will increase input card and output card, all is the very big test to the overall system load.Like this, certainly will make system can not hold more picture, and the processing speed that influences system greatly.
Because above-mentioned processing makes that the edge fusion treatment function ratio on the existing market is more single, basically all be on whole large-screen, only to show a picture, processor has only been done and has been melted the limit treatment technology, and all do not relate to for common functions such as many picture demonstrations, display mode setting, the switchings of multiwindow signal, greatly limited the fusion treatment The Application of Technology.
Summary of the invention
The utility model technical issues that need to address have provided a kind of display processing unit for syncretizing multiple frames and multiple screens in high speed, are intended to solve above-mentioned defective.
In order to solve the problems of the technologies described above, the utility model is achieved through the following technical solutions:
The utility model comprises at least more than one video signal source; Also comprise a preceding level processor, level processor after; Level processor comprises a prime central processing unit before described, and at least more than one prime input card is with corresponding at least more than one prime output card of prime input card; Described video signal source links to each other with the prime input card, the prime input card by built-in CPU with the vision signal source data of handling: comprise that S-Video signal, composite video signal or rgb signal are through DMA (internal storage access technology immediately, be that video data is transmitted without CPU, directly duplicate to destination device by bus) export to the prime output card; The three source look video datas that described prime output card will be handled by built-in CPU:, then export general split screen signal if directly give output equipment; If export to the back level processor, then output back level processor needs the vision signal of edge fusion; Level central processing unit after described back level processor comprises one, at least more than one back level input card is with corresponding at least more than one back level output card of back level input card; Level input card in back receives the data of prime output card output and the video data of handling is carried out the edge fusion treatment or directly links to each other with video signal source by built-in CPU: comprise S-Video signal, composite video signal or rgb signal level input card through DMA is transferred to after, after a grade input card link to each other with output equipment; Described prime central processing unit is handled network control signal and video input sync signal data and is passed through bus transfer; Described back level central processing unit is handled the edge and is merged control signal and input-output card synchronization signal data and pass through bus transfer.
Compared with prior art, the beneficial effects of the utility model are: since with various data allocations to be processed given different modules, improved processing speed; On a processor, can show 2-8 road signal source, and can guarantee that the high-speed real-time of each road signal shows; More if desired picture shows simultaneously, only needs a plurality of backs level to carry out cascade, and perhaps prime cooperates the back level to carry out layer connection, just can enlarge the quantity of I/O channel, satisfies various demands.
Description of drawings
Fig. 1 is the display processing unit module map of prior art;
Fig. 2 is a module map of the present utility model;
Fig. 3 is a prime module map among Fig. 2;
Fig. 4 is a level module map in back among Fig. 2;
Embodiment
Below in conjunction with accompanying drawing and embodiment the utility model is described in further detail:
By Fig. 2, Fig. 3, Fig. 4 as seen: the utility model comprises at least more than one video signal source; Also comprise a preceding level processor, level processor after; Level processor comprises a prime central processing unit before described, and at least more than one prime input card is with corresponding at least more than one prime output card of prime input card; Described video signal source links to each other with the prime input card, the prime input card by built-in CPU with the vision signal source data of handling: comprise that S-Video signal, composite video signal or rgb signal are through DMA (internal storage access technology immediately, be that video data is transmitted without CPU, directly duplicate to destination device by bus) export to the prime output card; The three source look video datas that described prime output card will be handled by built-in CPU:, then export general split screen signal if directly give output equipment; If export to the back level processor, then output back level processor needs the vision signal of edge fusion; Level central processing unit after described back level processor comprises one, at least more than one back level input card is with corresponding at least more than one back level output card of back level input card; Level input card in back receives the data of prime output card output and the video data of handling is carried out the edge fusion treatment or directly links to each other with video signal source by built-in CPU: comprise S-Video signal, composite video signal or rgb signal level input card through DMA is transferred to after, after a grade input card link to each other with output equipment; Described prime central processing unit is handled network control signal and video input sync signal data and is passed through bus transfer; Described back level central processing unit is handled the edge and is merged control signal and input-output card synchronization signal data and pass through bus transfer;
Level processor and back level processor can overlap more in cascade before described;
Described prime input card is a Trimedia TM1500 chip, and described prime output card is the TIDM642 chip, and described back level input card is a Trimedia TM1500 chip, and described back level output card is a TI DM642 chip;
Prime of the present utility model and back level are all supported the conventional video source, and system's prime is the network enabled video source more, and the back level merges in order to support the edge, and prime, back level are all supported the cascade of many covers, at last by the unified output of output equipment.
In order to realize many pictures and farthest to improve processing speed, add in the every input card and handle core, every input card as individual processing, is directly passed to the data of input output card by DMA then and the data of preliminary treatment is passed to the back level do follow-up edge fusion treatment; The prime central processing unit is only handled the transmission (very little data volume) of video source and the coordination of all input-output cards, the fewer work of relative data amount such as the processing of many equipment cascadings, and all input and output by bus transfer, do not greatly reduce the load to bus.
The back level adopts the way of output of every card one tunnel to realize that final edge merges output, the computing of handling core is gone up in various prime inputs by card, directly send output card to by DMA, and finish the edge by output card and merge part, back level central processing unit is mainly used to coherent system cascade, various window effect etc.The same with prime, back level is placed on all its main operationals in the processing core of each input-output card and handles, and the obstruction of the bus of avoiding has reached unprecedented processing speed and number of windows.
But preceding level processor is the industrial control system of card insert type i386 framework, realize the management of video clip, the service processing of telemanagement, the feedback of user interactions, support RGB input card, video (S terminal, compound terminals etc.) input card, network input interface etc. have been realized functionalization, adjustable for height backing system.And can dispose various input sources flexibly according to user's demand, can directly output to projector equipment, can input to for large scale system that level continues to handle after the system for mini-system.
But back level processor is the embedded system of card insert type, accepts the various signals of prime input source or other input sources, realizes high-speed soft limit fusion flexibly.
Projector can be the large-scale movie theatre level projector of common small-sized projector or high lumen degree, and projection goes out seamless image behind the signal that level transmits after receiving high-quality system.
In order to solve the processing speed problem of many picture displies, forward and backward level processor does not adopt total coil holder The treatment technology of structure, and be based on the processing mode of each autonomous channel, road. Most function and number It is calculated that all and realize at each road input-output card that the input of every road, card release have oneself Internal memory and CPU, can carry out separately computing, and then carry out communication and synchronously by mainboard, from And speed and real-time when having guaranteed many pictures dynamic process.
If need more picture to show simultaneously, only need a plurality of rear levels to carry out cascade, perhaps prime Level is carried out layer connection after cooperating, and just can enlarge the quantity of I/O channel, satisfies actual requirement.
The utlity model has flexibly combining structure, prime is used separately, independent rear level is used, After the prime level supporting use, many primes single after level use, many after the single prime of level use, many primes how after Level is used etc., and combining structure can be according to client's demand flexibly, and it is the most cheap from minimum to arrange in pairs or groups System is to the most perfect maximum system. And can satisfy because the client wants the harshness of system extension Ask the escalation process that the realization system is level and smooth.
The utility model self has the hardware fault that hardware redundancy can be taken precautions against burst, although hardware Performance, quality has all reached very high height, but who can not guarantee forever fault-free of hardware Operation, the disaster of various bursts all may cause hardware to have problems the list of the utility model prime The Single Point of Faliure of some hardware fault or rear level can not need to change in the situation of hardware connection, By video matrix, directly walk around the rear level of single prime or list and realize. The utility model is unique reality The display system that has showed the hierarchical layered structure has guaranteed Systems balanth under exacting terms.
Claims (3)
1. display processing unit for syncretizing multiple frames and multiple screens in high speed comprises at least more than one video signal source; It is characterized in that: also comprise a preceding level processor, level processor after; Level processor comprises a prime central processing unit before described, and at least more than one prime input card is with corresponding at least more than one prime output card of prime input card; Described video signal source links to each other with the prime input card, the prime input card by built-in CPU with the vision signal source data of handling: comprise that S-Video signal, composite video signal or rgb signal export to the prime output card through DMA; The three source look video datas that described prime output card will be handled by built-in CPU:, then export general split screen signal if directly give output equipment; If export to the back level processor, then output back level processor needs the vision signal of edge fusion; Level central processing unit after described back level processor comprises one, at least more than one back level input card is with corresponding at least more than one back level output card of back level input card; Level input card in back receives the data of prime output card output and the video data of handling is carried out the edge fusion treatment or directly links to each other with video signal source by built-in CPU: comprise S-Video signal, composite video signal or rgb signal level input card through DMA is transferred to after, after a grade input card link to each other with output equipment; Described prime central processing unit is handled network control signal and video input sync signal data and is passed through bus transfer; Described back level central processing unit is handled the edge and is merged control signal and input-output card synchronization signal data and pass through bus transfer.
2. display processing unit for syncretizing multiple frames and multiple screens in high speed according to claim 1 is characterized in that: level processor and back level processor can overlap more in cascade before described.
3. display processing unit for syncretizing multiple frames and multiple screens in high speed according to claim 1 and 2, it is characterized in that: described prime input card is a Trimedia TM1500 chip, described prime output card is a TI DM642 chip, described back level input card is a Trimedia TM1500 chip, and described back level output card is a TI DM642 chip.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200520042049 CN2842931Y (en) | 2005-06-01 | 2005-06-01 | High-speed multi-picture multi-screen fased displaying treatment apparatus |
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| Application Number | Priority Date | Filing Date | Title |
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| CN 200520042049 CN2842931Y (en) | 2005-06-01 | 2005-06-01 | High-speed multi-picture multi-screen fased displaying treatment apparatus |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101702305B (en) * | 2009-10-23 | 2012-06-06 | 广东威创视讯科技股份有限公司 | Method and device for converting, transmitting and processing multi-screen images |
| CN105227913A (en) * | 2015-09-25 | 2016-01-06 | 厦门视诚科技有限公司 | A kind of processing method of cascade Mach-Zehnder interferometer order |
| CN110402462A (en) * | 2017-03-15 | 2019-11-01 | 微软技术许可有限责任公司 | Low delay fracture in the case of no user perception |
-
2005
- 2005-06-01 CN CN 200520042049 patent/CN2842931Y/en not_active Expired - Lifetime
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101702305B (en) * | 2009-10-23 | 2012-06-06 | 广东威创视讯科技股份有限公司 | Method and device for converting, transmitting and processing multi-screen images |
| CN105227913A (en) * | 2015-09-25 | 2016-01-06 | 厦门视诚科技有限公司 | A kind of processing method of cascade Mach-Zehnder interferometer order |
| CN105227913B (en) * | 2015-09-25 | 2018-12-28 | 厦门视诚科技有限公司 | A kind of processing method of cascade Mach-Zehnder interferometer order |
| CN110402462A (en) * | 2017-03-15 | 2019-11-01 | 微软技术许可有限责任公司 | Low delay fracture in the case of no user perception |
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| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: SHANGHAI JINQIAO INFORMATION ENGINEERING CO., LTD Free format text: FORMER OWNER: SHANGHAI GOLDEN BRIDGE NETWORK TECHNOLOGY CO., LTD. Effective date: 20080613 |
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| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20080613 Address after: Shanghai Wanping Road No. 902, zip code: 200030 Patentee after: Shanghai Golden Bridge Information Engineering Co., Ltd. Address before: Shanghai Wanping Road No. 902, zip code: 200030 Patentee before: Jinqiao Network Tech Co., Ltd., Shanghai |
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| C56 | Change in the name or address of the patentee |
Owner name: SHANGHAI GOLDEN BRIDGE INFORMATION SYSTEM INC. Free format text: FORMER NAME: SHANGHAI GOLDEN BRIDGE INFORMATION SYSTEM ENGINEERING CO., LTD. |
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| CP03 | Change of name, title or address |
Address after: 200233 No. 25, building 487, Tianlin Road, Shanghai Patentee after: SHANGHAI GOLDEN BRIDGE INFO TECH CO., LTD. Address before: 200030 Shanghai Wanping Road No. 902 Patentee before: Shanghai Golden Bridge Information Engineering Co., Ltd. |
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| C17 | Cessation of patent right | ||
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Expiration termination date: 20150601 Granted publication date: 20061129 |