CN112312040B - Video processor and display system - Google Patents
Video processor and display system Download PDFInfo
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- CN112312040B CN112312040B CN201910695075.9A CN201910695075A CN112312040B CN 112312040 B CN112312040 B CN 112312040B CN 201910695075 A CN201910695075 A CN 201910695075A CN 112312040 B CN112312040 B CN 112312040B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/222—Studio circuitry; Studio devices; Studio equipment
- H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/222—Studio circuitry; Studio devices; Studio equipment
- H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
- H04N5/265—Mixing
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/222—Studio circuitry; Studio devices; Studio equipment
- H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
- H04N5/268—Signal distribution or switching
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/765—Interface circuits between an apparatus for recording and another apparatus
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Abstract
Embodiments of the present invention provide a video processor and a display system, where the video processor includes, for example: the storage module is used for storing a plurality of linked lists corresponding to the working modes respectively, and each linked list comprises at least one play scene; the video processing module comprises a plurality of video processing units, and the video processing units are sequentially connected for sharing video sources; the control module is connected with the storage module and the video processing module and is used for acquiring a target linked list in the plurality of linked lists from the storage module, selecting a target playing scene from the target linked list and generating a plurality of control information according to the target playing scene; the plurality of control information is used for respectively configuring the plurality of video processing units to work in a target working mode corresponding to the target linked list in a plurality of working modes. The video processor provided by the embodiment of the invention solves the problem that the traditional video processor has single working mode and cannot meet the requirements of diversified sites.
Description
Technical Field
The present invention relates to the field of video processing and display technologies, and in particular, to a video processor and a display system.
Background
The video processor is a video processing device whose basic function is to process a plurality of input video source signals (source signal image superimposition, position and size conversion, etc.) and output the processed video signals. The video processor is mainly applied to various large-screen display occasions such as stage performance, exhibition display, media advertisement, video conference, military command, monitoring security and protection, television station performance and the like. Existing video processors use standard video signals (e.g., VGA, HDMI, CVBS, etc.) as video source inputs, while video source outputs still use standard video signal outputs. The input and output characteristics of the video source determine that the video source of the video processor is mainly provided by a computer or video recording and playing equipment on site, and the processed video signal is mainly provided for a large-screen display equipment on site for display.
Along with the exponential rise of application demands of large-screen display, people put more and finer demands on video splicing products. In order to meet multiple field requirements at one time, users have to add a plurality of devices, such as a video splicer, a switching table, a character adder and the like, so as to meet the field requirements, field staff selects different devices according to different scenes to be connected to a display medium, and the interaction interfaces of the devices are operated to finish video output.
Disclosure of Invention
Therefore, in order to overcome the prior art, the invention provides a video processor and a display system, which can solve the problem that the traditional video processor has a single working mode and cannot meet the requirements of diversified sites.
Specifically, an embodiment of the present invention provides a video processor, including: the storage module is used for storing a plurality of linked lists corresponding to a plurality of working modes respectively, and each linked list comprises at least one play scene; the video processing module comprises a plurality of video processing units, and the video processing units are sequentially connected for sharing video sources; the control module is connected with the storage module and the video processing module and is used for acquiring a target linked list in the plurality of linked lists from the storage module, selecting a target playing scene from the target linked list and generating a plurality of control information according to the target playing scene; the plurality of control information is used for respectively configuring the plurality of video processing units to work in a target working mode corresponding to the target linked list in the plurality of working modes.
In the prior art, in order to meet a plurality of field requirements at one time, a user has to add a plurality of devices, the field requirements are met through a combination of a video splicer, a switching table, a character adder and the like, different devices are selected by field staff according to different scenes to be connected to a display medium, and an interactive interface of each device is operated to complete video output. According to the embodiment of the invention, the video processor is compatible with a plurality of working modes, and the target working mode corresponding to the target linked list can be selected according to the control information, so that the problem that the traditional video processor is single in working mode and cannot meet the requirements of diversified sites is solved, the cost for purchasing various devices is avoided, the cost is reduced, the operation flow of the devices is simplified, the situation that a user needs to learn and familiarize with various interaction interfaces is avoided, and the operation difficulty is reduced.
In one embodiment of the present invention, each video processing unit of the plurality of video processing units includes a video source input interface group and a video source output interface group; the video source input interface group is used for receiving at least one input video source; the video source output interface group is used for outputting at least one output video source.
In one embodiment of the present invention, each of the plurality of video processing units further comprises a programmable logic device; the video source input interface group and the video source output interface group are respectively connected with the programmable logic device.
In one embodiment of the present invention, the control module is specifically configured to generate first control information and second control information according to the target playing scene; the video processing module comprises: a first video processing unit and a second video processing unit; the first video processing unit and the second video processing unit are used for respectively working under the control of the first control information and the second control information in a target working mode corresponding to the target linked list in the plurality of working modes; the first video processing unit comprises a first video source sharing interface, and the second video processing unit comprises a second video source sharing interface; the first video source sharing interface is connected with the second video sharing interface, so that the first video processing unit and the second video processing unit can share video sources.
In one embodiment of the present invention, the first video processing unit includes a first programmable logic device, and the first video source sharing interface is disposed on the first programmable logic device; the second video processing unit comprises a second programmable logic device, and the second video sharing interface is arranged on the second programmable logic device.
In one embodiment of the present invention, the first video processing unit further includes a first video source input interface group and a first video source output interface group; the first video source input interface group and the first video source output interface group are respectively connected with the first programmable logic device; wherein the first video source input interface group is used for receiving at least one first input video source; the first video source output interface group is used for outputting at least one first output video source.
In one embodiment of the present invention, the second video processing unit further includes a second video source input interface group and a second video source output interface group; the second video source input interface group and the second video source output interface group are respectively connected with the second programmable logic device; wherein the second video source input interface group is used for receiving at least one second input video source; the second video source output interface group is used for outputting at least one second output video source.
In one embodiment of the present invention, the data structure of the play scene includes: layer properties, screen structure, and background map.
Furthermore, an embodiment of the present invention provides a display system, including: a video processor as claimed in any one of the preceding claims; and the self-luminous display screen, wherein a plurality of video processing units of the video processor are respectively connected with different display screens of the self-luminous display screen, so that the self-luminous display screen is used for receiving a video source output by the video processor for displaying.
In addition, an embodiment of the present invention provides a display system including: a video processor as claimed in any one of the preceding claims; the self-luminous display screen is connected with the video processor and is used for receiving a first video source output by the video processor for displaying; and the pre-monitoring display screen is connected with the video processor and is used for receiving a second video source output by the video processor for pre-monitoring.
As can be seen from the above, the embodiments of the present invention can achieve one or more of the following advantages: the video processor has multiple working modes, and the problem that the traditional video processor has single working mode and cannot meet the requirements of diversified sites is solved; the cost of purchasing various devices is avoided, and the cost is reduced; the operation flow of the equipment is simplified, the situation that the user needs to learn and familiarize with various interactive interfaces is avoided, and the operation difficulty is reduced.
Other aspects and features of the present invention will become apparent from the following detailed description, which refers to the accompanying drawings. It is to be understood, however, that the drawings are designed solely for the purposes of illustration and not as a definition of the limits of the invention. It should be further understood that the drawings are not necessarily drawn to scale and that, unless otherwise indicated, they are merely intended to conceptually illustrate the structures and procedures described herein.
Drawings
The following detailed description of specific embodiments of the invention refers to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a video processor according to a first embodiment of the present invention;
fig. 2 is a schematic diagram of a specific structure of a video processor according to a first embodiment of the present invention;
FIG. 3 is a schematic diagram of a video processor according to a first embodiment of the present invention;
FIG. 4 is a schematic diagram of a memory module in a video processor according to a first embodiment of the present invention;
fig. 5 is a schematic diagram of a playing scene in a storage module in a specific implementation manner of a video processor according to a first embodiment of the present invention;
fig. 6 is a video data transmission topology diagram of a specific implementation of a video processor according to a first embodiment of the present invention;
FIG. 7 is a schematic diagram of a splice mode operation topology of a video processor according to a first embodiment of the present invention;
FIG. 8 is a topology diagram illustrating operation of a switching station in a video processor according to a first embodiment of the present invention;
fig. 9 is a schematic structural diagram of a video processor according to a second embodiment of the present invention;
FIG. 10 is a schematic diagram of a display system according to a third embodiment of the present invention;
fig. 11 is a schematic structural diagram of a display system according to a fourth embodiment of the present invention.
[ reference numerals description ]
10: a video processor; 11 a control module; 12: a storage module; 13: a video processing module; 131: a video processing unit; 1311: a video source sharing interface; 1312: a programmable logic device; 1313: a video source input interface group; 1314: a video source output interface group; 132: a video processing unit; 1321: a video source sharing interface; 1322: a programmable logic device; 1323: a video source input interface group; 1324: a video source output interface group;
20: a video processor; 21: a control module; 22: a storage module; 23: a video processing module; 231: a video processing unit; 232: a video processing unit; 233: a video processing unit;
30: a display system; 31: a video processor; 32: self-luminous display screen;
40: a display system; 41: a video processor; 42: self-luminous display screen; 43: and a pre-monitoring display screen.
Detailed Description
In order that the above objects, features and advantages of the invention will be readily understood, a more particular description of the invention will be rendered by reference to the appended drawings.
In order that those skilled in the art will better understand the technical solutions of the present invention, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
It should be further noted that the division of the embodiments in the present invention is only for convenience of description, and should not be construed as a specific limitation, and features in the various embodiments may be combined and mutually referenced without contradiction.
[ first embodiment ]
Referring to fig. 1, a video processor according to a first embodiment of the present invention is provided. A detailed description of the video processor 10 according to an embodiment of the present invention is provided below with reference to fig. 1 and 2. As shown in fig. 1, the video processor 10 of the present embodiment includes, for example: a control module 11, a storage module 12 and a video processing module 13.
Specifically, the storage module 12 stores a plurality of linked lists corresponding to a plurality of operation modes, and each linked list includes at least one play scene. The control module 11 is connected to the storage module 12, and is configured to obtain a target linked list from the plurality of linked lists from the storage module 12, select a target playing scene from the target linked list, and generate first control information and second control information according to the target playing scene. The video processing module 13 is connected to the control module 11, and includes a video processing unit 131 and a video processing unit 132. The video processing unit 131 and the video processing unit 132 are configured to operate in a target operation mode corresponding to the target linked list in the plurality of operation modes under the control of the first control information and the second control information, respectively. The video processing unit 131 includes a video source sharing interface 1311, and the video processing unit 132 includes a video source sharing interface 1321. The video source sharing interface 1311 connects to the video sharing interface 1321 for video source sharing by the video processing unit 131 and the video processing unit 132.
Further, as shown in fig. 2, the video processing unit 131 includes a programmable logic device 1312, and the video source sharing interface 1311 is disposed on the programmable logic device 1312. The video processing unit 132 includes a programmable logic device 1322, and the video sharing interface 1321 is disposed on the programmable logic device 1322.
Further, the video processing unit 131 also includes a video source input interface group 1313 and a video source output interface group 1314. Video source input interface group 1313 and video source output interface group 1314 are connected to the input side and output side of programmable logic device 1312, respectively. Wherein the set of video source input interfaces 1313 is for receiving at least one first input video source. The video source output interface group 1314 is used to output at least one first output video source.
Further, the video processing unit 132 also includes a video source input interface set 1323 and a video source output interface set 1324. The set of video source input interfaces 1323 and the set of video source output interfaces 1324 are coupled to an input side and an output side of the programmable logic device 1322, respectively. Wherein the set of video source input interfaces 1323 is configured to receive at least one second input video source. The video source output interface set 1324 is configured to output at least one second output video source.
Further, the mentioned data structure of the play scene includes, for example: layer properties, screen structure, and background map. The layer attributes include parameters such as output window size, screen structure includes parameters such as resolution of the display screen, and background legends include options such as plain color map and plain text.
Further, the control module 11 includes, for example, an MCU (Microcontroller Unit, microcontroller, also called as a single-chip microcomputer) or other microprocessors with certain data processing and operation capabilities, such as an ARM processor, a DSP processor, etc. The control module 11 is connected to a programmable logic device 1312 in the video processing unit 131 and a programmable logic device 1322 in the video processing unit 132 of the video processing module 13, respectively.
Further, the mentioned memory module 12 includes, for example, a Flash memory Flash, an EMMC (Embedded Multi Media Card) or the like nonvolatile memory.
Further, the video source sharing interface 1311 and the video source sharing interface 1321 mentioned may transmit a plurality of video sources simultaneously or sequentially, for example. Video source sharing interface 1311 and video source sharing interface 1321 employ, for example, GTX technology. The GTX (Gigabit Transceiver) technology is used for high-speed and real-time transmission of huge data in modern digital processing technology and computing technology, and can avoid the problems of low anti-interference capability, poor synchronization capability, low transmission rate, poor signal quality and the like in the traditional parallel transmission technology. The current linear speed range of GTX is 1 Gbps-12 Gbps, and the effective load range is 0.8 Gbps-10 Gbps.
Further, the mentioned programmable logic device 1312 and programmable logic device 1322 are, for example, FPGA (Field Programmable Gate Array ) or the like. And the programmable logic device 1312 and the programmable logic device 1322 have color processing functions such as brightness, chromaticity, saturation, gamma adjustment, skin color compensation, color enhancement and the like, complete video enhancement processing functions such as image de-interlacing, stepless scaling and the like, and can realize image fusion functions such as PIP, image-text superposition and the like.
Further, the video source input interface group 1313 and the video source input interface group 1323 mentioned include, for example, digital audio-video hybrid interfaces such as HDMI (High Definition Multimedia Interface ), DP (Display Port), and/or SDI (serial digital interface, serial digital interface), or digital video interfaces such as DVI (Digital Visual Interface), analog video interfaces such as VGA (Video Graphics Array), S terminal, component video, and/or composite video. It should be noted that, when the video source input interface is an HDMI interface, an HDMI video decoding chip is further disposed between the HDMI interface and the programmable logic device. When the video source input interface is an SDI interface, an SDI video decoding chip is further arranged between the SDI interface and the programmable logic device. When the video source input interface is a DP interface, a DP video decoding chip is also arranged between the DP interface and the programmable logic device. When the video source input interface is a DVI interface, a DVI video decoding chip is also arranged between the DVI interface and the programmable logic device.
Further, the video source output interface group 1314 and the video source output interface group 1324 mentioned include, for example, a digital video interface, a network port, or a fiber optic interface. It should be noted that, when the video source output interface is a digital video interface, for example, a DVI interface, a DVI video encoding chip is further disposed between the DVI interface and the programmable logic device. When the video source output interface is a network port, for example, a gigabit network port, a gigabit ethernet PHY chip is further disposed between the gigabit network port and the programmable logic device. When the video source output interface is an optical fiber interface, for example, a 10G optical fiber interface, an SFP optical module is further arranged between the optical fiber interface and the programmable logic device.
In addition, the user is connected to the control module 11 through a network or a man-machine interaction interface such as a knob, a man-machine interaction display screen or a button, etc., the user selects a working mode of the video processor, accordingly, the control module 11 obtains a target linked list corresponding to the working mode from the storage module 12, then the user selects a target playing scene, accordingly, the control module 11 obtains the target playing scene from the target linked list, and then generates first control information and second control information to the video processing module 13 according to the target playing scene so as to complete corresponding functions according to the selection requirement of the user.
In the following, for better understanding of the present embodiment, a specific implementation of the video processor 10 of the present embodiment will be described in more detail with reference to fig. 3 to 8.
As shown in fig. 3, the video processor includes: the device comprises a control module, a storage module and a video processing module.
The control module is connected with the video processing module and the storage module through an internal bus, can flexibly configure the working method of the FPGA according to the selection of a user, and then reads/writes required data from/from the storage module at high speed under different working modes. The video processing unit in the video processing module is connected with the input data channel and the output data channel through an internal bus, and the video processing unit scales video data sent by the input data channel according to the configuration of the control module and returns the scaled video data to the output data channel.
Here, setting a scenario: the video processor 10 has the hardware of a conventional video splicer but is capable of having both the functionality of the splicer and the switching station. Multiple modes of operation exist and their respective capabilities must be at least equal to those of the original multiple devices in turn, so that the respective data must be independent and able to be invoked quickly. As shown in fig. 4, to implement the dual mode architecture, the storage module divides the physical storage unit into a limited number of isolated blocks by software, each representing a playback scenario. As shown in fig. 5, each play scene contains divided data structures including layer attributes, screen structures and background images, and each isolated block is composed of two groups of independent linked lists according to the belonging working mode. When the control module needs to load or store play scenes with different working modes, the corresponding quick reading and writing can be quickly found out through the corresponding linked list. The storage scheme realizes that multiple modes such as double modes are not mutually influenced, and play scenes in different modes quickly jump.
All video source input signals cannot be directly accessed under the limit of limited FPGA pin resources, and in order to realize dual-mode design, each FPGA must take all video source input signals, otherwise, an additional video processing chip is added, so that the cost is increased, and the existing hardware resources are not maximally utilized. As shown in fig. 6, in the video processing module, two FPGAs directly introduce only half of the video source input signals through the internal bus, and the missing video source input signals are copied in real time with each other by using the GTX (Gigabit Transceiver ) technology. In this way, on the hardware resources of the traditional video splicer, both FPGAs can access all video source input signals, and support is provided for realizing multiple modes of the video processor, such as dual modes.
The switching between the two modes of the video processor necessarily requires that the video processing module is internally coupled with a plurality of working modes and can be flexibly switched, and in order to meet the requirement, the FPGA internal program uses modularized programming, so that the internal resource has schedulable performance and combines different functions. As shown in fig. 7, when the video processor is in the splicer mode, in order to output the final spliced picture to the playing medium, all FPGA resources are used to process the scaling and cutting of the video source input signal related to the FPGA resources, so that the video source input signal is finally integrated into a layer required by a user. Each FPGA corresponds to two physical output interfaces, performs scaling processing according to an input source related to a playing picture on a corresponding screen, and then synthesizes video signals for output.
As shown in fig. 8, in order for the video processor to be in the switching station mode, the FPGA2 resource is used to support PGM (Program, program video signal finally broadcast) and provide the final spliced picture to the user. The FPGA1 resource is used to support PVW (Preview, pre-monitor picture in studio) and provide a platform for users to edit and Preview scenes during playing. Each FPGA has all video source input signals, so that all video source input signals can be completely used for picture splicing, and play scenes cannot be influenced when a user edits.
The control module comprises a programmable module interface provided by the MCU through the video processing module, flexible scheduling of the FPGA is realized under the condition that hardware resources of a traditional video splicer are not required to be additionally increased, the FPGA resources are reasonably used according to different working modes, and calculation output of the whole picture layout is completed by using each FPGA resource in the splicer mode. In the switch-stage mode, FPGA resources are used to complete the computational output of PVW and PGM in two parts. The application data of each mode is divided into different storage units under the control of the MCU, so that the fact that two working modes are not mutually crosstalked by one splice is guaranteed, and the functions of the splice are completely consistent with those of the splice and the switching table in the market.
In summary, the video processor provided in this embodiment realizes multiple working modes, and solves the problem that the conventional video processor has a single working mode and cannot meet the needs of diversified sites; the cost of purchasing various devices is avoided, and the cost is reduced; the operation flow of the equipment is simplified, the situation that the user needs to learn and familiarize with various interactive interfaces is avoided, and the operation difficulty is reduced.
[ second embodiment ]
As shown in fig. 9, a schematic structural diagram of a video processor according to a second embodiment of the present invention is provided. The video processor 20 includes, for example: a control module 21, a storage module 22 and a video processing module 23.
Specifically, the storage module 22 stores a plurality of linked lists corresponding to a plurality of working modes, and each linked list includes at least one play scene. The video processing module 23 includes a plurality of video processing units, and the plurality of video processing units are sequentially connected for video source sharing. The control module 21 is connected to the storage module 22 and the video processing module 23, and is configured to obtain a target linked list from the plurality of linked lists from the storage module 22, select a target playing scene from the target linked list, and generate a plurality of control information according to the target playing scene. The plurality of control information is used for respectively configuring the plurality of video processing units to work in a target working mode corresponding to the target linked list in the plurality of working modes.
Further, each of the mentioned plurality of video processing units comprises, for example, a set of video source input interfaces and a set of video source output interfaces. The set of video source input interfaces is for receiving at least one input video source. The video source output interface group is used for outputting at least one output video source.
Further, each of the plurality of video processing units mentioned further comprises a programmable logic device. The video source input interface group and the video source output interface group are respectively connected with the programmable logic device.
The main difference between the video processor 20 provided in this embodiment and the video processor 10 provided in the first embodiment is that the video processing module 23 in the video processor 20 provided in this embodiment includes a plurality of video processing units. And the video processing units are sequentially connected to realize data sharing among the video processing units. For example, the present embodiment sets a plurality of video processing units as 3: a video processing unit 231, a video processing unit 232, and a video processing unit 233. It should be noted that the embodiments of the present invention do not limit the number of video processing units, and the above is only for better explaining the present embodiment. The other structures and corresponding functional descriptions of the video processor 20 provided in this embodiment may refer to the first embodiment, and are not described herein.
In summary, the video processor provided in this embodiment realizes multiple working modes, and solves the problem that the conventional video processor has a single working mode and cannot meet the needs of diversified sites; the cost of purchasing various devices is avoided, and the cost is reduced; the operation flow of the equipment is simplified, the situation that the user needs to learn and familiarize with various interactive interfaces is avoided, and the operation difficulty is reduced.
[ third embodiment ]
As shown in fig. 10, a display system according to a third embodiment of the present invention is shown. The display system 30 includes, for example, a video processor 31 and a self-luminous display screen 32.
Wherein the video processor 31 is the video processor 10/20 as described in the first embodiment or the second embodiment. The description of the video processor 31 may refer to the first embodiment and the second embodiment, and for brevity, the description of the video processor will not be repeated here.
The self-luminous display screen 32 includes, for example, a receiving card, and a portal is typically provided on the receiving card for connection with the video processor 31 through a transmitting card. The self-luminous display screen 32 is connected to the video processor 31 through a receiving card and a transmitting card, and displays a video source for receiving an output of the video processor. The self-luminous display screen 32 is, for example, an LED display screen formed by splicing a plurality of LED boxes.
In summary, the video processor included in the display system provided in the embodiment has multiple working modes, so that the problem that the conventional video processor has a single working mode and cannot meet the requirements of diversified sites is solved; the cost of purchasing various devices is avoided, and the cost is reduced; the operation flow of the equipment is simplified, the situation that the user needs to learn and familiarize with various interactive interfaces is avoided, and the operation difficulty is reduced.
[ fourth embodiment ]
As shown in fig. 11, a display system according to a fourth embodiment of the present invention is shown. A display system 40, for example, includes: a video processor 41, a self-luminous display screen 42 and a pre-monitor display screen 43.
Wherein the video processor 41 is the video processor 10/20 as described in the first embodiment or the second embodiment. The description of the video processor 41 may refer to the first embodiment and the second embodiment, and for brevity, the description of the video processor will not be repeated here.
The self-luminous display screen 42 includes, for example, a receiving card, and is typically provided with a portal thereon, and is connected to the video processor 41 through a transmitting card to receive the first video source output by the video processor 41 for display. The self-luminous display screen 42 is, for example, an LED display screen formed by splicing a plurality of LED boxes.
The pre-monitoring display screen 43 is connected to the video processor 41, and is configured to receive the second video source output by the video processor 41 for pre-monitoring. The display screen 43 is, for example, a Liquid Crystal (LCD) display screen.
In summary, the video processor included in the display system provided in the embodiment has multiple working modes, so that the problem that the conventional video processor has a single working mode and cannot meet the requirements of diversified sites is solved; the cost of purchasing various devices is avoided, and the cost is reduced; the operation flow of the equipment is simplified, the situation that the user needs to learn and familiarize with various interactive interfaces is avoided, and the operation difficulty is reduced.
In addition, it should be noted that the video processor of each embodiment of the present invention is not limited to being connected to a self-luminous display screen or a liquid crystal display screen, but may be connected to other display screens.
The present invention is not limited to the above-mentioned embodiments, but is intended to be limited to the following embodiments, and any modifications, equivalent changes and variations in the above-mentioned embodiments can be made by those skilled in the art without departing from the scope of the present invention.
Claims (9)
1. A video processor, comprising:
the storage module is used for storing a plurality of linked lists corresponding to a plurality of working modes respectively, and each linked list comprises at least one play scene; wherein the plurality of working modes include a splicer mode and a switching station mode;
the video processing module comprises a plurality of video processing units, and the video processing units are sequentially connected for sharing video sources;
the control module is connected with the storage module and the video processing module and is used for acquiring a target linked list in the plurality of linked lists from the storage module, selecting a target playing scene from the target linked list and generating a plurality of control information according to the target playing scene;
the plurality of control information is used for respectively configuring the plurality of video processing units to work in a target working mode corresponding to the target linked list in the plurality of working modes;
each video processing unit in the plurality of video processing units comprises a video source input interface group and a video source output interface group; the video source input interface group is used for receiving at least one input video source; the video source output interface group is used for outputting at least one output video source.
2. The video processor of claim 1, wherein each of the plurality of video processing units further comprises a programmable logic device; the video source input interface group and the video source output interface group are respectively connected with the programmable logic device.
3. The video processor of claim 1, comprising:
the control module is specifically used for: generating first control information and second control information according to the target playing scene;
the video processing module comprises: a first video processing unit and a second video processing unit;
the first video processing unit and the second video processing unit are used for respectively working under the control of the first control information and the second control information in a target working mode corresponding to the target linked list in the plurality of working modes;
the first video processing unit comprises a first video source sharing interface, and the second video processing unit comprises a second video source sharing interface; the first video source sharing interface is connected with the second video source sharing interface, so that the first video processing unit and the second video processing unit can share video sources.
4. The video processor of claim 3, wherein the first video processing unit comprises a first programmable logic device, the first video source sharing interface being disposed on the first programmable logic device; the second video processing unit comprises a second programmable logic device, and the second video sharing interface is arranged on the second programmable logic device.
5. The video processor of claim 4, wherein the first video processing unit further comprises a first video source input interface group and a first video source output interface group; the first video source input interface group and the first video source output interface group are respectively connected with the first programmable logic device; wherein the first video source input interface group is used for receiving at least one first input video source; the first video source output interface group is used for outputting at least one first output video source.
6. The video processor of claim 4, wherein the second video processing unit further comprises a second set of video source input interfaces and a second set of video source output interfaces; the second video source input interface group and the second video source output interface group are respectively connected with the second programmable logic device; wherein the second video source input interface group is used for receiving at least one second input video source; the second video source output interface group is used for outputting at least one second output video source.
7. A video processor as claimed in claim 3, wherein the data structure of the play scene comprises: layer properties, screen structure, and background map.
8. A display system, comprising:
the video processor of any one of claims 1-7; and
the self-luminous display screen is characterized in that a plurality of video processing units of the video processor are respectively connected with different display screens of the self-luminous display screen, so that the self-luminous display screen is used for receiving a video source output by the video processor for displaying;
when the video processor is in a splicer mode, each video processing unit in the plurality of video processing units is used for processing scaling clipping of a video source input signal related to each video processing unit, and outputting the video after scaling clipping to different display screens corresponding to the plurality of video processing units, so that the self-luminous display screen displays the video after scaling clipping.
9. A display system, comprising:
the video processor of any one of claims 4-7;
the self-luminous display screen is connected with the video processor and is used for receiving a first output video source output by the video processor for displaying; and
the pre-monitoring display screen is connected with the video processor and is used for receiving a second output video source output by the video processor for pre-monitoring;
when the video processor is in a switching platform mode, a first programmable logic device of a first video processing unit of the video processor is used for processing all input video sources to obtain a first output video source, and outputting the first output video source to the self-luminous display screen for display; and the second programmable logic device of the second video processing unit of the video processor is used for processing all the input video sources to obtain a second output video source, and outputting the second output video source to the pre-monitoring display screen for display.
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