CN2840558Y - Multifunction interface module for television and planar synchronous displaying - Google Patents
Multifunction interface module for television and planar synchronous displaying Download PDFInfo
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- CN2840558Y CN2840558Y CN 200520029565 CN200520029565U CN2840558Y CN 2840558 Y CN2840558 Y CN 2840558Y CN 200520029565 CN200520029565 CN 200520029565 CN 200520029565 U CN200520029565 U CN 200520029565U CN 2840558 Y CN2840558 Y CN 2840558Y
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- utility
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Abstract
The utility model relates to a structure capable of synchronously outputting video signals through multi-display equipment. The utility model is composed of an integrated circuit, a logic controller and a voltage transformation integrated circuit. The utility model integrates functions which can be accomplished previously by three independent chips into one chip. Besides, the utility model simplifies circuit design, enhances system reliability and compatibility, reduces development cost and shortens product development period. The utility model converts the digital RGB or YCrCb signals of a TTL level form output by an image processing chip into standard television signals and LVDS signals which can be used for planar display, and thus, the utility model can simultaneously meet displaying requirements of analog and digital displaying equipment. The utility model has a display pantograph capable of automatically adjusting pixel resolution so as to make full screen display and the word enhancing function. Thus, the utility model is convenient for sharing lots of display equipment (comprising a television and a planar plate) when a user shows information, sees movies and plays games. The utility model can be widely used for notebook computers, PDA and different hand holding equipment.
Description
Technical field
The utility model belongs to the video display interface technical field, relates to a kind of video-signal multi-display equipment new structure of output synchronously.
Background technology
Current, flat-panel display device, constantly develop and be used widely as LCD (LCD), PDP (plasma display), and the television set of traditional use analog signal and monitor are not still eliminated by market, and a large amount of analog display device (for example TV and monitor) is still in designed life and among normal the use.And notebook computer, PDA and various handheld device, when information exhibition, film and recreation, need to share a plurality of display devices.Traditional solution, be to use three independently display driver circuit finish the function of flat panel display driver, television encoder and demonstration scaler respectively, TV and dull and stereotyped display device though this technical scheme also can be used to plug into simultaneously must adopt two cover display driver circuits.Another kind of solution (98115483.2 patent) comprising: CPU, liquid crystal display slot, rerouting logical circuit, static random access memory, display controller, shift registor, will be from the digital signal of the Transistor-Transistor Logic level form of picture processing chip output through the flat panel display drive circuit, become the flat panel display signal, be converted to television video frequency signal through a kind of rerouting logical circuit again, the television video frequency signal with original flat panel display signal and the output of conversion back outputs to flat-panel monitor and TV respectively then.The technique scheme complex circuit designs, the reliability of system and poor compatibility, the development cost height, the cycle of product development is long.
The utility model content
For solving in the above-mentioned technology single display drive circuit can not be used to simultaneously plug into TV and dull and stereotyped two kinds of different display devices, make complex circuit designs, the reliability of system and poor compatibility, the development cost height, the problem that the cycle of product development is long, the purpose of this utility model is, use single display drive circuit plug into simultaneously TV and dull and stereotyped two kinds of display devices, and TV and flat board can be shown synchronously, for this reason, the utility model provides a kind of TV and dull and stereotyped Multifunctional Interface Module that shows synchronously of being used for.
The utility model is made up of printed circuit board (PCB) and the electronic circuit that is installed on the printed circuit board (PCB).Electronic circuit is made up of integrated circuit U001, logic controller U002, voltage transformation integrated circuit U003, wherein the power input of integrated circuit U001 and logic controller U002 is connected with the output of voltage transformation integrated circuit U003, the universaling I/O port of logic controller U002 is connected with the mixed function interface with the Serial Control of integrated circuit U001, and the TV analog video interface of integrated circuit U001 is connected with flat-panel monitor with TV respectively with dull and stereotyped LVDS video interface.
The utility model is like this work: from the digital rgb or the YCrCb signal of the Transistor-Transistor Logic level form of picture processing chip output, and corresponding row field signal, clock signal, enable signal be linked on a slice integrated circuit, is converted to standard television signal and video LVDS signal respectively through two modules of IC interior.Standard television signal can directly output to video on TV or the monitor, and video LVDS signal can directly be delivered to flat-panel monitor, is converted into the digital signal rear drive flat-panel monitor display image of Transistor-Transistor Logic level form again by the LVDS decoding integrated circuit of display interior.Logic controller is used to provide the combinational logic and the sequential logic of integrated circuit needs.
The utility model has the advantages that: the function that will need in the past to use three individual chips to finish is integrated in the chip goes, simplified circuit design greatly, strengthen the reliability and the compatibility of system, and greatly reduced development cost, shortened the cycle of product development.
The utility model is standard television signal and the LVDS signal that can be used for flat panel display with the digital rgb or the YCrCb conversion of signals of the Transistor-Transistor Logic level form of picture processing chip output, can satisfy the demonstration needs of analog-and digital-two kinds of display devices simultaneously, and this module also has and can adjust pixel resolution automatically to put in order demonstration scaler and the literal enhancement function that screen shows, make things convenient for the user carrying out information exhibition, when film and recreation, share the needs of a plurality of display devices (comprising TV and flat board), can be widely used in notebook computer, PDA, and in the various handheld devices, has bigger Practical significance.
Description of drawings
Fig. 1 is a structural representation of the present utility model
Fig. 2 is the electronic circuit schematic diagram of the utility model one embodiment
Embodiment
A kind of TV of the utility model and the dull and stereotyped Multifunctional Interface Module that shows synchronously, as shown in Figure 1, its electronic circuit is made up of integrated circuit U001, logic controller U002, voltage transformation integrated circuit U003, wherein integrated circuit U001 adopts TV and dull and stereotyped video interface integrated circuit, selects CH7017 cake core or CH7019 cake core; Logic controller U002 can adopt CPLD or field programmable gate array or microprocessor; Voltage transformation integrated circuit U003 can adopt the DC-DC conversion integrated circuit.
The hybrid digital vision signal of picture processing chip output Transistor-Transistor Logic level form, be respectively RGB pattern and YCrCb pattern, and every kind of pattern is divided into several different forms, and every kind of form all comprises digital video signal and corresponding row field signal, clock signal, enable signal.
Embodiment 1, as shown in Figure 2, integrated circuit U001 adopts TV and dull and stereotyped video interface integrated circuit, select the CH7017 cake core, logic controller U002 adopts CPLD, select the ISPLSI2096VE cake core, voltage transformation integrated circuit U003 adopts the DC-DC conversion integrated circuit, selects the LT1129CS8-3.3 cake core.The utility model is at first by the Serial Control of CH7017 cake core and each register of mixed function interface configuration chip internal, determine the mode of operation of CH7017 cake core, display mode, input pattern, parameters such as output mode, such as input resolution, TV output standard, the ratio of width to height of TV signal, the coded format of LVDS, output amplitude control, output clock control or the like.And provide the combinational logic and the sequential logic of CH7017 cake core need of work by CPLD.For example: input signal is that data format is 640 * 480 effective video signal, the total pixel of one frame is 840 * 500, if output the ratio of width to height is 5/4 pal mode standard television signal, then need to dispose the display mode register of CH7017, select display mode 13, the value of corresponding eight bit register is 01100000.
Then corresponding RGB pattern or YCrCb pattern 12 or 24 hybrid digital vision signal are input to the CH7017 cake core, be divided into two groups of identical hybrid digital vision signals at CH7017 cake core internal input signal, the CH7017 cake core is according to the selection of configuration mode of operation of register in the above-mentioned CH7017 cake core, television encoder and four 10 D/A converters of one group of hybrid digital vision signal process CH7017 cake core, the TV signal that converts standard P AL or TSC-system formula to corresponding RGB pattern or YCrCb pattern can directly output to TV or monitor; Another group hybrid digital vision signal is converted to video LVDS signal through LVDS encoder and LVDS transmitter, video LVDS signal is directly delivered to dull and stereotyped device, and the LVDS decoding integrated circuit by flat-panel monitor inside is the digital signal rear drive flat-panel monitor display image of Transistor-Transistor Logic level form with video LVDS conversion of signals again.
As shown in Figure 2, the XCLK1 of CH7017 cake core, XCLK1*, XCLK2, XCLK2*, H1, H2, V1, V2, DE1, DE2, D1[11..0], D2[11..0] the pin digital video signal of clock signal, row signal, field signal, enable signal and RGB pattern or the YCrCb pattern in the hybrid digital vision signal of incoming image process chip output Transistor-Transistor Logic level form respectively; GPIO[5..0], AS, SPC, SPD, RESET*, HPD, HPINT*, DD1, DD2, DC1, DC2 pin be the Serial Control and the mixed function interface of CH7017 cake core, is connected respectively to the universaling I/O port 5,6,7,8,9,10,11,12,13,14,19,20,21,22,23,24 of ISPLSI2096VE cake core; The BCO/VSYNC of CH7017 cake core, C/HSYNC, DACA0, DACA1, DACA2, DACA3, DACB0, DACB1, DACB2 pin are TV signal output end, LL1C, LL1C*, LL2C, LL2C*, LDC0, LDC0*, LDC1, LDC1*, LDC2, LDC2*, LDC3, LDC3*, LDC4, LDC4*, LDC5, LDC5*, LDC6, LDC6*, LDC7, LDC7* pin are dull and stereotyped video LVDS signal output part, the ENAVDD pin is the plate voltage Enable Pin, and the ENABKL pin is dull and stereotyped Enable Pin backlight.
DC-DC conversion integrated circuit U003 adopts the LT1129CS8-3.3 cake core, and being used for really flowing the 5V voltage transformation is direct current 3.3V voltage, is used for being programmable logic device and CH7017 power supply.
Embodiment 2, integrated circuit U001 adopts TV and dull and stereotyped video interface integrated circuit, select the CH7019 cake core, logic controller U002 adopts field programmable gate array or microprocessor, selecting corresponding D C-DC conversion integrated circuit U003 to be used for output dc voltage according to the needs of different input voltages is 3.3V, and miscellaneous part and annexation are identical with embodiment 1.
Claims (3)
1, be used for TV and the dull and stereotyped Multifunctional Interface Module that shows synchronously, it is made up of printed circuit board (PCB) and the electronic circuit that is installed on the printed circuit board (PCB), it is characterized in that: electronic circuit is by integrated circuit U001, logic controller U002, voltage transformation integrated circuit U003 forms, wherein the power input of integrated circuit U001 and logic controller U002 is connected with the output of voltage transformation integrated circuit U003, the universaling I/O port of logic controller U002 is connected with the mixed function interface with the Serial Control of integrated circuit U001, and the TV analog video interface of integrated circuit U001 is connected with flat-panel monitor with TV respectively with dull and stereotyped LVDS video interface.
2. according to described TV and the dull and stereotyped Multifunctional Interface Module that shows synchronously of being used for of claim 1, it is characterized in that described integrated circuit U001 adopts the chip-shaped or CH7019 chip of CH7017.
3. according to described TV and the dull and stereotyped Multifunctional Interface Module that shows synchronously of being used for of claim 1, it is characterized in that described logic controller U002 can adopt CPLD or field programmable gate array or microprocessor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN 200520029565 CN2840558Y (en) | 2005-12-16 | 2005-12-16 | Multifunction interface module for television and planar synchronous displaying |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN 200520029565 CN2840558Y (en) | 2005-12-16 | 2005-12-16 | Multifunction interface module for television and planar synchronous displaying |
Publications (1)
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CN2840558Y true CN2840558Y (en) | 2006-11-22 |
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CN 200520029565 Expired - Fee Related CN2840558Y (en) | 2005-12-16 | 2005-12-16 | Multifunction interface module for television and planar synchronous displaying |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103000160A (en) * | 2012-11-19 | 2013-03-27 | 天津三星电子有限公司 | Display system |
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2005
- 2005-12-16 CN CN 200520029565 patent/CN2840558Y/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103000160A (en) * | 2012-11-19 | 2013-03-27 | 天津三星电子有限公司 | Display system |
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Legal Events
Date | Code | Title | Description |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C19 | Lapse of patent right due to non-payment of the annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |