CN100359930C - Method for realizing multiple picture-in-picture display on display device and apparatus thereof - Google Patents
Method for realizing multiple picture-in-picture display on display device and apparatus thereof Download PDFInfo
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- CN100359930C CN100359930C CNB200510136650XA CN200510136650A CN100359930C CN 100359930 C CN100359930 C CN 100359930C CN B200510136650X A CNB200510136650X A CN B200510136650XA CN 200510136650 A CN200510136650 A CN 200510136650A CN 100359930 C CN100359930 C CN 100359930C
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Abstract
The present invention discloses a method for realizing multiple picture-in-picture display on a display device and an apparatus thereof. Firstly, a plurality of image processors are connected with each other orderly by adopting a cascade mode; each image processor is connected with a memory, and each image processor synthesizes input signals received through an input end port according to a certain algorithm and preserves the input signals in the memory connected with the image processor; then, corresponding clock signals and line-field synchronous signals are generated according to a format of the received signals, and meanwhile, each image processor reads data in the memory connected with the image processor and sends the data to the next cascaded image processor connected with the image processor; after the signals are sent to the last image processor in sequence, the last image processor conveys the signals to the display device according to the corresponding clock signals and line-field synchronous signals, and the signals are displayed on the display device. The present invention can be used for processing input of various video signals, and the present invention enables the display device to display a plurality of independent control pictures simultaneously.
Description
Technical field
The present invention is mainly concerned with field of display devices, refers in particular to a kind of method and device thereof that many picture-in-pictures show of realizing on display.
Background technology
Along with the continuous progress of electronic technology, the continuing to bring out of new material and new technology, Display Technique has also obtained significant progress.Exploration on display resolution ratio is more and more higher, and size is increasing, and this just makes watches a plurality of pictures to become possibility on display simultaneously.
At present, existing on the market display with picture-in-picture function, 18.1 cun LCD display L1810T and 15 cun LCD display L1510T as the lg electronics issue, the FP231W of the BenQ of Benq, satisfied the primary demand in market, but along with the expansion of application, the user to display effect more requirement has been proposed, existing display mainly has the following disadvantages: one, display of the prior art all can only show two pictures simultaneously, lacks the support that a plurality of pictures are shown simultaneously; Two, shown each the independent picture of display of the prior art in the position, aspect such as size, brightness can not control fully separately.
Summary of the invention
The technical problem to be solved in the present invention just is: at the technical problem that prior art exists, the invention provides a kind of processing various video signal that can be used in and import, also can make it showing a plurality of many picture-in-pictures of realization show on display method and the devices thereof that can independently control picture on the display simultaneously.
In order to solve the problems of the technologies described above, the solution that the present invention proposes is: a kind of method that realizes many picture-in-pictures demonstrations on display, it is characterized in that: at first adopt the method for cascade that a plurality of image processors are connected in turn, each image processor all links to each other with microprocessor with a memory, each image processor will be kept in the coupled memory after will synthesizing by certain algorithm by the input signal that input port receives, produce corresponding clock signals according to received signal format then, the row field sync signal, read data in the coupled memory simultaneously and send into the image processor of coupled next cascade, to last image processor, last image processor is sent to signal on the display by corresponding clock signals and row field sync signal and shows signal successively.
A kind of many picture-in-pictures device shown that on display, realizes, it is characterized in that: it comprises two or more image processors, two or more image processors are by digiverter cascade successively, each image processor links to each other with a microprocessor, a memory and a signal input unit respectively, and wherein the last image processor of cascade links to each other with video output unit by output port successively.
Described signal input unit comprises analog signal tablet AIB, digital signal tablet DIB and video tablet IIB, and this analog signal tablet AIB, digital signal tablet DIB link to each other with tablet IMB plate respectively with video tablet IIB.
Described analog signal tablet AIB comprises signal receiving unit, vision signal amplifying unit, synchronizing signal processing unit and other peripheral circuits, signal receiving unit is used for receiving the RGB analog video signal, receives the RGB analog video signal and is sent on the tablet IMB plate by vision signal amplifying unit and synchronizing signal processing unit.
Described digital signal tablet DIB comprises signal receiving circuit, digital video receiver, high-low level control circuit, multiplex interface and decoupling circuit and other peripheral circuits, and decoupling circuit is used for powering to signal receiving circuit; The data that signal receiving circuit is used for receiving TMDS signal and high-low level control circuit after handling send image processor to by multiplex interface then; Digital video receiver is used for receiving digital signals, produces the DIB data by the multiplex interface that is connected with digital video receiver then, sends on the IMB plate.
Described video tablet IIB comprises signal receiving circuit, video processor, decoupling power supply circuits and multiplex interface and other peripheral circuits; Decoupling circuit is used for powering to signal receiving circuit; Vision signal and other data enter video processor by signal receiving circuit, produce the IIB data by multiplex interface and are sent on the tablet IMB plate.
Compared with prior art, advantage of the present invention just is:
1, method and the device thereof that shows at the many picture-in-pictures of realization on the display of the present invention makes the user watch several signals simultaneously on a display, and do not spend switching; Each road signal can be controlled separately, window size, and the position can single pixel adjustment; Each road signal can carry out the color adjustment respectively, can merge setting, meets consumers' demand to greatest extent;
2, the method of many picture-in-pictures demonstrations and the occasion that device can be used for watching simultaneously a plurality of pictures thereof of on display, realizing of the present invention, needs according to the user, can VGA Display, DVI, three kinds of different compound modes of signal of VIDEO, make the user can be in the browsing page of one side, also can appreciate vision signal by the Video input, accomplish that really the work amusement neglects neither, a tractor serves several purposes, save cost, as the family expenses display, the user not only can appreciate the program of two-way VCD/DVD simultaneously, on one side more can see video disc, use computer to handle routine work on one side; The Surveillance center that the present invention also can be used for command and control center or market, sub-district monitors multiple signals simultaneously, and the operator not be used between several displays and walks up and down, and not only reduces the space but also save cost; Hence one can see that, and the present invention has good versatility, and applied widely.
Description of drawings
Fig. 1 is the structural framing schematic diagram of the embodiment of the invention;
Fig. 2 is the control principle framework schematic diagram of the embodiment of the invention;
Fig. 3 is the principle framework schematic diagram of input mainboard IMB in the embodiment of the invention;
Fig. 4 is the principle framework schematic diagram of analog signal tablet AIB in the embodiment of the invention;
Fig. 5 is the principle framework schematic diagram of digital signal tablet DIB in the embodiment of the invention;
Fig. 6 is the principle framework schematic diagram of video tablet IIB in the embodiment of the invention;
Fig. 7 is the circuit theory partial schematic diagram one of input mainboard IMB in the embodiment of the invention;
Fig. 8 is the circuit theory partial schematic diagram two of input mainboard IMB in the embodiment of the invention;
Fig. 9 is the circuit theory partial schematic diagram three of input mainboard IMB in the embodiment of the invention;
Figure 10 is the circuit theory partial schematic diagram four of input mainboard IMB in the embodiment of the invention;
Figure 11 is the circuit theory schematic diagram of analog signal tablet AIB in the embodiment of the invention;
Figure 12 is the circuit theory schematic diagram of digital signal tablet DIB in the embodiment of the invention;
Figure 13 is the circuit theory schematic diagram of video tablet IIb in the embodiment of the invention.
Marginal data
1, the first input signal end 2, the second input signal end
3, the 3rd input signal end 4, first image processor
5, second image processor 6, first memory
7, second memory 8, first microprocessor
9, second microprocessor 10, display
Embodiment
Below with reference to the drawings and specific embodiments the present invention is described in further details.
The method that on display, realizes many picture-in-pictures demonstrations of the present invention, at first adopt the method for cascade that a plurality of image processors are connected in turn, each image processor all links to each other with a memory, each image processor will be kept in the coupled memory after will synthesizing by certain algorithm by the input signal that input port receives, produce corresponding clock signals according to received signal format then, the row field sync signal, read data in the coupled memory simultaneously and send into the image processor of coupled next cascade, to last image processor, last image processor is sent to signal on the display 10 by corresponding clock signals and row field sync signal and shows signal successively.
As depicted in figs. 1 and 2, a kind of many picture-in-pictures device shown that on display, realizes, it comprises two or more image processors, two or more image processors are by digiverter cascade successively, each image processor links to each other with a microprocessor, a memory and a signal input unit respectively, and wherein the last image processor of cascade links to each other with video output unit by output port successively.Signal input unit comprises analog signal tablet AIB, digital signal tablet DIB and video tablet IIB.Present embodiment is an example with two image processors, first image processor 4 connects second image processor 5, first image processor 4 is undertaken certain algorithm to the signal that enters from the first input signal end 1 and the second input signal end 2 by first microprocessor 8 and is kept at the first memory 6 after synthetic, produce corresponding clock signal according to signal format then, the row field sync signal, the data that read simultaneously in the first memory 6 are sent into 5 processing of second image processor respectively.Second image processor 5 is connected with first image processor 4, it is undertaken the signal that is entered by first image processor 4 and the 3rd input signal end 3 to be kept in the second memory 7 after certain algorithm synthesizes by second microprocessor 9, and the data that read in the second memory 7 according to connect screen type are sent display 10 then.At this wherein, first memory 6 and second memory 7 all are used to preserve data, play data buffering.
Specifically, as shown in Figure 2, the rgb signal of first image processor 4, Hang Chang (H/V) synchronizing signal, clock DCLK output to RGB input, row (H/V) synchronizing signal, the clock DCLK of second image processor 5 respectively.First image processor 4 receives the signal of the first input signal end 1 and the second input signal end 2 from input, be kept in the first memory 6 after the two-way input signal being handled by certain algorithm by first microprocessor 8, produce row (H/V) synchronizing signal, clock DCLK output according to the required signal format that outputs to second image processor 5 then, read data in the first memory 6 simultaneously and send into the RGB passage respectively and output to second image processor 5 and handle.Second image processor 5 receives the signal that input signal and the 3rd input signal end 3 from first image processor 4 transmit, be kept in the second memory 7 after the two-way input signal being handled by certain algorithm by second microprocessor 9, the specification according to connecing screen outputs in the display 10 then.
As Fig. 3, Fig. 7, Fig. 8, Fig. 9 and shown in Figure 10, device of the present invention is all integrated to be located on the IMB interface motherboard, this IMB interface motherboard is made up of image processor, microprocessor, memory, digital visual interface etc., finish functions such as various Digital Video Processing, character stack, signalling channel switching, its critical piece is two image processor MX88L285 cascade, accept numeral or simulation or vision signal respectively, be connected with analog to digital converter AD9888 by a digital to analog converter ADV7123 therebetween.Can be divided into two working portions as shown in the figure, its operation principle is basic identical.At first select the classification of tablet according to the classification of input signal, three kinds of digital signal tablet DIB, analog signal tablet AIB, video tablet IIB are arranged respectively, convert the digital video signal of analog video signal, TMDS or LVDS interface, the TV signal of standard to the RGB serial data stream respectively, export to image processor.Program, processing that microprocessor is responsible among the fetch program register MX29F002 show OSD system and some serial datas and output it to image processor at screen.Image processor receives above input signal, is stored in then to carry out metadata cache among the SDRAM, handles and output to display by low-voltage differential signal LVDS controller at last.Digital signal tablet DIB, analog signal tablet AIB, video tablet IIB are connected to the IMB motherboard by 0.635mm high speed plugs and sockets, be input to two graphic process unit MX88L285 respectively, simultaneously the program among the program register MX29F002, show that at screen OSD system and some serial datas also export to image processor by microprocessor, image processor is connected to FLASH and carries out metadata cache, and be connected to low-voltage differential signal LVDS controller, be connected to display 10 at last.
As Fig. 4 and shown in Figure 11, AIB analog input plate comprises signal receiving unit, vision signal amplifying unit, synchronizing signal processing unit and other peripheral circuits, be used to receive the RGB analog video signal, convert thereof into the RGB serial data stream, be convenient to the IMB module and carry out Digital Video Processing.The computer mould analog signal is connected to the DSUB interface of 15 cores by vision cable, is converted to 24 digital signal by an AD conversion chip AD9888 then, is connected on the IMB plate.
As Fig. 5 and shown in Figure 12, DIB numeral tablet comprises signal receiving circuit, digital video receiver SIL161, high-low level control circuit, multiplex interface MUX, decoupling circuit and other peripheral circuits.Receiver is powered by decoupling circuit, receive the TMDS signal, receive the data of handling through the high-low level control circuit such as clock polarity control, odd and even data control, the control of clock form, pixel selection and drive strength selection simultaneously, the parallel rgb signal of output, clock signal, input control synchronously etc. are all passed through MUX and are converted into the RGB serial data stream, are convenient to the IMB module and carry out Digital Video Processing.Digital signal inserts 28 core DVI sockets, be converted into the TMDS signal and insert digital video receiver SIL161, the DC/DC converter provides 3.3V voltage to digital video receiver by decoupling circuit, utilize high-low level that receiver is realized clock polarity control simultaneously, odd and even data output control, the control of clock form, pixel selection and drive strength are selected.Be connected to multiplex interface MUX by digital video receiver, produce the DIB data, send on the IMB plate.
As Fig. 6 and shown in Figure 13, IIB video tablet comprises signal receiving circuit, video processor VPC3230, decoupling power supply circuits, multiplex interface MUX and other peripheral circuits.Vision signal enters video processor by receiving circuit, also have serial clock signal and serial data simultaneously, obtain carrier chrominance signal, luminance signal, chroma luminance clock status, interlacing scan and dynamic video data etc. after the processing, be converted into the RGB serial data stream through multiplex interface at last, be convenient to the IMB module and carry out Digital Video Processing.TV signal links to each other with BNC connector by vision cable, input video processor VPC3230.The DC/DC converter provides 3.3V voltage to video processor by decoupling circuit, and video processor produces 16 digital signal input multiplex interface MUX, produces the IIB data and exports on the IMB plate.
Claims (6)
1, a kind of method that on display, realizes many picture-in-pictures demonstrations, it is characterized in that: at first adopt the method for cascade that a plurality of image processors are connected in turn, each image processor all links to each other with microprocessor with a memory, each image processor will be kept in the coupled memory after will synthesizing by certain algorithm by the input signal that input port receives, produce corresponding clock signals according to received signal format then, the row field sync signal, read data in the coupled memory simultaneously and send into the image processor of coupled next cascade, to last image processor, last image processor is sent to signal on the display by corresponding clock signals and row field sync signal and shows signal successively.
2, a kind of many picture-in-pictures device shown that on display, realizes, it is characterized in that: it comprises two or more image processors, two or more image processors are by digiverter cascade successively, each image processor links to each other with a microprocessor, a memory and a signal input unit respectively, and wherein the last image processor of cascade links to each other with video output unit by output port successively.
3, many picture-in-pictures device shown that on display, realizes according to claim 2, it is characterized in that: described signal input unit comprises analog signal tablet AIB, digital signal tablet DIB and video tablet IIB, and this analog signal tablet AIB, digital signal tablet DIB link to each other with tablet IMB plate respectively with video tablet IIB.
4, many picture-in-pictures device shown that on display, realizes according to claim 3, it is characterized in that: described analog signal tablet AIB comprises signal receiving unit, vision signal amplifying unit, synchronizing signal processing unit and other peripheral circuits, signal receiving unit is used for receiving the RGB analog video signal, receives the RGB analog video signal and is sent on the tablet IMB plate by vision signal amplifying unit and synchronizing signal processing unit.
5, many picture-in-pictures device shown that on display, realizes according to claim 3, it is characterized in that: described digital signal tablet DIB comprises signal receiving circuit, digital video receiver, high-low level control circuit, multiplex interface and decoupling circuit and other peripheral circuits, and decoupling circuit is used for powering to signal receiving circuit; The data that signal receiving circuit is used for receiving TMDS signal and high-low level control circuit after handling send image processor to by multiplex interface then; Digital video receiver is used for receiving digital signals, produces the DIB data by the multiplex interface that is connected with digital video receiver then, sends on the IMB plate.
6, many picture-in-pictures device shown that on display, realizes according to claim 3, it is characterized in that: described video tablet IIB comprises signal receiving circuit, video processor, decoupling power supply circuits and multiplex interface and other peripheral circuits; Decoupling circuit is used for powering to signal receiving circuit; Vision signal and other data enter video processor by signal receiving circuit, produce the IIB data by multiplex interface and are sent on the tablet IMB plate.
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| CNB200510136650XA CN100359930C (en) | 2005-12-30 | 2005-12-30 | Method for realizing multiple picture-in-picture display on display device and apparatus thereof |
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| CNB200510136650XA CN100359930C (en) | 2005-12-30 | 2005-12-30 | Method for realizing multiple picture-in-picture display on display device and apparatus thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101621674B (en) * | 2009-07-09 | 2011-07-06 | 华为技术有限公司 | Processing method of video data and related equipment and system |
| CN102387290B (en) * | 2011-11-04 | 2013-04-17 | 北京淳中视讯科技有限公司 | Field synchronizing signal transmission method and system |
| CN102665048A (en) * | 2012-04-12 | 2012-09-12 | 北京华夏电通科技股份有限公司 | Method and system for implementation of multi-picture composition |
| CN102724431A (en) * | 2012-06-19 | 2012-10-10 | 深圳市宇泰科技有限公司 | Method and system for synthesis of multipicture high-definition images |
| CN103118247B (en) * | 2013-02-22 | 2016-08-10 | 华为技术有限公司 | Video data handling procedure and device, video cascade system and chip |
| KR102400104B1 (en) * | 2015-10-28 | 2022-05-19 | 삼성전자주식회사 | Image processing apparatus and Image processing method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003309780A (en) * | 2002-04-18 | 2003-10-31 | Matsushita Electric Ind Co Ltd | Picture display device |
| CN1536883A (en) * | 2003-04-11 | 2004-10-13 | Lg电子株式会社 | Apparatus and method for playback PIP on display device |
| CN2862534Y (en) * | 2005-12-31 | 2007-01-24 | 长城信息产业股份有限公司 | Device utilizing pictures-in-pictures display in display unit |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003309780A (en) * | 2002-04-18 | 2003-10-31 | Matsushita Electric Ind Co Ltd | Picture display device |
| CN1536883A (en) * | 2003-04-11 | 2004-10-13 | Lg电子株式会社 | Apparatus and method for playback PIP on display device |
| CN2862534Y (en) * | 2005-12-31 | 2007-01-24 | 长城信息产业股份有限公司 | Device utilizing pictures-in-pictures display in display unit |
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Effective date of registration: 20190805 Address after: 410205 Room 1001, Building 10, Changsha Zhongdian Software Park, 39 Jianshan Road, Changsha High-tech Development Zone, Hunan Province Co-patentee after: Changsha HCC HIDEN Technology Co., Ltd. Patentee after: Hunan Great Wall Science and Technology Information Co., Ltd. Address before: 410007 No. 161 Yuhua Road, Changsha City, Hunan Province Co-patentee before: Changsha HCC HIDEN Technology Co., Ltd. Patentee before: GreatWall Information Industry Co., Ltd. |
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