CN2831435Y - Chip connecting pads arrangement - Google Patents
Chip connecting pads arrangement Download PDFInfo
- Publication number
- CN2831435Y CN2831435Y CN 200520114404 CN200520114404U CN2831435Y CN 2831435 Y CN2831435 Y CN 2831435Y CN 200520114404 CN200520114404 CN 200520114404 CN 200520114404 U CN200520114404 U CN 200520114404U CN 2831435 Y CN2831435 Y CN 2831435Y
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- China
- Prior art keywords
- chip
- point
- connection
- connection pad
- pad
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- Expired - Lifetime
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
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- Semiconductor Integrated Circuits (AREA)
Abstract
A kind of chip connecting pad is arranged, and is suitable for being configured on the active surface of a chip, and this chip connecting pad is arranged and comprised most point-like connection pads and at least one non-point-like connection pad.The area of non-point-like connection pad is more than or equal to the area sum of two point-like connection pads.Non-lug type chip encapsulation of the present utility model is because its chip has non-point-like connection pad as non-signal connection pad, go into sectional area so can increase the output of power supply or ground connection connection pad, reducing the density of electric current, and promote the electrical characteristic of non-lug type chip encapsulation of the present utility model.
Description
Technical field
The utility model relates to a kind of chip connecting pad and arranges, and particularly arranges relevant for a kind of chip connecting pad that is applied to non-lug type chip encapsulation.
Background technology
Along with making rapid progress of electronic technology, be many-sided requirements such as high speed processingization, multifunction, high productive setization (integration), miniaturization and and low priceization of strengthening electronic element, so chip encapsulation technology is also and then towards microminiaturization and densification development.Existing known ball pin trellis array (ball grid array, BGA) encapsulation technology often adopts the carrier (carrier) of base plate for packaging (package substrate) as integrated circuit (IC) chip (IC chip), and utilize chip bonding (flipchip bonding) or routing joining technique electrical connection technologies such as (wire bonding), chip is electrically connected to the end face of base plate for packaging, and many soldered balls (solder ball) is disposed at the bottom surface of base plate for packaging in face array (areaarray) mode.Therefore, chip is able to a plurality of soldered balls via the internal wiring of base plate for packaging and bottom thereof, and is electrically connected to the electronic installation of next level, for example printed circuit board (PCB) etc.
Yet, because existing known BGA encapsulation technology must be utilized the base plate for packaging of high wiring density (high layoutdensity), and electric connection technology such as collocation chip bonding or routing joint, thereby cause the signal transmission path long.Therefore, developed at present a kind of bumpless formula increase the layer (bumpless build-up a layer, BBUL) chip encapsulation technology, it omits the processing procedure of chip bonding or routing joint, and directly on chip, make a multi-layer internal connection line (multi-layeredinterconnection structure), and, on multi-layer internal connection line, make electrical contacts such as soldered ball or stitch, in order to be electrically connected to the electronic installation of next level with the face array way.
See also Figure 1A, it illustrates the generalized section that has known a kind of non-lug type chip encapsulation now.Existing known non-lug type chip encapsulation 100 comprises a chip 110, an internal connection-wire structure 120, a fuel plate 130 and most soldered balls 140.Chip 110 is disposed on the fuel plate 130, and fuel plate 130 is as base plate or supporting layer.See also Figure 1B, it illustrates the chip of Figure 1A and the decomposing schematic representation of internal connection-wire structure.Chip 110 has most point-like connection pads 112, and these point-like connection pads 112 are arranged and are disposed on the active surface (active surface) 114 of chip 110 with the face array way.In addition, these point-like connection pads 112 comprise signal connection pad, ground connection connection pad and power supply connection pad.
See also Figure 1A, internal connection-wire structure 120 also is disposed on the fuel plate 130, and internal connection-wire structure 120 is to form in the mode that increases layer (build-up).Internal connection-wire structure 120 has an internal wiring 122 and most contact connection pads 124, and these contact connection pads 124 are disposed on the contact face 126 of internal connection-wire structure 120.Mandatory declaration be that these point-like connection pads 112 are to electrically connect mutually by internal wiring 122 with these contact connection pads 124 between any two.
Internal connection-wire structure 120 comprises most dielectric layers 128, most individual conduction duct 122a and most line layer 122b.Wherein, these conductions duct 122a constitutes internal wiring 122 with most line layer 122b.These conductions duct 122a runs through these dielectric layers 128 respectively, and dielectric layer 128 and these line layers 122b configuration interlaced with each other.Be to electrically connect each other between two line layer 122b by at least one conduction duct 122a.In addition, these soldered balls 140 of configuration on these contact connection pads 124 are in order to the electronic installation (Figure 1A does not illustrate) that is electrically connected to next level.
Yet power supply connection pad on the active surface of chip and ground connection connection pad can be along with dwindling of chip size significantly reduce, so and be unfavorable for the chip of large power supply design requirement, for example central processing unit (CPU).Therefore, the external form and the arrangement mode of the point-like connection pad of the chip of existing known non-lug type chip encapsulation are necessary to be improved.
Summary of the invention
In view of this, the purpose of this utility model is exactly to provide a kind of chip connecting pad to arrange, can be applicable to non-lug type chip encapsulation, going into sectional area with the output that increases power supply or ground connection connection pad, and then promotes the electrical characteristic of bumpless formula packaging body.
Based on above-mentioned purpose or other purposes, the utility model proposes a kind of chip connecting pad and arrange, be suitable for being configured on the active surface of a chip, this chip connecting pad is arranged and is comprised most point-like connection pads and at least one non-point-like connection pad.The area of non-point-like connection pad is more than or equal to the area sum of two point-like connection pads.
Based on above-mentioned, non-lug type chip encapsulation of the present utility model is because its chip has non-point-like connection pad as non-signal connection pad, go into sectional area so can increase the output of non-signal connection pad (for example power supply or ground connection connection pad), reducing the density of electric current, and then promote the electrical characteristic of non-lug type chip encapsulation of the present utility model.
For above-mentioned and other purposes, feature and advantage of the present utility model can be become apparent, a plurality of embodiment cited below particularly, and cooperate appended graphicly, be described in detail below.
Description of drawings
Figure 1A is the generalized section that has known a kind of non-lug type chip encapsulation now.
Figure 1B is the chip of Figure 1A and the decomposing schematic representation of internal connection-wire structure.
Fig. 2 is the generalized section of a kind of non-lug type chip encapsulation of the utility model first embodiment.
Fig. 3 is the chip of Fig. 2 and the decomposing schematic representation of internal connection-wire structure.
Fig. 4 is the generalized section of a kind of non-lug type chip encapsulation of the utility model second embodiment.
100: existing known non-lug type chip encapsulation
110,210: chip 112,212a: the point-like connection pad
114,214: active surface 120,220: internal connection-wire structure
122,222: internal wiring 122a, 222a: the conduction duct
122b, 222b: line layer 124,224: contact connection pad
126,226: contact face 128,228: dielectric layer
130,350: fuel plate 140: soldered ball
200,300: non-lug type chip encapsulation of the present utility model
212: chip connecting pad is arranged 212b: non-point-like connection pad
230: electrical contact 340: fin
352: electrode 354: electrode surface
356: non-electrode surface
Embodiment
See also Fig. 2, it illustrates the generalized section of a kind of non-lug type chip encapsulation of the utility model first embodiment.The non-lug type chip encapsulation 200 of present embodiment comprises an at least one chip 210 and an internal connection-wire structure 220.Chip 210 has a chip connecting pad and arranges 212 (see figure 3)s, and it is disposed on the active surface 214 of chip 210.See also Fig. 3, it illustrates the chip of Fig. 2 and the decomposing schematic representation of internal connection-wire structure.Chip connecting pad is arranged 212 and is comprised most point-like connection pad 212a and at least one non-point-like connection pad 212b, but not the area of point-like connection pad 212b is more than or equal to the area sum of two point-like connection pad 212a; In other words, a non-point-like connection pad 212b is that two or more adjacent point-like connection pad 212a merging form at least.
See also Fig. 2 and Fig. 3, chip 210 is to be embedded in the internal connection-wire structure 220, and internal connection-wire structure 220 is to form in the mode that increases layer.Internal connection-wire structure 220 has an internal wiring 222 and most contact connection pads 224, and these contact connection pads 224 are to be disposed on the contact face 226 of internal connection-wire structure 220.These point-like connection pads 212a of chip 210 at least one of them be can be by internal wiring 222 with these contact connection pads 224 one of them electrically connects mutually at least, perhaps the non-point-like connection pad 212b of chip 210 also can be by internal wiring 222 with these contact connection pads 224 one of them electrically connects mutually at least.
Internal connection-wire structure 220 for example comprises most dielectric layers 228, most individual conduction duct 222a and most line layer 222b.These conductions duct 222a runs through these dielectric layers 228 respectively, and wherein an at least one end and the non-point-like connection pad 212b of these conductions duct 222a electrically connect.These line layers 222b and these dielectric layers 228 are interconnected, and these line layers 222b and these conduction duct 222a constitutes above-mentioned internal wiring 222, and are to electrically connect by at least one of these conductions duct 222a between two line layer 222b.
See also Fig. 3, be parallel on the perspective plane of active surface 214 one with the conduction duct 222a that non-point-like connection pad 212b electrically connects mutually, the conduction duct 222a the local extension path can with the projection overlaid of extension path on this perspective plane of its non-point-like connection pad 212b that is electrically connected.In other words, the external form of the conduction duct 222a that electrically connects mutually with non-point-like connection pad 212b can be groove shape (slot) (Fig. 3 only schematically illustrates).
Offer a piece of advice it, if with function distinguishing, at least one of these point-like connection pads 212a for example is the signal connection pad, but not point-like connection pad 212b for example is non-signal connection pad (the non-signal connection pads of ground connection connection pad, power supply connection pad or other types).If distinguish with external form, non-point-like connection pad 212b for example is ring-type connection pad, strip connection pad or block connection pad etc., as shown in Figure 3.Mandatory declaration be, it is in order to give an example that the chip connecting pad of present embodiment arranges 212, be not in order to limit the utility model, in other words, chip connecting pad arranges 212 can have different spread patterns because of the different of the quantity of point-like connection pad 212a and non-point-like connection pad 212b or position, or can have different spread patterns because the external form of non-point-like connection pad 212b is different, for example be above-mentioned multiple non-point-like connection pad 212b external form any one, any two kinds ... or any multiple collocation.
What deserves to be mentioned is, see also Fig. 2, do not disposing electrical contact 230 to the situation of contact connection pad 224, these contact connection pads 224 can be applicable to fill up the signal output-input interface of lattice array (LGA) type.In addition, on these connection pads 224, also can dispose an electrical contact 230 respectively, and these electrical contacts 230 of present embodiment are conducting sphere (conductive ball), so that the signal output-input interface of sphere grid array (BGA) type to be provided.In addition, these electrical contacts 230 also conduct electricity stitch (conductivepin), so that the signal output-input interface of pin lattice array (PGA) type to be provided, but do not represent with drawing.Moreover these contact connection pads 224 can belong to the conductive layer of same patterning, because of its processing procedure is to be same as these line layers 222b, so these contact connection pad 224 formed conductive layers also can be considered one of these line layers 222b.
See also Fig. 4, it illustrates the generalized section of a kind of non-lug type chip encapsulation of the utility model second embodiment.Different with the foregoing description is that the non-lug type chip encapsulation 300 of present embodiment for example more comprises a fin (heat spreader) 340 and at least one fuel plate 350.Fuel plate 350 is disposed on chip 210 and the internal connection-wire structure 220, make fuel plate 350 can be considered one and carry the carrier (carrier) of chip 210 usefulness at this, fin 340 then is disposed on the non-electrode surface 356 away from chip 210 of fuel plate 350, promptly conducts to the surface of fin 340 in order to the high heat that chip 310 is produced.In this mandatory declaration is that in some cases, fin 340 also can directly be disposed on chip 210 and the internal connection-wire structure 220, and omits the configuration of fuel plate 350; Perhaps the operational temperature at chip 210 is lower, also can omit the configuration of fin 340.In other words, both can select fin 340 and fuel plate 350 one according to design requirement and be disposed on chip 210 and the internal connection-wire structure 220, or in regular turn fuel plate 350 and fin 340 are disposed on chip 210 and the internal connection-wire structure 220.
Fuel plate 350 has most electrodes 352, and it is disposed on the electrode surface 354 of fuel plate 350.In addition, these point-like connection pads 212a of chip 210 at least one of them be can be by the internal wiring 222 of internal connection-wire structure 220 with these electrodes 352 one of them electrically connects mutually at least; Perhaps the non-point-like connection pad 212b of chip 210 also can be by the internal wiring 222 of internal connection-wire structure 220 with these electrodes 352 one of them electrically connects mutually at least.In addition, these electrodes 352 at least one of them be can be by internal wiring 222 with these contact connection pads 224 of internal connection-wire structure 220 one of them electrically connects mutually at least.
Fuel plate 350 for example is tabular active member (panel-shaped active component) or tabular passive device (panel-shaped passive component), wherein tabular active member for example is the platelike crystal tube elements, and tabular passive device for example is tabular capacity cell, tabular resistive element or tabular inductance element etc.What deserves to be mentioned is that fuel plate 350 more can have active member part and passive device part simultaneously, and becomes integrated fuel plate.In addition and since fuel plate 350 can manufacture of semiconductor or the ceramic post sintering processing procedure made, so the material of fuel plate 350 can be silicon or pottery.
In sum, non-lug type chip encapsulation of the present utility model is because its chip has non-point-like connection pad as non-signal connection pad, go into sectional area so can increase the output of power supply or ground connection connection pad, reducing the density of electric current, and promote the electrical characteristic of non-lug type chip encapsulation of the present utility model.
Though the utility model discloses as above with a plurality of embodiment; right its is not in order to limit the utility model; anyly have the knack of this skill person; in not breaking away from spirit and scope of the present utility model; when can doing a little change and retouching, therefore protection range of the present utility model defines and is as the criterion when looking claim.
Claims (8)
1. a chip connecting pad is arranged, and is suitable for being configured on the active surface of a chip, it is characterized in that it comprises:
A most point-like connection pad; And
At least one non-point-like connection pad, the area of this non-point-like connection pad is more than or equal to the area sum of two those point-like connection pads.
2. chip connecting pad according to claim 1 is arranged, and it is characterized in that at least one of wherein said point-like connection pad is the signal connection pad.
3. chip connecting pad according to claim 1 is arranged, and it is characterized in that wherein said non-point-like connection pad is non-signal connection pad.
4. chip connecting pad according to claim 1 is arranged, and it is characterized in that wherein said non-point-like connection pad is the ground connection connection pad.
5. chip connecting pad according to claim 1 is arranged, and it is characterized in that wherein said non-point-like connection pad is the power supply connection pad.
6. chip connecting pad according to claim 1 is arranged, and it is characterized in that wherein said non-point-like connection pad is the ring-type connection pad.
7. chip connecting pad according to claim 1 is arranged, and it is characterized in that wherein said non-point-like connection pad is the strip connection pad.
8. chip connecting pad according to claim 1 is arranged, and it is characterized in that wherein said non-point-like connection pad is block connection pad.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200520114404 CN2831435Y (en) | 2005-07-26 | 2005-07-26 | Chip connecting pads arrangement |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200520114404 CN2831435Y (en) | 2005-07-26 | 2005-07-26 | Chip connecting pads arrangement |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN2831435Y true CN2831435Y (en) | 2006-10-25 |
Family
ID=37136363
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200520114404 Expired - Lifetime CN2831435Y (en) | 2005-07-26 | 2005-07-26 | Chip connecting pads arrangement |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN2831435Y (en) |
-
2005
- 2005-07-26 CN CN 200520114404 patent/CN2831435Y/en not_active Expired - Lifetime
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term |
Expiration termination date: 20150726 Granted publication date: 20061025 |
|
| EXPY | Termination of patent right or utility model |