CN2795869Y

CN2795869Y - Dynamic difference integrating signal pulse modulator

Info

Publication number: CN2795869Y
Application number: CN 200520001326
Authority: CN
Inventors: 袁国元; 黄一洲; 容绍泉
Original assignee: FUJING SEMICONDUCTOR Co Ltd
Current assignee: FUJING SEMICONDUCTOR Co Ltd
Priority date: 2005-01-20
Filing date: 2005-01-20
Publication date: 2006-07-12
Anticipated expiration: 2015-01-20

Abstract

The utility model relates to a dynamic difference integrating signal pulse modulator, which mainly utilizes an accumulator to accumulate and temporarily store a plurality of n-bit bus input signals. A digital bus signal and a set value constant input signal are output to be used as two input digital signals of a digital signal comparator; a 1-bit signal is output after compared, and is reclaimed as one of the n-bit bus input signals of the accumulator by a digital/digital converter. When a digital bus signal value is larger than a set value constant, the digital signal comparator generates digital signal output with state-converting high-low potentials; the output can further utilizes a reshaper to generate pulse wave width dynamic modulation digital output and to cause a display device to display counting power utilization values.

Description

Dynamic difference integrated signal pulse-modulator

Technical field

The utility model relates to a kind of dynamic difference integrated signal pulse-modulator, relate in particular to that a kind of to utilize the physical quantity of bus signals be that numerical value adds up, the framework that relatively calculates of setting value constant with an input, input signal is converted to the 1-bit digital output signal, and the pulse bandwidth of this output signal is done dynamically to change with the physical quantity of input signal, makes the demonstration of electricity consumption numerical display device more accurate.

Background technology

Known calculating user's the electricity consumption number of degrees and the main method of expense, be one inductive ac ammeter to be installed at user's feeder ear, described inductive ac ammeter adopts mechanical type wheel tumbler to advance mode and counts the electricity consumption number of degrees, and this kind mechanical type counting mode is rolled by gear driven.Simultaneously also there is higher error,, causes the electricity consumption numerical value that comes out and actual power consumption often to have great difference, thereby may cause supplier of electricity or user either party's error loss as the issuable error of manual metering.

Development and maturation along with electronics industry and digital technology, the computing framework of digital computation electricity consumption number is also developed, as the disclosed Technical Architecture of case before the patents such as No. the 5862069th, 5745323,5872469,5760619, the novel patent of U.S. utility, under the technology of digital computation electricity consumption numerical value, the electricity consumption numerical value that calculates gained is physical quantity, still need be converted to the form of frequency,, the electricity consumption numerical value that calculates gained is presented at the outside so that drive digital or the tumbling-type display device.

The described gained electricity consumption numerical value that will calculate is the technology that physical quantity signal is converted to frequency, also there is different Technical Architectures open in the case before No. 5760617 patent of the novel patent of U.S. utility, described framework technology mainly will be calculated the magnitude of voltage of gained, be converted to digital input signal values through ADC, utilize numeral/frequency translation unit to carry out conversion calculus output again, this framework technology can't be carried out the digital signal of output the dynamic modulation of pulse bandwidth.

Content of the present utility model

Fundamental purpose of the present utility model is to solve in the known technology electricity consumption numerical signal (being physical quantity signal) existing defective when being converted to frequency signal.The utility model provides a kind of dynamic difference integrated signal pulse-modulator, it can be converted to frequency signal with the electricity consumption numerical signal, and the digital signal of output carried out the dynamic modulation of pulse bandwidth, thereby the digital tumbling-type display device of accurate more driving is presented at the outside with the electricity consumption numerical value that calculates gained.

In order to realize described purpose, dynamic difference integrated signal pulse-modulator of the present utility model mainly with a plurality of n-bit bus-in singals, utilizes a totalizer to add up and temporary with a digital buffer, exports a number bus signal; Setting value constant input signal with a built-in setting or outside input, two supplied with digital signal as a digital signal comparer, through relatively exporting the 1-bit digital signal, simultaneously by one numeral/digital quantizer, be one of them of the n-bit bus-in singal of described totalizer and feedback, and at number bus signal numerical value during greater than the setting value constant, the digital signal comparer produces the digital signal output of high electronegative potential transition, described output can further utilize a shaper, produce the numeral output of pulse bandwidth dynamic modulation, so that display device shows counting electricity consumption numerical value.

Brief description of drawings

Fig. 1 is the architecture block diagram of the utility model first specific embodiment;

Fig. 2 is the architecture block diagram of the utility model second specific embodiment;

Fig. 3 is the architecture block diagram of the utility model the 3rd specific embodiment;

Fig. 4 is the pulse wave modulation synoptic diagram of the utility model specific embodiment;

Fig. 5 is the architecture block diagram of the utility model the 4th specific embodiment;

Fig. 6 is the architecture block diagram of the utility model the 5th specific embodiment;

Fig. 7 is the shaper architecture block diagram of the utility model specific embodiment.

In the accompanying drawing, the list of parts of each label representative is as follows:

1-totalizer 2-digital signal comparer

3-setting value constant input source 4-numeral/digital quantizer

5-shaper 11-digital adder

12-numeral buffer 51-waveform shaper

52-counter 53-filtering shielding device

Embodiment

Relevant technology contents of the present utility model and detailed description, existing conjunction with figs. is described as follows:

Fig. 1～Fig. 3 is the architecture block diagram of the utility model preferred embodiment dynamic difference integrated signal pulse-modulator.Its concrete framework comprises: a totalizer 1; One digital signal comparer 2; One setting value constant input source 3 and one numeral/digital quantizer 4.Wherein,

Totalizer 1, acquisition calculate electricity consumption numerical value n-bit bus signals, and the number bus signal is then exported in the calculation that adds up, as first supplied with digital signal of digital signal comparer 2; Totalizer 1 concrete framework comprises a digital adder 11, capture a plurality of n-bit bus-in singals, carry out the addition calculation, and the output digital signal that will result in, input digit buffer 12 is temporary, and the input end of digital buffer 12 is electrically connected with the output terminal of digital adder 11, comes the temporary digital signal that adds up and result in that obtains, and export a number bus signal, as first supplied with digital signal of digital signal comparer 2.

A plurality of n-bit bus-in singals of digital adder 11 acquisition input, acquisition are calculated the digital signal of feedbacking through numeral/digital quantizer 4 of the feedback signal of signal that electricity consumption numerical value n-bit bus input physical quantity is a numerical value, digital output signal that totalizer 1 produces and 2 outputs of digital signal comparer.

Digital signal comparer 2 mainly carries out the comparison of first supplied with digital signal and second supplied with digital signal, and described first supplied with digital signal is obtained the number bus signal of totalizer 1 output by the first input end electrical connection; Described second supplied with digital signal then is electrically connected a setting value constant input source 3 by second input end, obtains a setting value constant signal.By the number bus logarithmic output signal value of digital signal comparer 2 with acquisition, carry out numeric ratio with the setting value constant, the digital signal of output 1-bit, numerical value when the output of the number bus signal of totalizer 1, when the setting value constant numerical value of ratio second input end input is big, the output of high electronegative potential transition can take place in the output terminal of digital signal comparer 2, promptly is converted to the output frequency digital signal; The 1-bit digital signal of digital signal comparer 2 output will be through one numeral/digital quantizer 3, feedbacks to input to totalizer 1, as one of them of a plurality of n-bit bus-in singals of its acquisition.

Digital signal comparer 2 is electrically connected the second obtained supplied with digital signal, in the utility model preferred embodiment framework, second input end of digital signal comparer 2 is electrically connected a signal input sources, obtains one and first supplied with digital signal setting value constant relatively, as shown in Figure 1.

Second supplied with digital signal that 2 electrical connections of digital signal comparer obtain, in other preferred embodiment framework of the utility model, second input end of digital signal comparer 2 is electrically connected a critical value constant that is preset in the utility model clock pulse modulator, as shown in Figure 2; Perhaps utilize any of the fiducial value of outside input or critical value, as shown in Figure 3, as with first supplied with digital signal setting value constant relatively.

Framework according to the described dynamic difference integrated signal of the utility model the foregoing description pulse-modulator, the modulation running of its dynamic difference integrated signal clock pulse, as shown in Figure 4, totalizer 1 will capture a plurality of n-bit bus-in singals add up with temporary, and export a number bus signal, first supplied with digital signal as digital signal comparer 2, and obtain the signal of a setting value constant by setting value constant input source 3, second supplied with digital signal as the digital signal comparer, relatively output 1-bit signal by digital signal comparer 2, feedback through one numeral/digital quantizer 4 and to be one of them of the n-bit bus-in singal of totalizer, so, repeatedly through the relatively output 1-bit of digital signal comparer 2 signal, feedback to totalizer 1 calculation that adds up once more, when first supplied with digital signal is the numerical value of the number bus signal of totalizer 1 output, when being setting value constant numerical value greater than second supplied with digital signal, digital signal comparer 2 will produce high electronegative potential transition output, output frequency form digital signal makes the more accurate demonstration of display device calculate electricity consumption numerical value.

Fig. 5, Fig. 6 are the architecture block diagram of the other preferred embodiment dynamic difference integrated signal pulse-modulator of the utility model.Its concrete framework comprises equally: a totalizer 1; One digital signal comparer 2; One setting value constant input source 3 and one numeral/digital quantizer 4, wherein, described different architecture design is further to comprise a shaper 5, and it can carry out the digital signal of output the dynamic modulation of pulse bandwidth.

Totalizer 1 adds up a plurality of n-bit bus-in singals with temporary, and export a number bus signal, first input signal as digital signal comparer 2, and by the setting value constant of the interior setting value constant input source of establishing 3 inputs, as critical value constant or reference value, as shown in Figure 5, or by the setting value constant of outside input, input fiducial value as shown in Figure 6, second input signal as digital signal comparer 2, comparison through digital signal comparer 2, output 1-bit signal, the comparison output signal of digital signal comparer 2, at the first input signal numerical value is number bus signal numerical value, when being not the numerical value of setting value constant greater than second input signal, to feedback through one numeral/digital quantizer 4 and be one of them of the n-bit bus-in singal of totalizer 1, when through repeatedly feedbacking the calculation that adds up, the described first input signal numerical value is number bus signal numerical value, when being the numerical value of setting value constant greater than second input signal, digital signal comparer 2 produces high electronegative potential transition output, the signal of described high electronegative potential transition output, to import a shaper 5, the output pulse bandwidth is made dynamic modulated digital signal with the physical quantity of input signal, makes display device show counting electricity consumption numerical value.

Shaper 5 mainly performs calculations the 1-bit digital input signals, produce the 1-bit digital output signal, and described output signal pulse bandwidth is preferably the twice of digital input signals pulse bandwidth; Shaper 5 is in the utility model specific embodiment framework, as shown in Figure 7, contain a waveform shaper 51, one input end is electrically connected with the output terminal of digital signal comparer 2, obtain the signal of the high electronegative potential transition output that digital signal comparer 2 produced, waveform shaper 51 produces a digital half-wave output signal, back coupling is as another input signal of waveform shaper 51, the output signal of waveform shaper 51, through an event counter 52 countings, export digital signal to filtering shielding device 53,, export once the instant pulsewidth degree of wave mode modulated digital signal by filtering shielding device 53 waveform processing as its input signal.

The above only is a preferred embodiment of the present utility model, be not so promptly limit claim of the present utility model, the equivalent structure transformation that every utilization the utility model instructions and accompanying drawing content are done, directly or indirectly be used in other relevant technical field, all in like manner be included in the claim of the present utility model.

Claims

1. dynamic difference integrated signal pulse-modulator is characterized in that described clock pulse modulator comprises:

One totalizer;

One digital signal comparer, two input end are electrically connected with a described totalizer and a setting value constant input source respectively;

One numeral/digital quantizer, its input end is electrically connected with the output terminal of described digital signal comparer;

Wherein, a plurality of n-bit bus-in singals input to described totalizer, the output signal that described totalizer produces inputs to described digital signal comparer as first supplied with digital signal, the digital signal that described digital signal comparer produces is as the input signal of high electronegative potential transition output signal and described numeral/digital quantizer, and the back coupling digital signal that described numeral/digital quantizer produces exports described totalizer to.

2. dynamic difference integrated signal pulse-modulator as claimed in claim 1, it is characterized in that, described totalizer comprises a digital adder and a digital buffer, the input end of described digital buffer is electrically connected with the output terminal of described digital adder, wherein, described a plurality of n-bit bus-in singal is imported described totalizer, and the digital output signal that described totalizer produces exports described digital buffer to, and described digital buffer is exported a number bus signal.

3. dynamic difference integrated signal pulse-modulator as claimed in claim 1, it is characterized in that the input signal of described totalizer is the feedback signal of calculating signal that electricity consumption numerical value n-bit bus input physical quantity is a numerical value, digital output signal that totalizer produces and the digital signal that the output of described digital signal comparer is feedback through numeral/digital quantizer.

4. dynamic difference integrated signal pulse-modulator as claimed in claim 1, it is characterized in that the reference value constant of establishing in the described setting value constant input source is as importing described digital signal comparer with the second supplied with digital signal setting value constant of the first supplied with digital signal comparison.

5. dynamic difference integrated signal pulse-modulator as claimed in claim 1, it is characterized in that the critical value constant of establishing in the described setting value constant input source is as importing described digital signal comparer with the second supplied with digital signal setting value constant of the first supplied with digital signal comparison.

6. dynamic difference integrated signal pulse-modulator as claimed in claim 1, it is characterized in that, by any of critical value of establishing in the fiducial value of outside input, the described setting value constant input source or reference value, as importing described digital signal comparer with the second supplied with digital signal setting value constant of the first supplied with digital signal comparison.

7. dynamic difference integrated signal pulse-modulator as claimed in claim 1, it is characterized in that, during greater than second supplied with digital signal, the output terminal of described digital signal comparer is exported the signal of high electronegative potential transition, promptly changes the output frequency digital signal at first supplied with digital signal.

8. dynamic difference integrated signal pulse-modulator is characterized in that described clock pulse modulator comprises:

One totalizer;

One numeral/digital quantizer, input end is electrically connected with the output terminal of described digital signal comparer;

One shaper is electrically connected with described digital signal comparator output terminal;

A plurality of n-bit bus-in singals input to described totalizer, described totalizer carries out the number bus signal that signal numerical value adds up and temporary back produces and inputs to described digital signal comparer as first supplied with digital signal, the digital signal that described digital signal comparer produces is as the input signal of high electronegative potential transition output signal and numeral/digital quantizer, the back coupling digital signal that described numeral/digital quantizer produces exports totalizer to, and described reshaper receives described high electronegative potential transition output signal and exports the digital signal of pulse bandwidth dynamic modulation.

9. dynamic difference integrated signal pulse-modulator as claimed in claim 8 is characterized in that described shaper contains:

One waveform shaper, an input end is electrically connected with the output terminal of described digital signal comparer;

One counter, input end is electrically connected with described waveform shaper output terminal;

One filtering shielding device, input end is electrically connected with described counter output;

Wherein, the digital half-wave output signal that described waveform shaper produces inputs to described counter, and back coupling is another input signal of described waveform shaper, the digital output signal that described counter produces inputs to described filtering shielding device, and described filtering shielding device is exported once the instant pulsewidth degree of wave mode modulated digital signal.