CN2766287Y - Error detecting device - Google Patents
Error detecting device Download PDFInfo
- Publication number
- CN2766287Y CN2766287Y CN 200420122299 CN200420122299U CN2766287Y CN 2766287 Y CN2766287 Y CN 2766287Y CN 200420122299 CN200420122299 CN 200420122299 CN 200420122299 U CN200420122299 U CN 200420122299U CN 2766287 Y CN2766287 Y CN 2766287Y
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- CN
- China
- Prior art keywords
- mainboard
- electrically connected
- chipset
- gpo
- debug
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Abstract
The utility model provides an error detecting device which is used for detecting a mainboard of electronic equipment. The mainboard comprises a chip group provided with a plurality of GPO leading legs, an operating state capable of detecting the mainboard, and a BIOS which outputs an error detecting signal to the GPO leading legs of the chip group; the error detecting device comprises a connecting unit which is electrically connected with the chip group and can receive the error detecting signal of the GPO leading legs, and a display unit which is electrically connected with the connecting unit. The display unit can display the error detecting signal transmitted by the GPO leading legs so as to correspondingly find out mainboard interface equipment which operates irregularly.
Description
Technical field
The utility model relates to a kind of debug device, particularly relates to a kind of debug device that is used to detect the duty of electronic equipment mainboard.
Background technology
Be widely used in computer system, server system ... Deng the mainboard in the electronic equipment (figure does not show), can be used as being connected and transmission medium between each hardware element and the interfacing equipment, and the expansion slot that generally is provided with microprocessor slot, chipset (for example: north bridge, South Bridge chip), bus (BUS), peripheral device (for example: peripheral element connecting interface (PCI)) etc.Wherein, all be provided with chipset on each mainboard, in order to the interfacing equipment of control linkage on mainboard.
A kind of traditional debug device (not shown) is to be used for electrically being plugged on the mainboard with perimeter component connecting interface (PCI), to detect the duty of this mainboard and interfacing equipment.
During use, when this mainboard and interfacing equipment work, can utilize this debug device to detect its duty, and when mainboard work generation problem, error message is presented on the display unit of this debug device, at this moment, the tester can contrast by the manual testing that error message and this debug device is subsidiary, finds out the problem origination point to repair.
Because this debug device is only applicable to be provided with the mainboard of PCI, in practice, can't be applied thereon and not be provided with expansion slot or (for example be not provided with on the mainboard of PCI, the mainboard of cutter point server (Blade Sever) is not provided with PCI), can limit its range of application relatively like this, thereby highlight the shortcoming of its practicality deficiency.
The utility model content
Therefore, the purpose of this utility model provides a kind of debug device that is applicable to the chipset of a plurality of GPO pins of having of mainboard.
According to debug device of the present utility model, be used to detect the mainboard of electronic equipment, this mainboard comprises a chipset with a plurality of GPO pins, and BIOS who is electrically connected with this chipset, this BIOS can detect the duty of this mainboard, and when this mainboard work makes a mistake, a debug signal being outputed to the GPO pin of this chipset, this debug device comprises a linkage unit and a display unit.This linkage unit is electrically connected this chipset, is used to receive the debug signal of this GPO pin.This display unit is electrically connected this linkage unit, is used to show the debug signal of GPO pin transmission, finds out the abnormal mainboard interface equipment of work with correspondence.
Description of drawings
Below by most preferred embodiment and accompanying drawing the utility model arrangement for detecting is elaborated, in the accompanying drawing:
Fig. 1 is a circuit block diagram of the preferred embodiment of debug device of the present utility model, is used to illustrate that this debug device comprises the linkage unit of a plurality of GPO pins of a chipset that is electrically connected mainboard, and a display unit that is electrically connected this linkage unit;
Fig. 2 is a circuit block diagram of the preferred embodiment, is used to illustrate that this display unit comprises two drive IC that are electrically connected the GPO pin of this chipset, and the seven-segment display of two corresponding these drive IC of electrical connection;
Fig. 3 is a circuit block diagram of the preferred embodiment, is used to illustrate that this display unit comprises eight resistance that are electrically connected the GPO pin of this chipset, and eight corresponding light emitting diodes that are electrically connected in series with above-mentioned resistance R.
Detailed Description Of The Invention
Before proposing detailed description, it should be noted that in the following description, similar elements is represented with same numeral.
As shown in Figure 1, 2, it is a preferred embodiment of debug device 1 of the present utility model, it is the mainboard (Motherboard) 2 that is used to detect electronic equipment, this mainboard 2 comprises a chipset 3 with a plurality of GPO (General Purpose output) pin 31, and a BIOS who is electrically connected with this chipset 3 (Basic Input/Output System) 4.In the present embodiment, this chipset 3 can be north bridge, South Bridge chip or other has the system control chip (not shown) of GPO pin.This BIOS 4 can be by sequencing, detecting the duty of this mainboard 2, and a debug signal is outputed to the GPO pin 31 of this chipset 3 when these mainboard 2 work make a mistake.Owing to will produce different debug signals corresponding to the difference of bios programization, so in practice, the tester need consult manual testing that the bios program deviser formulates understanding the meaning of this debug signal representative, thereby finds out problem points so that address this problem.Be eight pins such as GPO0～GPO7 of using this chipset 3 in the present embodiment.This debug device 1 comprises a linkage unit 5 and a display unit 6.
This linkage unit 5 is electrically connected this chipset 3, is used to receive the debug signal of this GPO pin 31, and it comprises an impact damper 51 that is electrically connected the GPO pin 31 of this chipset 3, and a Port 52 that is electrically connected this impact damper 51.This Port 52 can be COM2 Port or other Port that is suitable for.
This display unit 6 is electrically connected this linkage unit 5, is used to show the debug signal of GPO pin 31 transmission, finds out the abnormal mainboard interface equipment of work (not shown) with correspondence.In practice, the tester contrasts error message and manual testing (not shown), finds out the problem origination point to repair.Collocation as shown in Figure 2, this display unit 6 comprises two drive IC 61 that are electrically connected the GPO pin 31 of this chipset 3, and two seven-segment displaies 62 with these drive IC 61 corresponding electrical connections, thus, can for the operator after the shown numerical information of this seven-segment display of direct viewing 62, contrast this manual testing again to learn wrong scene.This drive IC 61 can be TTL 7447 or other IC that is suitable for.
As shown in Figure 3, this display unit 6 ' also can adopt another embodiment, it comprises eight resistance R that are electrically connected the GPO pin 31 of this chipset 3, and eight corresponding light emitting diodes that are electrically connected in series 63 with above-mentioned resistance R, thus, can for the operator after the action of watching this light emitting diode 63, contrast this manual testing again to learn wrong scene.
During use, when this mainboard 2 is worked with interfacing equipment, can utilize this debug device 1 to detect its duty, and when these mainboard 2 work generation problems, error message is presented on the seven-segment display 62 (or light emitting diode 63) of this display unit 6, at this moment, the tester can contrast error message and this manual testing, finding out the problem origination point, thereby repair.
1 obtainable beneficial effect of debug device of the present utility model is as described below:
Claims (6)
1, a kind of debug device, be used to detect the mainboard of electronic equipment, this mainboard comprises a chipset with a plurality of GPO pins, and BIOS who is electrically connected with this chipset, this BIOS can detect the duty of described mainboard, and when described mainboard work makes a mistake, a debug signal is outputed to the GPO pin of described chipset, described debug device comprises a linkage unit and a display unit, it is characterized in that:
Described linkage unit is electrically connected described chipset, is used to receive the debug signal of described GPO pin; And
Described display unit is electrically connected described linkage unit, is used to the debug signal that shows that described GPO pin transmits.
2, debug device as claimed in claim 1 is characterized in that:
Described linkage unit comprises an impact damper that is electrically connected the GPO pin of described chipset, and a connectivity port that is electrically connected this impact damper; Described display unit and detachable liftoff electrical connection of this Port.
3, debug device as claimed in claim 1 is characterized in that:
Described display unit comprises that at least one is electrically connected the drive IC of the GPO pin of described chipset, and at least one and the display of the corresponding electrical connection of this drive IC.
4, debug device as claimed in claim 3 is characterized in that:
Described display is a seven-segment display.
5, debug device as claimed in claim 1 is characterized in that:
Described display unit comprises the resistance of the GPO pin of the described chipset of a plurality of electrical connections, and the corresponding light-emitting component that is electrically connected in series of a plurality of and above-mentioned resistance.
6, debug device as claimed in claim 5 is characterized in that:
Described light-emitting component is a light emitting diode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200420122299 CN2766287Y (en) | 2004-12-27 | 2004-12-27 | Error detecting device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200420122299 CN2766287Y (en) | 2004-12-27 | 2004-12-27 | Error detecting device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN2766287Y true CN2766287Y (en) | 2006-03-22 |
Family
ID=36606948
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200420122299 Expired - Lifetime CN2766287Y (en) | 2004-12-27 | 2004-12-27 | Error detecting device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN2766287Y (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104200756A (en) * | 2014-09-18 | 2014-12-10 | 浪潮电子信息产业股份有限公司 | Design method of Debug indicator lamp capable of saving mainboard space |
-
2004
- 2004-12-27 CN CN 200420122299 patent/CN2766287Y/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104200756A (en) * | 2014-09-18 | 2014-12-10 | 浪潮电子信息产业股份有限公司 | Design method of Debug indicator lamp capable of saving mainboard space |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20090109 Address after: No. 1558 Chang Tung Road, integrated circuit Industrial Zone, Zhangjiang hi tech park, Shanghai, China: 201203 Co-patentee after: Huanlong Electric Co., Ltd. Patentee after: Huanxu Electronics Co., Ltd. Address before: Taiwan, Nantou County Province, china: Patentee before: Huanlong Electric Co., Ltd. |
|
| ASS | Succession or assignment of patent right |
Owner name: HUAN SOLECTRON JIANMEI ELECTRONICS CO LTD Free format text: FORMER OWNER: UNIVERSAL SCIENTIFIC INDUSTRIAL CO., LTD. Effective date: 20090109 |
|
| ASS | Succession or assignment of patent right |
Free format text: FORMER OWNER: HUANLONG ELECTRIC CO LTD |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20100730 Address after: Zhangjiang hi tech park integrated circuit industry Zhang Road 201203 Shanghai City No. 1558 Patentee after: Huanxu Electronics Co., Ltd. Address before: Zhangjiang hi tech park integrated circuit industry Zhang Road 201203 Shanghai City No. 1558 Co-patentee before: Huanlong Electric Co., Ltd. Patentee before: Huanxu Electronics Co., Ltd. |
|
| C17 | Cessation of patent right | ||
| CX01 | Expiry of patent term |
Expiration termination date: 20141227 Granted publication date: 20060322 |