CN2753063Y - Radio data communication simulated function subcard - Google Patents
Radio data communication simulated function subcard Download PDFInfo
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- CN2753063Y CN2753063Y CN 200420088700 CN200420088700U CN2753063Y CN 2753063 Y CN2753063 Y CN 2753063Y CN 200420088700 CN200420088700 CN 200420088700 CN 200420088700 U CN200420088700 U CN 200420088700U CN 2753063 Y CN2753063 Y CN 2753063Y
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- chip
- lvds interface
- subcard
- interface chip
- lvds
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- 238000004891 communication Methods 0.000 title abstract description 5
- 238000005516 engineering process Methods 0.000 claims description 6
- 238000012545 processing Methods 0.000 abstract description 18
- 238000000034 method Methods 0.000 abstract description 3
- 238000004088 simulation Methods 0.000 abstract 1
- 238000011160 research Methods 0.000 description 5
- 230000005540 biological transmission Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000010200 validation analysis Methods 0.000 description 1
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Abstract
The utility model discloses a radio data communication simulation function subcard which is characterized in that a circuit board is provided with two LVDS interface chips with low voltage difference signal technique, wherein one LVDS interface chip is used for transmitting signals and the other LVDS interface chip is used for receiving signals. Simultaneously, the circuit board is also provided with two RJ45 interfaces which are used for connecting in series with the function subcards, wherein one RJ45 interface is electrically connected with the LVDS interface chip which is used for transmitting signals and the other RJ45 interface is electrically connected with the LVDS interface chip which is used for receiving signals. The working power supplies of the two LVDS interface chips are supplied by an external power supply. A user can limberly and stably realize the connection between digital signal processing chips at a high speed by using the function subcard.
Description
Technical field
The utility model relates to a kind of RFDC copying subcard, belongs to wireless communication field.
Background technology
In recent years, because the high speed development of Digital Signal Processing is more and more higher to the requirement of digital conversion speed, simultaneously the signal integrity of entire circuit system is also had higher requirement.Therefore the digital signal processing chip that more and more has high speed and stability is applied.But the processing speed of an independent sometimes digital signal processing chip can not satisfy the requirement of system, perhaps in order to satisfy the flexibility of certain research, digital signal processing chip more than two or two is together in series, such as in the research of wireless communication sumulating, realize by two digital signal processing chips, one is used for producing the needed signal of research, and another piece is used for the effect of validation of wireless communication reception technique.Just need be between this by certain easy and high efficiency method two digital signal processing chips are coupled together.But in the prior art, if the serial ports directly by digital signal processing chip connects, system is stable very poor on the one hand, and the error rate of transmission is very high, and the distance of putting between two digital signal processing chips also has been subjected to very big restriction on the other hand; If the digital signal processing chip that will need to connect is produced on the same circuit board, one side technical sophistication, cost height, so on the other hand way flexibility is very poor, when the digital signal processing chip that needs varying number need couple together, just needs circuit board manufacturing again.
Summary of the invention
The purpose of this utility model designs at the problem of above-mentioned existence, the existing circuit board that contains digital signal processing chip is improved, on described circuit board, set up a function subcard, with flexibly, at a high speed and the connection between the stable realization digital signal processing chip.
The purpose of this utility model is achieved in that a kind of RFDC copying subcard, it is characterized in that: two chips that contain Low Voltage Differential Signal technology LVDS interface are installed on a circuit board, wherein a LVDS interface chip is used to transmit, and another piece LVDS interface chip is used for received signal; Also install simultaneously two on the circuit board and be used for the RJ45 interface of connecting between the function subcard, a RJ45 interface is electrically connected with the LVDS interface chip that is used to transmit, and another RJ45 interface is electrically connected with the LVDS interface chip that is used for received signal; Two LVDS interface chips provide working power by external power source.
Above-mentioned RFDC copying subcard, the LVDS interface chip that is used to launch adopts the SN65LVDS31 chip; The LVDS interface chip that is used to receive adopts the SN65LVDS32 chip.
Above-mentioned RFDC copying subcard, the LVDS interface chip that is used to launch adopts the SN55LVDS31 chip; The LVDS interface chip that is used to receive adopts the SN55LVDS32 chip.
The utlity model has following advantage: because the employing of function subcard is the LVDS interfacing, the core of this technology is to adopt extremely low voltage swing high-speed-differential transmission data, can realize point-to-point or a bit to connection of multiple spot, have low-power consumption, low error rate, low crosstalking and characteristics such as low radiation.Two circuit boards can be separated the distance than broad under the prerequisite that does not influence the signal integrity high-speed transfer.Can effectively utilize the space, make things convenient for putting of equipment; Owing to only need above-mentioned link, reduced experimentation cost, efficiently solve the funding problems that perplexs the scientific research personnel for a long time; Because this function subcard has the data transmit-receive function simultaneously,, just can realize flexibly and easily that the polylith digital signal processing chip directly is connected in series as long as on the circuit board of each band Digital Signal Processing, all increase an above-mentioned functions subcard.
Below in conjunction with the drawings and specific embodiments the utility model is described in further detail.
Description of drawings
Fig. 1 is the hardware logic block diagram of the utility model RFDC copying subcard;
Fig. 2 is the circuit theory diagrams of the utility model RFDC copying subcard example;
Embodiment
As shown in Figure 1 and Figure 2, a kind of RFDC copying subcard, it is characterized in that: two chips that contain Low Voltage Differential Signal technology LVDS interface are installed on a circuit board 6, wherein a LVDS interface chip 1 is used to transmit, and another piece LVDS interface chip 2 is used for received signal; Also install simultaneously two on the circuit board 6 and be used for the RJ45 interface of connecting between the function subcard, a RJ45 interface 3 is electrically connected with the LVDS interface chip 1 that is used to transmit, and another RJ45 interface 4 is electrically connected with the LVDS interface chip 2 that is used for received signal; Two LVDS interface chips provide working power by external power source.Above-mentioned RFDC copying subcard, the LVDS interface chip that is used to launch adopts SN65LVDS31 chip or SN55LVDS31 chip; The LVDS interface chip that is used to receive adopts SN65LVDS32 chip or SN55LVDS32 chip.In the present embodiment, the LVDS interface chip 1 that is used to launch adopts the SN65LVDS31 chip, its input pin 2A is a signal input pin, connect outer data-signal by resistance R 1, input pin 3A is the clock signal input pin, connect external timing signal by resistance R 2, input pin 4A is the frame synchronizing signal input pin, connects the external frame synchronizing signal by resistance R 3; Output pin 2Y and output pin 2Z link to each other with the 4th pin with the 3rd of RJ45 interface 3 respectively, load resistance R4 also in parallel between output pin 2Y and the output pin 2Z; Output pin 3Y and output pin 3Z link to each other with the 6th pin with the 5th of RJ45 interface 3 respectively, load resistance R5 also in parallel between output pin 3Y and the output pin 3Z; Output pin 4Y and output pin 4Z link to each other with the 8th pin with the 7th of RJ45 interface 3 respectively, load resistance R6 also in parallel between output pin 4Y and the output pin 4Z.The LVDS interface chip 2 that is used to receive adopts the SN65LVDS32 chip.Its input pin 2A and input pin 2B link to each other with the 4th pin with the 3rd of RJ45 interface 4 respectively, input pin 3A and input pin 3B link to each other with the 6th pin with the 5th of RJ45 interface 4 respectively, and input pin 4A and input pin 4B link to each other with the 8th pin with the 7th of RJ45 interface 4 respectively; Output pin 2Y is a signal input pin, connects outer data-signal, and its output pin 3Y is the clock signal input pin, connects external timing signal, and its output pin 4Y is the frame synchronizing signal input pin, connects the external frame synchronizing signal.Because what the function subcard adopted is the LVDS interfacing, the core of this technology is to adopt extremely low voltage swing high-speed-differential transmission data, can realize point-to-point or a bit to connection of multiple spot, have low-power consumption, low error rate, low crosstalking and characteristics such as low radiation.Two circuit boards can be separated the distance than broad under the prerequisite that does not influence the signal integrity high-speed transfer.Can effectively utilize the space, make things convenient for putting of equipment; Owing to only need above-mentioned link, reduced experimentation cost, efficiently solve the funding problems that perplexs the scientific research personnel for a long time; Because this function subcard has the data transmit-receive function simultaneously,, just can realize flexibly and easily that the polylith digital signal processing chip directly is connected in series as long as on the circuit board of each band Digital Signal Processing, all increase an above-mentioned functions subcard.
Claims (5)
1, a kind of RFDC copying subcard, it is characterized in that: go up at a circuit board (6) two chips that contain Low Voltage Differential Signal technology LVDS interface are installed, wherein a LVDS interface chip (1) is used to transmit, and another piece LVDS interface chip (2) is used for received signal; Also install simultaneously two on the circuit board (6) and be used for the RJ45 interface of connecting between the function subcard, a RJ45 interface (3) is electrically connected with the LVDS interface chip (1) that is used to transmit, and another RJ45 interface (4) is electrically connected with the LVDS interface chip (2) that is used for received signal; Two LVDS interface chips provide working power by external power source.
2, RFDC copying subcard according to claim 1 is characterized in that: the LVDS interface chip (1) that is used to launch adopts the SN65LVDS31 chip.
3, RFDC copying subcard according to claim 1 is characterized in that: the LVDS interface chip (2) that is used to receive adopts the SN65LVDS32 chip.
4, RFDC copying subcard according to claim 1 is characterized in that: the LVDS interface chip (1) that is used to launch adopts the SN55LVDS31 chip.
5, RFDC copying subcard according to claim 1 is characterized in that: the LVDS interface chip (2) that is used to receive adopts the SN55LVDS32 chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200420088700 CN2753063Y (en) | 2004-09-28 | 2004-09-28 | Radio data communication simulated function subcard |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200420088700 CN2753063Y (en) | 2004-09-28 | 2004-09-28 | Radio data communication simulated function subcard |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN2753063Y true CN2753063Y (en) | 2006-01-18 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200420088700 Expired - Fee Related CN2753063Y (en) | 2004-09-28 | 2004-09-28 | Radio data communication simulated function subcard |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN2753063Y (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112073083A (en) * | 2020-08-21 | 2020-12-11 | 南京矽力微电子技术有限公司 | Multi-chip integrated circuit and interactive communication method thereof |
-
2004
- 2004-09-28 CN CN 200420088700 patent/CN2753063Y/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112073083A (en) * | 2020-08-21 | 2020-12-11 | 南京矽力微电子技术有限公司 | Multi-chip integrated circuit and interactive communication method thereof |
| CN112073083B (en) * | 2020-08-21 | 2022-03-25 | 南京矽力微电子技术有限公司 | Multi-chip integrated circuit and interactive communication method thereof |
| US11601154B2 (en) | 2020-08-21 | 2023-03-07 | Silergy Semiconductor Technology (Hangzhou) Ltd | Multi-chip integrated circuit and interactive communication method for the same |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C19 | Lapse of patent right due to non-payment of the annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |