CN2746715Y - Printed circuit board - Google Patents

Printed circuit board Download PDF

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Publication number
CN2746715Y
CN2746715Y CN 200420089967 CN200420089967U CN2746715Y CN 2746715 Y CN2746715 Y CN 2746715Y CN 200420089967 CN200420089967 CN 200420089967 CN 200420089967 U CN200420089967 U CN 200420089967U CN 2746715 Y CN2746715 Y CN 2746715Y
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CN
China
Prior art keywords
printed circuit
circuit board
power
ground level
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN 200420089967
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Chinese (zh)
Inventor
全青山
张坤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huawei Technologies Co Ltd filed Critical Huawei Technologies Co Ltd
Priority to CN 200420089967 priority Critical patent/CN2746715Y/en
Application granted granted Critical
Publication of CN2746715Y publication Critical patent/CN2746715Y/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

The utility model relates to a printed circuit board of the basic electrical element, which is used for reducing the impedance of the source of power of the system. In the printed circuit board, the same source of power comprises at least two sources of power-ground plane pairs. The same source of power is provided with one or more source of power plane surfaces in the printed circuit board, and the source of power plane surfaces are communicated with each other through a through hole welding tray. The printed circuit board also comprises one or more ground planes, and the ground planes are communicated with each other through the through hole welding tray. Each source of power plane surface and each ground plane interleave, abut, and stack through a medium to form the corresponding source of power-ground plane pair. The utility model with low cost and high dependability can effectively reduce the high frequency impedance between the source of power and the ground plane of the same source of power.

Description

A kind of printed circuit board
Technical field
The utility model relates to essential electronic element, relates in particular to a kind of printed circuit board.
Background technology
Power supply integrity analysis in the printing board PCB is an important technology developing direction of industry in recent years, and its main purpose is to reduce the power supply ground impedance of system by various means, for system provides stable operating voltage.In PCB commonly used, power-supply system comprises that power module, common separation electric capacity and power supply-ground level are right.Because the effect of lead-in inductance, power module and common separation electric capacity can only play filter action preferably at low frequency, in high-frequency range, along with the continuous reduction of operating voltage and the continuous increase of power consumption, the PCB power-supply system need more reach lower impedance in the high band range, prior art mainly relies on the power supply ground level to solve this problem, and as shown in Figure 1, the right capacity plate antenna appearance value of power supply-ground level is C among the setting figure 0Introduce the method for two kinds of common reduction power supply-ground impedances below.
Literal is succinct, narration is convenient in order to make, and hereinafter every " impedance " " high-frequency resistance of power supply and ground level " that relate to all refers to the impedance of power supply ground.
1, realizes lower impedance by the dielectric thickness that reduces between power plane and the ground level.Used thickness is that medium and the used thickness of 2mil are that the medium of 20mi is compared between power plane and ground level, under the identical situation of area, the former equivalent plate capacitor's capacity reaches 10 times of the latter, the right capacity plate antenna appearance value of power supply-ground level has obtained bigger raising, therefore, use the medium of 2mil to have lower high-frequency resistance between power plane and the ground level than the medium that uses 20mil, can obtain better resisting interference ability and lower electromagnetic interference (EMI) emissions, yet owing to be subjected to the restriction of production technology, make that the cost of this method is too high, simultaneously, crossing thin medium can exert an influence to the PCB reliability of products, therefore the thickness of dielectric material may ad infinitum not reduce, thereby the practicality of this method is not strong.
2, by using the high dielectric material of dielectric constant to obtain lower impedance.The dielectric constant of common dielectric material Fr4 is 4.3, the dielectric constant of printing ink is up to tens, therefore, under the identical situation of dielectric material thickness, use dielectric material such as printing ink also can improve the right capacity plate antenna appearance value of power supply-ground level, thereby reduce power supply ground impedance.But because the thickness of printing ink and the uniformity are difficult to control, reduced the PCB reliability of products, therefore present this method also lacks ripe mass production processes, and cost is also very high.
The utility model content
The purpose of this utility model is to provide a kind of printed circuit board that can effectively reduce the impedance of power supply ground, overcoming under the prior art condition, and when printed circuit board obtains low power supply-ground impedance in high-frequency range, cost height, the deficiency that reliability is low.
The technical scheme that the utility model adopted is: a kind of printed circuit board in order to reduce the power supply ground impedance of system, is characterized in that: in described printed circuit board, for same power supply, comprise that two power supply-ground levels are right at least.
Described same power supply is arranged in printed circuit board on one or more power plane, is connected by via pad between described a plurality of power plane.
Described printed circuit board comprises one or more ground levels, is connected by via pad between described a plurality of ground levels.
Each described power plane sees through between one deck medium and each the described ground level staggered adjacent stacked, and it is right to form corresponding power supply-ground level.
Described power supply-ground level is right to the plane that is meant power plane and the adjacent stacked formation of ground level.
The beneficial effects of the utility model are:
In the prior art, for same power supply, generally only exist a power supply-ground level right, in the utility model, same power supply exists the power supply-ground level more than two or two right, for example, same power supply exists three power supply-ground levels right, with respect to prior art, under the prerequisite that keeps same power plane and dielectric material between the ground level and thickness, the utility model can obtain being equivalent to three times of values of the right capacity plate antenna appearance value of power supply-ground level of the prior art.According to formula
Z≈1/jωc
Wherein: Z is that the right impedance of power supply-ground level, ω are angular frequency, C is the appearance value of capacity plate antenna, can learn that impedance Z and capacity plate antenna appearance value C are inversely proportional to, therefore the appearance value that increases capacity plate antenna can reduce the high-frequency resistance of power supply and ground level effectively, thus the antijamming capability of raising system on high frequency; And the needed manufacturing condition of the utility model is the same with prior art, has that production cost is low, the product reliability advantages of higher.
Description of drawings
Fig. 1 is that power supply-ground level of the prior art is to the stepped construction schematic diagram;
Fig. 2 is embodiment 1 a printed circuit board plane layer stack structure schematic diagram;
Fig. 3 is embodiment 2 printed circuit board plane layer stack structure schematic diagrames;
Fig. 4 is embodiment 3 printed circuit board plane layer stack structure schematic diagrames;
Fig. 5 is embodiment 4 printed circuit board plane layer stack structure schematic diagrames;
Fig. 6 is embodiment 5 printed circuit board plane layer stack structure schematic diagrames;
Fig. 7 is the via pad structure schematic diagram.
Embodiment
With embodiment the utility model is described in further detail with reference to the accompanying drawings below:
Embodiment 1:
As shown in Figure 2, present embodiment comprises three kinds of plane layers, be power plane 10, ground level 11,12 and signal plane 1, the all stacked corresponding ground level 11,12 of two adjacent surfaces of power plane 10, for ease of explanation, now establish the power supply of each embodiment in this specification and Figure 1 shows that same power supply, dielectric material that each embodiment adopted and thickness with shown in Figure 1 be consistent, in the present embodiment, two power supply-ground levels of power plane 10 and ground level 11,12 formation are right, and the capacity plate antenna appearance value of this power supply and ground level then is 2C 0, with respect to prior art, the capacity plate antenna appearance value of the power supply of present embodiment and ground level is improved, and has reduced the high-frequency resistance of power supply and ground level.
As for the concrete syndeton in its inside, be connected by via pad between each plane layer, as shown in Figure 7, all set up such bus plane connecting through hole pad and stratum connecting through hole pad at each plane layer, described via pad inboard is provided with interlayer contiguous block 62, this plate of arranged outside contiguous block 63, and a through hole 61 is offered at the middle part, form isolated area 64 between interlayer contiguous block 62 and this plate contiguous block 63, isolated area 64 is laid copper.
Interlayer contiguous block 62 and this plate contiguous block 63 are all laid copper, this plate contiguous block 63 is connected with the related circuit of this plane layer, the inwall of through hole 61 is laid hollow copper post, and hollow copper post is through each plane layer, and links to each other with interlayer contiguous block 62 on all plane layers.
Embodiment 2:
As shown in Figure 3, present embodiment comprises power plane, ground level 21,22 and signal plane 2, same power supply is arranged in printed circuit board on power plane 201 and the power plane 202, staggered adjacent stacked between power plane 201,202 and the ground level 21,22, it is right that ground level 21 and power plane 201, power plane 201 and ground level 22, ground level 22 and power plane 202 have constituted three power supply-ground levels, and the capacity plate antenna appearance value of this power supply and ground level then is 3C 0, improved the capacity plate antenna appearance value of power supply and ground level, reduced the high-frequency resistance of power supply and ground level.
Described same or similar as for concrete syndeton in present embodiment inside and embodiment 1, repeat no more herein.
Embodiment 3:
As shown in Figure 4, present embodiment comprise power plane, ground level 31,32 ..., 3N and signal plane 3, the difference of present embodiment and embodiment 2 is, same power supply in printed circuit board, be arranged at N power plane 301,302 ..., on the 30N, power plane 301,302 ..., 30N and N ground level 31,32 ..., staggered successively adjacent stacked between the 3N, it is right to have constituted 2N-1 power supply-ground level, and the capacity plate antenna appearance value of this power supply and ground level then is (2N-1) * C 0, improved the capacity plate antenna appearance value of power supply and ground level, reduced the high-frequency resistance of power supply and ground level.
Described same or similar as for concrete syndeton in present embodiment inside and embodiment 1, repeat no more herein.
Embodiment 4:
As shown in Figure 5, present embodiment comprises power plane, ground level 41 and signal plane 3, same power supply is arranged in printed circuit board on two power plane 401,402, stacked ground level 41 between power plane 401 and the power plane 402, it is right that power plane 401 and ground level 41, ground level 41 and power plane 402 have constituted two power supply-ground levels, and the capacity plate antenna appearance value of this power supply and ground level then is 2C 0, improved the capacity plate antenna appearance value of power supply and ground level, reduced the high-frequency resistance of power supply and ground level.
Described same or similar as for concrete syndeton in present embodiment inside and embodiment 1, repeat no more herein.
Embodiment 5:
As shown in Figure 6, present embodiment comprises power plane, ground level 51,52 and signal plane 5, same power supply is arranged in printed circuit board on two power plane 501,502, power plane 501 and corresponding ground level 51 intersectings, power plane 502 and corresponding ground level 52 intersectings, corresponding power supply-the ground level of each self-forming is right, and it is right to have formed two power supply-ground levels altogether, and the capacity plate antenna appearance value of this power supply and ground level then is 2C 0, improved the capacity plate antenna appearance value of power supply and ground level, reduced the high-frequency resistance of power supply and ground level.
With regard to present embodiment, same, same power supply can be arranged at a plurality of power plane, and to form corresponding power supply-ground level right with ground level separately.
Described same or similar as for concrete syndeton in present embodiment inside and embodiment 1, repeat no more herein.
Those skilled in the art are to be understood that, both can be positioned at the top layer of printed circuit board according to the signal plane of printed circuit board of the present utility model, also can be positioned at the bottom of printed circuit board, or any one deck of printed circuit board or which floor, the position of the signal plane described in the accompanying drawing also is not used in qualification the utility model.Simultaneously,
The form that it is right that power plane and ground level constitute power supply-ground level can also be the combination of above-mentioned each embodiment form, and its principle, structure and the above are same or similar, repeat no more herein.
When implementing the utility model, the medium of the various embodiments described above can be selected different materials and thickness for use according to the needs of actual design, such as the FR4 of 3mi, and each plane between dielectric thickness also can be different.

Claims (8)

1, a kind of printed circuit board in order to reduce the power supply ground impedance of system, is characterized in that: in described printed circuit board, for same power supply, comprise that two power supply-ground levels are right at least.
2, printed circuit board according to claim 1 is characterized in that: described same power supply is arranged in printed circuit board on one or more power plane, is connected by via pad between described a plurality of power plane.
3, printed circuit board according to claim 1 is characterized in that: described printed circuit board comprises one or more ground levels, is connected by via pad between described a plurality of ground levels.
4, according to claim 2 or 3 described printed circuit boards, it is characterized in that: each described power plane sees through between one deck medium and each the described ground level staggered adjacent stacked, and it is right to form corresponding power supply-ground level.
5, printed circuit board according to claim 4 is characterized in that: described printed circuit board comprises the stepped construction of at least one power plane, ground level, power plane, ground level.
6, printed circuit board according to claim 4 is characterized in that: described printed circuit board comprises the stepped construction of at least one ground level, power plane, ground level, power plane.
7, printed circuit board according to claim 4 is characterized in that: described printed circuit board comprises the stepped construction of at least one ground level, power plane, ground level.
8, printed circuit board according to claim 4 is characterized in that: described printed circuit board comprises the stepped construction of at least one power plane, ground level, power plane.
CN 200420089967 2004-09-29 2004-09-29 Printed circuit board Expired - Fee Related CN2746715Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 200420089967 CN2746715Y (en) 2004-09-29 2004-09-29 Printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 200420089967 CN2746715Y (en) 2004-09-29 2004-09-29 Printed circuit board

Publications (1)

Publication Number Publication Date
CN2746715Y true CN2746715Y (en) 2005-12-14

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN 200420089967 Expired - Fee Related CN2746715Y (en) 2004-09-29 2004-09-29 Printed circuit board

Country Status (1)

Country Link
CN (1) CN2746715Y (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102856304A (en) * 2011-06-27 2013-01-02 中国科学院微电子研究所 Semiconductor chip packaging structure

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102856304A (en) * 2011-06-27 2013-01-02 中国科学院微电子研究所 Semiconductor chip packaging structure
CN102856304B (en) * 2011-06-27 2015-06-24 成都锐华光电技术有限责任公司 Semiconductor chip packaging structure

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Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20051214

Termination date: 20100929