CN2643417Y - Improved electric switch device - Google Patents
Improved electric switch device Download PDFInfo
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- CN2643417Y CN2643417Y CN 03205883 CN03205883U CN2643417Y CN 2643417 Y CN2643417 Y CN 2643417Y CN 03205883 CN03205883 CN 03205883 CN 03205883 U CN03205883 U CN 03205883U CN 2643417 Y CN2643417 Y CN 2643417Y
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Abstract
The utility model relates to an improved electric switch device, including a control panel and a controlled panel connected by cables. A filter circuit, a pre-synchronized and negative half-circle triggering circuit, a synchronization pulse oscillating circuit, a programmer data generation circuit, a power switch element are arranged on the control panel, and a positive-negative half-circuit trigger circuit control signal is input into the controlled panel via the cable. A filter circuit, a pre-synchronization limiter circuit, a synchronization pulse oscillating circuit, a programmer data processing circuit and a power switch element trigger circuit arranged on the controlled board respond to the control signal realizing the load on/off control. By adopting digital switch modulation mode to control the load power source on/off, the switch speed is very high, the power switch modulation with digital control signal load provides accurate circuit execution, the appropriate network filter makes the high frequency switch modulation outputting purified load power source, which ensures the stability and reliability of the power source wave and has no any bad influences on the power grid and load. The utility model has the advantages of practicability and easy promotion.
Description
Technical field
The utility model belongs to the improvement of consumer electric switch, particularly improved electrical switchgear.
Background technology
In the prior art, connect to the electric wire that a special use all need be arranged its corresponding electrical appliance of controlling from each switch, when electrical appliance has when a lot, the construction wiring is just complicated more, time-consuming, it is just serious more to take a lot of work, take material.In order to address this problem, people have worked out and have utilized the electric wire transmission of control signals so that the technology of control consumer power on/off, as notification number is the Chinese utility model patent instructions disclosed " the multiple access control device of electric switch " of CN2210437, it is made up of controller and a plurality of bands location switch, each switch receives control signal by controller produced by a shared propagation ducts, change the contained address information of control signal, can carry out other or control simultaneously to the switch that has appropriate address, thereby line construction is greatly simplified.Control signal, has only when its address with the natural frequency expression with certain controlled switch is identical as its address information with different frequencies, and this switch just can move, and other have the switch of different addresses then unaffected.But, owing to exist the lot of background frequency signal in the circuit, in a single day the frequency control signal that above-mentioned controller produced is added in the circuit and promptly can be flooded by the background frequency signal, if and strengthen the said frequencies control signal, mains frequency in the circuit is interfered, makes power supply wave shape produce distortion, electrical network or electrical appliance are impacted, therefore, the multiple access control device of this electric switch does not have popularization to open owing to not having practicality.
Summary of the invention
The purpose of this utility model is to provide a kind of improved electrical switchgear, not only can carry out power on/off control to electrical appliance by the electric wire transmission of control signals, and its control signal that is loaded on the electric wire can not cause harmful effect to electrical network or electrical appliance, and practicality is good, helps promoting.
The purpose of this utility model is achieved in that a kind of improved electrical switchgear, comprises being installed in control panel and the controlled board that links together by lead between power supply and the load; Be respectively arranged with filtering circuit, presynchronization and negative half period trigger circuit, synchronizing pulse oscillatory circuit, the generation of programmable device event data circuit, device for power switching and positive-negative half-cycle trigger circuit on the control panel; The input end of filtering circuit links to each other with power supply, its output terminal is connecting presynchronization and negative half period trigger circuit and device for power switching and positive-negative half-cycle trigger circuit respectively, presynchronization and negative half period trigger circuit have two output terminals, one of them output terminal that has sync level links to each other with the synchronizing pulse oscillatory circuit, and another output terminal that has negative half period switch triggering level links to each other with device for power switching and positive-negative half-cycle trigger circuit, the synchronizing pulse oscillatory circuit has two output terminals, have synchronizing clock signals on it respectively and go here and there out control signal, the CP input end of clock that this two output terminal produces circuit with the programmable device event data is respectively gone here and there out control end with it and is linked to each other, the serial output terminal that programmable device event data generation circuit has positive half cycle switch triggering level is connecting device for power switching and positive-negative half-cycle trigger circuit, and the output terminal that has control data of supervisory keyboard links to each other with the data input pin that the programmable device event data produces circuit; Be respectively arranged with filtering circuit, presynchronization amplitude limiter circuit, synchronizing pulse oscillatory circuit, programmable device event data treatment circuit and device for power switching trigger circuit on the controlled board; The output terminal that is positioned at device for power switching on the control panel and positive-negative half-cycle trigger circuit links to each other with filtering circuit and presynchronization amplitude limiter circuit on the controlled board respectively, the output terminal of this filtering circuit is connecting the device for power switching trigger circuit, two output terminals of presynchronization amplitude limiter circuit are connecting the serial input terminal of synchronizing pulse oscillatory circuit and programmable device event data treatment circuit respectively, the output terminal that the synchronizing pulse oscillatory circuit has a clock input signal is connecting the CP input end of clock of programmable device event data treatment circuit, the serial output terminal that programmable device event data treatment circuit has trigger pip is connecting the device for power switching trigger circuit, and the output terminal of device for power switching trigger circuit is connecting load.
During the utility model work, be input to the presynchronization circuit after at first will entering the power purification of electricity consumer by the filter network on the control panel, produce synchronous voltage signal and be input to the synchronizing pulse oscillatory circuit, the negative half period trigger circuit of while presynchronization circuit partly produce the negative half period triggering level and are input in device for power switching and the positive-negative half-cycle trigger circuit, if this moment, supervisory keyboard was not triggered, be that programmable device event data generation circuit does not have the loading data signal, then to go out the voltage signal of control end input be low level to the programmable device event data string that produces circuit, the synchronizing pulse oscillatory circuit does not have synchronous voltage signal and keeps original phase oscillation in addition, so the programmable device event data produces the output of circuit serial output terminal nil encoded data signal.To load output terminal be that high level is that supervisory keyboard is when being triggered when the programmable device event data produces circuit, it is gone here and there out control end and obtains high level, therefore exporting to the programmable device event data at the synchronizing pulse oscillatory circuit produces under the effect of synchronized oscillation CP pulse of circuit, the programmable device event data produces the circuit serial output terminal and triggers the corresponding numerical coding voltage signal of key position output by supervisory keyboard, in order to device for power switching and positive-negative half-cycle trigger circuit are triggered, and contain the electric energy of control signal to controlled board by its output; From the electric energy of control panel output when it does not contain control signal, output voltage signal is to the serial input terminal of programmable device event data treatment circuit in the load controlled board presynchronization amplitude limiter circuit, the synchronizing pulse oscillatory circuit is exported synchronous CP pulse voltage signal to programming device CP input end of clock, programmable device event data treatment circuit reads in its inside with the voltage signal of serial input terminal under the effect of CP clock, owing to do not have control data in the serial input signals, its output terminal keeps original state after programmable device event data processing circuit processes, and the device for power switching trigger circuit also continue the on off operating mode that keeps original; When containing control signal as if electric energy from control panel output, programmable device event data treatment circuit is under the effect of CP clock, the voltage signal of programmable device event data treatment circuit serial input terminal will be read in its inside, and by programmable device event data treatment circuit data are handled, select to require corresponding position output voltage signal to remove to trigger device for power switching according to result programmable device event data treatment circuit at its output terminal and break-make is carried out in load control with control.The utility model adopts digital switch modulation system control load on/off, the switching speed height, simultaneously, use the power switch modulation to load digital controlled signal, therefore, the execution of circuit is accurate, again owing to be to use HF switch modulation can make the power purification that outputs to load, thereby guaranteed the stable and reliable of power supply wave shape by suitable filter network, to electrical network and load without any harmful effect, the utility model practicality is good, is easy to promote.
Description of drawings
Fig. 1 is a general assembly wiring diagram of the present utility model;
Fig. 2 is the circuit block diagram on the utility model embodiment 1 control panel;
Fig. 3 is the oscillogram of related circuit part in the described circuit block diagram of Fig. 2;
Fig. 4 is the circuit block diagram on the utility model embodiment 1 controlled board;
Fig. 5 is the oscillogram of related circuit part in the described circuit block diagram of Fig. 4;
Fig. 6 is the circuit block diagram on the utility model embodiment 2 control panels;
Fig. 7 is the circuit block diagram on the utility model embodiment 2 controlled board;
Fig. 8 is the circuit diagram on the utility model embodiment 1 control panel;
Fig. 9 is the circuit diagram on the utility model embodiment 1 controlled board;
Figure 10 is the circuit diagram on the utility model embodiment 2 control panels;
Figure 11 is the circuit diagram on the utility model embodiment 2 controlled board.
Embodiment
Below in conjunction with accompanying drawing the utility model is described in further detail, a kind of improved electrical switchgear as shown in Figure 1, comprises being installed in control panel and the controlled board that links together by lead between power supply and the load.Control panel and controlled board can be for a plurality of parallel with one another in circuit.
As shown in Figure 2, be respectively arranged with filtering circuit, presynchronization and negative half period trigger circuit, synchronizing pulse oscillatory circuit, programmable device event data generation circuit and device for power switching and positive-negative half-cycle trigger circuit on the control panel; The input end of filtering circuit links to each other with power supply, in order to will enter the power purification of electricity consumer, 1. oscillogram sees among Fig. 3, the output terminal of filtering circuit is connecting presynchronization and negative half period trigger circuit and device for power switching and positive-negative half-cycle trigger circuit respectively, presynchronization and negative half period trigger circuit have two output terminals, one of them output terminal that has sync level links to each other with the synchronizing pulse oscillatory circuit, and another output terminal that has negative half period switch triggering level links to each other with device for power switching and positive-negative half-cycle trigger circuit.The synchronizing pulse oscillatory circuit has two output terminals, have synchronizing clock signals on it respectively and go here and there out control signal, the CP input end of clock that this two output terminal produces circuit with the programmable device event data is respectively gone here and there out control end with it and is linked to each other, the serial output terminal that programmable device event data generation circuit has positive half cycle switch triggering level is connecting device for power switching and positive-negative half-cycle trigger circuit, and the output terminal that has control data of supervisory keyboard goes out control end with the string of programmable device event data generation circuit and links to each other.The programming device can be selected PAL or GAL etc. for use, and device for power switching can be selected GTR and KP for use.
As shown in Figure 8, the presynchronization circuit comprise by amplifier N1:A, diode V1, V2, V7, resistance R 1, R2, R3, R4, R11, RW3 and RW5 form with " V
Z" be the power supply comparator circuit of reference voltage, in order to produce positive synchronous voltage signal; What amplifier N1:B, R6, R7, R8, V3, V4, V5 and RW2 formed is the power supply comparator circuit of reference voltage with " zero ", and in order to generation negative half period device for power switching trigger voltage signal, 6. oscillogram sees among Fig. 3.The V that the positive synchronous voltage signal that the presynchronization circuit will be exported is obtained by RW3 and R11 dividing potential drop
R11Voltage signal is input to the CP of synchronizing pulse oscillatory circuit d type flip flop
1Input end of clock.But the synchronizing pulse oscillatory circuit comprises synchronizing pulse oscillatory circuit and the pulse oscillation circuit synchronous voltage signal control output D1 trigger be made up of not gate N2:A, N2:B, resistance R 10, RW3 and capacitor C 1 and forms that described D1 trigger is a d type flip flop.
Device PAL or GAL do not have the loading data signal if programme this moment, be that supervisory keyboard is not triggered, then exporting programming device PAL or GAL to door N3, to go here and there out the input voltage signal of control end be low level, and outputing to d type flip flop R1 reset level signal by not gate N2:C simultaneously is significant level.D type flip flop Q1 output as a result keeps low level constant, and do not keep original phase oscillation owing to pulse oscillation circuit has synchronous voltage signal, so programming device PAL or the output of GAL serial output terminal nil encoded data signal, go here and there out simultaneously and finish output terminal also for low level, result or three input ends of door N4 carry out " or " the synthetic control signal of the positive half cycle of output only is V after the logical operation
R112. voltage signal, oscillogram are seen among Fig. 3.By or door N4 output voltage signal and V
R8After voltage negative half cycle trigger pip triggers output power switching device PAL or GAL, merge the electric energy that output contains control signal by device for power switching GTR and KP, 8. oscillogram sees among Fig. 3 that wherein light is formed output power switching device switch triggering circuit every N5, switching tube V8, resistance R 12, R13, R14, RW4 and capacitor C 2.
When programming device PAL or GAL load output terminal is that high level is that supervisory keyboard is when being triggered, make d type flip flop work by not gate N2:C output low level, and Q1 holds output HIGH voltage when the CP1 negative edge, programme this moment device PAL or GAL go here and there out control end obtain from the high level of door N3 output, 4. oscillogram sees among Fig. 3, therefore export under the effect of synchronized oscillation CP pulse of programming device PAL or GAL at the synchronized oscillation circuit, 3. oscillogram sees among Fig. 3, programming device PAL or GAL serial output terminal trigger the numerical coding voltage signal of key position output correspondence by supervisory keyboard, and finish output voltage signal and V with going here and there out
R1Voltage signal together or a door N4 carry out " or " after the logical operation, output contains the resultant voltage signal of control figure coded signal, 5. oscillogram sees among Fig. 3.By or door N4 output voltage signal and V
R8After the negative half period trigger voltage signal triggered respectively device for power switching, the electric energy that contains control signal by device for power switching GTR and KP output was to indoor load, and 7. oscillogram sees among Fig. 3.
As shown in Figure 4, be respectively arranged with filtering circuit, presynchronization amplitude limiter circuit, synchronizing pulse oscillatory circuit, programmable device event data treatment circuit and device for power switching trigger circuit on the controlled board; Be positioned at the device for power switching on the control panel and the output terminal " L of positive-negative half-cycle trigger circuit
Go out" end links to each other with filtering circuit and presynchronization amplitude limiter circuit on the controlled board respectively, the output terminal of this filtering circuit is connecting the device for power switching trigger circuit, described filtering circuit employing L, C filtering or forms such as R, C filtering.Two output terminals of presynchronization, amplitude limiter circuit are connecting the serial input terminal of synchronizing pulse oscillatory circuit and programmable device event data treatment circuit respectively, the output terminal that the synchronizing pulse oscillatory circuit has a clock input signal is connecting the CP input end of clock of programmable device event data treatment circuit, the serial output terminal that programmable device event data treatment circuit has trigger pip is connecting the device for power switching trigger circuit, and the output terminal of device for power switching trigger circuit is connecting load.
When the electric energy of the output of the device for power switching from control panel does not contain control signal, 8. oscillogram sees among Fig. 3, as shown in Figure 9, form the amplitude limiter circuit output voltage signal to programming device PAL or GAL serial input terminal by diode V3 and V5, resistance R 1, R8, RW1 and RW3 in presynchronization on the load controlled board, the amplitude limiter circuit, and by amplifier N2, diode V1, V2, V4 and resistance R 2, R3, R4, R5, R9, R11, R12, RW4 and RW6 form with " V
Z" export to the synchronizing pulse oscillatory circuit for the power supply comparator circuit of reference voltage through RW6 and R9 dividing potential drop, make synchronous voltage signal V
R9Make the synchronizing pulse oscillatory circuit of forming by not gate N1:A and N1:B, resistance R 6, RW5 and capacitor C 1 export the CP input end of clock of synchronous CP time clock voltage signal to programming device PAL or GAL, programming device PAL or GAL read in its inside with the voltage signal of serial input terminal under the effect of CP clock, because do not have control data in the serial input signals, oscillogram is seen among Fig. 5
Handle through programming device PAL or GAL internal processing program, its output terminal continues to keep original state, and the device for power switching trigger circuit also continue the on off operating mode that keeps original.
When the electric energy on entering into the load controlled board contains control signal, programming device PAL or GAL under the effect of CP clock (oscillogram is seen the among Fig. 5) will read in its inside with the input voltage signal of programming device serial input terminal, oscillogram is seen the among Fig. 5, and data are handled by programming device PAL or GAL, according to operation result, the programming device is selected to require corresponding position output control voltage signal to remove to trigger device for power switching with control at its output terminal break-make control is carried out in load, and its input electric energy oscillogram was seen the among Fig. 5 when load was connected.
In order to prevent that many people from touching the switch of diverse location simultaneously, guarantee of the accurate control of diverse location switch to load, the utility model has been done some improvement on circuit, adopt as Fig. 6, the utility model embodiment 2 described circuit block diagrams shown in Figure 7, in the circuit on control panel shown in Figure 6, the output terminal of synchronizing pulse oscillatory circuit is divided into two-way, one the tunnel is connecting time-division branch location circuit, another road is connecting frequency multiplier circuit, and the output terminal of time-division branch location circuit and frequency multiplier circuit goes out control end with the string of programmable device event data generation circuit respectively and the CP input end of clock links to each other.Accordingly, in the circuit on controlled board shown in Figure 7, the output terminal of synchronizing pulse oscillatory circuit is divided into two-way, the frequency multiplier circuit of leading up to is connecting programmable device event data treatment circuit, one the tunnel is connecting control data extracts circuit, the input end that control data extracts circuit is also connecting amplitude limiter circuit, and amplitude limiter circuit links to each other with power supply.The output terminal that control data extracts circuit is divided into two-way, it has and seals in a road of signal and link to each other with the serial input terminal of programmable device event data treatment circuit, another road with seal in the control signal circuit and link to each other, seal in the control signal circuit and have to seal in and allow the output terminal of signal to link to each other with the control end that seals in of programmable device event data treatment circuit.
Circuit on the master control borad of the utility model embodiment 2 as shown in figure 10, the supervisory keyboard that connects when the data input pin of programming device PAL or GAL does not have key to be touched, N3's does not finish input high level with No. 1 end of door B input and N2 not gate B input end because of the programming device has to load in the circuit, N3 is output as low level, by d type flip flop D0, D1, D2 and D form seal in and go out counter do not have clock CP pulse, and stop counting work, the selected output terminal of its data does not have high level output, D4 provides clock for d type flip flop, thereby the programming device do not have coded data from the serial output terminal output data to N4 or the door No. 2 input ends, at this moment, N4 or gate output terminal are only exported from pulse oscillator with phase change with N4 or No. 1 end of door input, the impulse hunting level of N2 not gate B end output terminal provides the switch level that does not have control data for the device for power switching trigger circuit, makes the output of power active switch device not have control data at interior switch electric energy.
When a certain key of supervisory keyboard that links to each other with programming device parallel input end was touched, the programming device inside runs through to be keyed in data and sends to load and finish the output high level, loaded No. 1 of finishing output high level and a N3 and a C and held V
dHigh level with, with door C output terminal be high level, provide level with the high level of door C output for d type flip flop D5, after D5 trigger time clock CP arrives, it is high level that D5 trigger Q end output high level makes N3 and No. 1 input end of door B, N3 makes counter works with the back at the impulse level of the output synchronizing pulse oscillator of N3 output terminal and for counter provides the CP pulse with No. 1 end high level and No. 2 ends of door B, by the parallel sign indicating number of counter output, through decimal decoding circuit for example 4042 decoding after, select the decoding carry-out bit, and CP is provided pulse for d type flip flop D4, because D4 termination high level, so when the CP pulse is negative edge, the Q4 end is output as high level, make programming device serial output control terminal that triggering level be arranged, make after inner the loading parallel data from the serial delivery outlet output to No. 2 ends of N4 and door and the level of the pulse that produces with the synchronizing pulse oscillatory circuit carry out " or " after the logical operation, the pulse switch level that contains control data by N4 and gate output terminal output, and the pulse switch level carries out switch work by light every N5 triggering high-speed power active switch device GTR thus, the power supply positive half-wave is modulated into the switch electric energy that contains control data outputs to the load controlled board, when power supply was negative half period, circuit output kept power supply wave shape by KP.
Circuit on the controlled board of the utility model embodiment 2 as shown in figure 11, when from the electric energy of control panel input, not having control data, " zero " benchmark comparator circuit of forming by zero-crossing comparator N1 and relevant components and parts from the L line import electric energy through filtering after RW1 and R1 dividing potential drop obtain comparative voltage, and be input to the in-phase input end 3 of N1, relatively work back output after diode V3 positive level is selected by N1, by RW2 and R4 dividing potential drop is by N2 not gate A, the synchronizing pulse oscillatory circuit that B and related elements are formed provides synchronous positive level, back output synchronously of synchronizing pulse oscillatory circuit and the synchronous impulse hunting level of L line input electric energy, and divide by N2 not gate B output through the two-way transmission, the one tunnel as can be by 4518 and 4046 and the incoming frequency f of the frequency multiplier circuit formed of related elements
iAnother road enters No. 2 input ends of N3 and door, N3 and the programming device that door output obtains seal in data through two input ends of N3 " with " acquisition, one of them input is from the output of N2 not gate C, another is from the dividing potential drop output of amplitude limiter circuit through RW4 and R9, because the programming device seals in input end input data from N3 and door output, so programming device internal operation result makes delivery outlet keep original state, it is constant promptly to go up the control result who outputs to the controlled power device circuitry successively.
When from the electric energy of control panel input, control data being arranged, by N3 with the door two input ends " with " after, arrive programming device serial data input port through N3 output control data, through programming device internal operation data, trigger the controlled power circuit from its output terminal output control level then and connect respective load.
As shown in Figure 8,1 " go here and there out and finish " and reset among the figure for " loading is finished " is programmed device inside; 2 is that " go here and there out and finish " is by V
R8Level resets; L
iBe power input; L
oPower output end for control panel; I
1For going here and there out control, I
2Reset for going here and there out to finish; O
1For loading is finished, O
2Finish O for going here and there out
3Be serial output; A
1A
NBe address signal.
As shown in Figure 9, L among the figure
iBe power input from control panel; I
1Be serial input, I
2Reset for sealing in to finish; O
1Finish signal, O for sealing in
2O
NOutput terminal for PAL.
As shown in figure 10, L among the figure
iBe power input; L
oPower output end for control panel; I
1For going here and there out control; A
1A
NBe address signal; O
1Finish O for going here and there out
2For loading is finished, O
3For going here and there out.
As shown in figure 11, L among the figure
iBe power input from control panel; O
1Finish O for going here and there out
2O
NOutput terminal for PAL; I
1For sealing in I
2For sealing in control; I
3Reset for sealing in to finish.
Claims (3)
1. improved electrical switchgear, comprise being installed in control panel and the controlled board that links together by lead between power supply and the load, it is characterized in that: be respectively arranged with filtering circuit, presynchronization and negative half period trigger circuit, synchronizing pulse oscillatory circuit, the generation of programmable device event data circuit, device for power switching and positive-negative half-cycle trigger circuit on the control panel; The input end of filtering circuit links to each other with power supply, its output terminal is connecting presynchronization and negative half period trigger circuit and device for power switching and positive-negative half-cycle trigger circuit respectively, presynchronization and negative half period trigger circuit have two output terminals, one of them output terminal that has sync level links to each other with the synchronizing pulse oscillatory circuit, and another output terminal that has negative half period switch triggering level links to each other with device for power switching and positive-negative half-cycle trigger circuit, the synchronizing pulse oscillatory circuit has two output terminals, have synchronizing clock signals on it respectively and go here and there out control signal, the CP input end of clock that this two output terminal produces circuit with the programmable device event data is respectively gone here and there out control end with it and is linked to each other, the serial output terminal that programmable device event data generation circuit has positive half cycle switch triggering level is connecting device for power switching and positive-negative half-cycle trigger circuit, and the output terminal that has control data of supervisory keyboard links to each other with the data input pin that the programmable device event data produces circuit; Be respectively arranged with filtering circuit, presynchronization amplitude limiter circuit, synchronizing pulse oscillatory circuit, programmable device event data treatment circuit and device for power switching trigger circuit on the controlled board; The output terminal that is positioned at device for power switching on the control panel and positive-negative half-cycle trigger circuit links to each other with filtering circuit and presynchronization amplitude limiter circuit on the controlled board respectively, the output terminal of this filtering circuit is connecting the device for power switching trigger circuit, two output terminals of presynchronization amplitude limiter circuit are connecting the serial input terminal of synchronizing pulse oscillatory circuit and programmable device event data treatment circuit respectively, the output terminal that the synchronizing pulse oscillatory circuit has a clock input signal is connecting the CP input end of clock of programmable device event data treatment circuit, the serial output terminal that programmable device event data treatment circuit has trigger pip is connecting the device for power switching trigger circuit, and the output terminal of device for power switching trigger circuit is connecting load.
2. improved electrical switchgear according to claim 1, it is characterized in that: the output terminal that is positioned at the synchronizing pulse oscillatory circuit on the control panel is divided into two-way, one the tunnel is connecting time-division branch location circuit, another road is connecting frequency multiplier circuit, and the output terminal of time-division branch location circuit and frequency multiplier circuit goes out control end with the string of programmable device event data generation circuit respectively and the CP input end of clock links to each other; The output terminal that is positioned at the synchronizing pulse oscillatory circuit on the controlled board is divided into two-way, the frequency multiplier circuit of leading up to is connecting programmable device event data treatment circuit, one the tunnel is connecting control data extracts circuit, and the input end that control data extracts circuit is also connecting amplitude limiter circuit, and amplitude limiter circuit links to each other with power supply; The output terminal that control data extracts circuit is divided into two-way, it has and seals in a road of signal and link to each other with the serial input terminal of programmable device event data treatment circuit, another road with seal in the control signal circuit and link to each other, seal in the control signal circuit and have to seal in and allow the output terminal of signal to link to each other with the control end that seals in of programmable device event data treatment circuit.
3. improved electrical switchgear according to claim 1 and 2 is characterized in that: the programming device is PAL or GAL, and device for power switching is GTR and KP.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 03205883 CN2643417Y (en) | 2003-08-08 | 2003-08-08 | Improved electric switch device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 03205883 CN2643417Y (en) | 2003-08-08 | 2003-08-08 | Improved electric switch device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN2643417Y true CN2643417Y (en) | 2004-09-22 |
Family
ID=34287845
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 03205883 Expired - Fee Related CN2643417Y (en) | 2003-08-08 | 2003-08-08 | Improved electric switch device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN2643417Y (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2009114984A1 (en) * | 2008-03-21 | 2009-09-24 | Shi Baoxin | Electrical switch and electrical switch control system for a shared control wire |
| CN102783044A (en) * | 2009-12-23 | 2012-11-14 | 施耐德电器工业公司 | Electrical installation system |
| CN103019126A (en) * | 2013-01-05 | 2013-04-03 | 范仲金 | Numerical control switching system |
-
2003
- 2003-08-08 CN CN 03205883 patent/CN2643417Y/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2009114984A1 (en) * | 2008-03-21 | 2009-09-24 | Shi Baoxin | Electrical switch and electrical switch control system for a shared control wire |
| CN102783044A (en) * | 2009-12-23 | 2012-11-14 | 施耐德电器工业公司 | Electrical installation system |
| CN103019126A (en) * | 2013-01-05 | 2013-04-03 | 范仲金 | Numerical control switching system |
| CN103019126B (en) * | 2013-01-05 | 2018-03-27 | 范仲金 | Numerical control switch system |
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