CN2559099Y - Covered wafer packaging substrate - Google Patents
Covered wafer packaging substrate Download PDFInfo
- Publication number
- CN2559099Y CN2559099Y CN 02236948 CN02236948U CN2559099Y CN 2559099 Y CN2559099 Y CN 2559099Y CN 02236948 CN02236948 CN 02236948 CN 02236948 U CN02236948 U CN 02236948U CN 2559099 Y CN2559099 Y CN 2559099Y
- Authority
- CN
- China
- Prior art keywords
- solder ball
- core
- power supply
- ground connection
- pad
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
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- Coils Or Transformers For Communication (AREA)
Abstract
The utility model relates to a flip chip packaging base plate, which consists of a plurality of patterned lead wire layers, at least an insulating layer, and at least a conductive plug, wherein the lead wire layers are mutually overlapped in sequence, the insulating layer is arranged between two adjacent lead wire layers, and the conductive plug penetrates through the insulating layer to be electrically connected with the lead wire layers. The top layer of the lead wire layers has a plurality of bump pads, and the bottom layer thereof has a plurality of solder ball pads. In addition, the top surface of the flip chip packaging base plate has a plurality of circles of bump backing rings composed of the bump pads, the bottom surface thereof is corresponding to the bump backing rings and has a plurality of circles of solder ball backing rings composed of the solder ball pads, wherein the inner and outer relative positions of the bump backing rings of the same type are respectively corresponding to the inner and outer relative positions of the solder ball backing rings of the same type, in order to reduce the path length of the bump pads being wound downward to the solder ball pads.
Description
Technical field
The utility model relates to a kind of crystal covered package substrate, and particularly relevant for a kind of planar inductor effect and Switching Noise (Synchronous Switching Noise, crystal covered package substrate SSN) of reducing.
Background technology
Flip Chip (Flip Chip, FC) be a kind of chip size packages (ChipScale Package that often is applied to, CSP) encapsulation technology, it mainly is the arrangement mode that utilizes face matrix (area array), a plurality of weld pads (die pad) of chip (die) are disposed on the active surface (active surface) of chip, and on each weld pad, form projection (bump), again the projection correspondence on the chip is connected to the contact (contact) of carrier (carrier), promptly so-called bump pads (bump pad).Because the chip bonding technology has the package area of dwindling, and shorten advantage such as signal transmission path, make the chip bonding technology be widely used in the Chip Packaging field.
Please refer to Fig. 1, it is the cut-away view of known a kind of crystal covered package structure.Crystal covered package substrate 20 mainly is by multi-layered patterned conductor layer 26 and 28 interlaced being formed by stacking of multilayer dielectric layer, and utilizes a plurality of conductive plungers 30 to run through insulating barrier 28 respectively, in order to electrically connect conductor layer 26.In addition, the end face 22 of crystal covered package substrate 20 also is equipped with a plurality of bump pads 34, in order to connect the projection 16 of chip 10, wherein bump pads 34 is that top layer (near end face) by conductor layer 26 is constituted, and projection 16 then is disposed at respectively on the weld pad 14 of active surface 12 of chip 10.In addition, the internal wiring that the bump pads 30 of the end face 22 of crystal covered package substrate 20 can be constituted via multi-layer conductor leads layer 26 and a plurality of conductive plunger 30, and then wind the line downwards to the solder ball pad (ball pad) 36 of the bottom surface 24 of crystal covered package substrate 20, wherein solder ball pad 36 is that the bottom (promptly near the bottom surface) by conductor layer 26 is constituted, and also configurable soldered ball conductive structures such as (Ball) on the solder ball pad 36, in order to connect the electronic installation of next level (next level).Therefore, chip 10 can transmit signal mutually via the electronic installation in the crystal covered package substrate 20 and the external world.
Please refer to Fig. 2 A, it is the upward view of the chip of Fig. 1.The active surface 102 of chip 100 has a plurality of weld pads 106, it is weld pad 14 shown in Figure 1, and can be according to the difference of the signal (comprising signal, power supply, ground connection and core power supply/ground connection) of chip 100, weld pad 106 can be divided into signal weld pad 106a, power supply weld pad 106b, ground connection weld pad 106c and core weld pad 108, usually signal weld pad 106a, power supply weld pad 106b, ground connection weld pad 106c all are distributed in the periphery of core weld pad 110, and core weld pad 108 then is positioned within the nucleus 110.For power supply weld pad 106b and ground connection weld pad 106c can be concentrated respectively, a kind of weld pad arrangement mode of known technology is that above-mentioned signal weld pad 106a, power supply weld pad 106b and ground connection weld pad 106c are formed at least one signal weld pad ring 112a, at least one power supply weld pad ring 112b and at least one ground connection weld pad ring 112c respectively, and with 108 positions of core weld pad nucleus 110 be the center, and it is arranged evenly in the active surface 102 of chip 100 to be concentric annular.
Please refer to Fig. 3 A, it is the chip of Fig. 1, the schematic layout pattern of its core power supply weld pad and core ground connection weld pad.According to the difference of signal, core weld pad 108 can be divided into core power supply weld pad 108a and core ground connection weld pad 108b, as shown in Figure 3A, is arrangement interlaced with each other between core power supply weld pad 108a and the core ground connection weld pad 108b equally.Then, please refer to Fig. 3 B again, it is known another kind of chip, the schematic layout pattern of its core power supply weld pad and core ground connection weld pad.Different with Fig. 3 A is that core power supply weld pad 108a and core ground connection weld pad 108b form at least one core power supply weld pad ring 114a and at least one core ground connection weld pad ring 114b respectively, and are the concentric annular distribution.
Please refer to Fig. 2 B, it is the upward view of the crystal covered package substrate of Fig. 1.The solder ball pad 136 of known crystal covered package substrate 130 is signal weld pad 106a, power supply weld pad 106b, ground connection weld pad 106c and core weld pads 108 of corresponding diagram 2A, and can divide into signal solder balls pad 136a, power supply solder ball pad 136b, ground connection solder ball pad 136c and core solder ball pad 138, wherein core solder ball pad 138 is positioned at nucleus 140.Yet, signal solder balls pad 136a, the power supply solder ball pad 136b of known crystal covered package substrate 130 and ground connection solder ball pad 136c, all be distributed in the bottom surface 134 of crystal covered package substrate 130 brokenly, correspondence meets chip 100 its signal weld pad 106a, the power supply weld pad 106b of Fig. 2 A and the inside and outside distribution of ground connection weld pad 106c, so will increase the winding length between weld pad 106 and the corresponding solder ball pad 136, cause long current path, thereby produce bigger planar inductor value, and the variation of corresponding inductance value is bigger.
The utility model content
The purpose of this utility model is to provide a kind of crystal covered package substrate, can correspondingly carry the chip that known design has a plurality of weld pad rings, and can shorten weld pad and wind the line to the path of solder ball pad, in order to reduction planar inductor effect and Switching Noise, and then improve its electric usefulness (E1ectrical Performance).
Based on above-mentioned purpose of the present utility model, the utility model proposes a kind of crystal covered package substrate, this crystal covered package substrate has the multi-layer conductor leads layer of patterning, and it is overlapped in regular turn.At least one insulating barrier, it is equipped between the two adjacent conductor layers, in order to the code wire layer, and interlaced superimposed with conductor layer.And at least one conductive plunger, it runs through insulating barrier, in order to electrically connect conductive layer.Wherein, the top layer of conductor layer has a plurality of core bump pads, a plurality of signal bump pads, a plurality of power supply bump pads and a plurality of ground connection bump pads, wherein signal bump pads, power supply bump pads and ground connection bump pads are formed at least one signal projection gasket ring, at least one power supply projection gasket ring and at least one ground connection projection gasket ring respectively, and wherein signal projection gasket ring, power supply projection gasket ring and ground connection projection gasket ring are the concentric annular distribution.In addition, the bottom of conductor layer then has a plurality of core solder ball pads, a plurality of signal solder balls pad, a plurality of power supply solder ball pad and a plurality of ground connection solder ball pad, wherein signal solder balls pad, power supply solder ball pad and ground connection solder ball pad are formed at least one signal solder balls gasket ring, at least one power supply soldered ball gasket ring and at least one ground connection soldered ball gasket ring respectively, and wherein signal solder balls gasket ring, power supply soldered ball gasket ring and ground connection soldered ball gasket ring are the concentric annular distribution.
For above-mentioned purpose of the present utility model, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and cooperate appended icon, described in detail.
Description of drawings
Fig. 1 is the cut-away view of known a kind of crystal covered package structure;
Fig. 2 A is the upward view of the chip of Fig. 1;
Fig. 2 B is the upward view of the crystal covered package substrate of Fig. 1;
Fig. 3 A, Fig. 3 B figure are respectively the chip of Fig. 1, the schematic layout pattern of its core power supply weld pad and core ground connection weld pad;
Fig. 4 is the partial top view of a kind of crystal covered package substrate of preferred embodiment of the present utility model;
Fig. 5 A, Fig. 5 B are respectively the crystal covered package substrate of Fig. 4, the schematic layout pattern of its core power supply bump pads and core ground connection bump pads;
Fig. 6 is the upward view of the crystal covered package substrate of Fig. 4;
Fig. 7 A, Fig. 7 B, it is respectively the crystal covered package substrate of Fig. 6, the schematic layout pattern of its core power supply solder ball pad and core ground connection solder ball pad; And
Fig. 8 is the utility model and known crystal covered package substrate, the comparison diagram of its planar inductor value.
Graphic sign explanation
10: chip 12: active surface
14: weld pad 16: projection
20: crystal covered package substrate 22: end face
24: bottom surface 26: conductor layer
28: insulating barrier 30: conductive plunger
32: welding cover layer 34: bump pads
36: solder ball pad 100: chip
102: active surface 106: weld pad
106a: signal weld pad 106b: power supply weld pad
106c: ground connection weld pad 108: core weld pad
108a: core power supply weld pad 108b: core ground connection weld pad
110: nucleus 112: the weld pad ring
112a: signal weld pad ring 112b: power supply weld pad ring
112c: ground connection weld pad ring 114: core weld pad ring
114a: core power supply weld pad ring 114b: core ground connection weld pad ring
130: crystal covered package substrate 134: bottom surface
136: solder ball pad 136a: the signal solder balls pad
136b: power supply solder ball pad 136c: ground connection solder ball pad
138: core solder ball pad 140: nucleus
200: crystal covered package substrate 202: end face
204: bottom surface 206: bump pads
206a: signal bump pads 206b: power supply bump pads
206c: ground connection bump pads 208: core bump pads
208a: core power supply bump pads 208b: core ground connection bump pads
210: nucleus 212: the projection gasket ring
212a: signal projection gasket ring 212b: power supply projection gasket ring
212c: ground connection projection gasket ring 214: core projection gasket ring
214a: core power supply projection gasket ring 214b: core ground connection projection gasket ring
220: engaging zones 236a: the signal solder balls pad
236b: power supply solder ball pad 236c: ground connection solder ball pad
238: core solder ball pad 238a: core power supply solder ball pad
238b: core ground connection solder ball pad 240: nucleus
242: soldered ball gasket ring 242a: signal solder balls gasket ring
242b: power supply soldered ball gasket ring 242c: ground connection soldered ball gasket ring
244: core soldered ball gasket ring 244a: core power supply soldered ball gasket ring
244b: core ground connection soldered ball gasket ring 301: the planar inductor curve of known technology
302: planar inductor curve of the present invention
Embodiment
Preferred embodiment
Please refer to Fig. 1, Fig. 4, wherein Fig. 4 is the partial top view of a kind of crystal covered package substrate of preferred embodiment of the present utility model.The composition structure of the crystal covered package substrate 200 of Fig. 4 is same as the composition structure of the crystal covered package substrate 20 of Fig. 1, it includes multi-layered patterned conductor layer 26, at least one insulating barrier 28 and a plurality of conductive plunger 30, wherein these conductor layers 26 are overlapped in regular turn, insulating barrier 28 then is disposed at respectively between the two adjacent conductor layers 26, in order to code wire layer 26, and interlaced superimposed with conductor layer 26, conductive plunger 30 then runs through insulating barrier 28 respectively, in order to electrically connect conductor layer 26.In addition; the end face 22 of the crystal covered package substrate 20 of Fig. 1 and bottom surface 24 also have a welding cover layer 32 respectively; in order to protect outermost conductive layer 26 and under insulating barrier 28; and expose bump pads 34 and solder ball pad 36; wherein bump pads 34 is made of the top layer (near end face) of these conductor layers 26 of Fig. 1, and solder ball pad 36 then is made of the bottom (near the bottom surface) of these conductor layers 26 of Fig. 1.
Please refer to Fig. 4, the end face 202 of crystal covered package substrate 200 (being the end face 22 of Fig. 1) has an engaging zones 220, chip 100 in order to corresponding index map 2A, the end face 202 of crystal covered package substrate 200 then is equipped with a plurality of bump pads 206 (being the bump pads 34 of Fig. 1), it is a plurality of signal weld pad 106a of the chip 100 of corresponding diagram 2A respectively, a plurality of power supply weld pad 106b, a plurality of ground connection weld pad 106c and a plurality of core weld pad 108, and can divide into a plurality of signal bump pads 206a, a plurality of power supply bump pads 206b, a plurality of ground connection bump pads 206c and a plurality of core bump pads 208, these signal bump pads 206a wherein, these power supply bump pads 206b and these ground connection bump pads 206c all are positioned at the periphery of these core bump pads 208, and form at least one signal projection gasket ring 212a respectively, at least one power supply projection gasket ring 212b and at least one ground connection projection gasket ring 212c, and with these core bump pads 208 is the center, and is the end face 202 that concentric annular is distributed in crystal covered package substrate 200.
Please refer to Fig. 5 A, Fig. 5 B, it is respectively the crystal covered package substrate of Fig. 4, the schematic layout pattern of its core power supply bump pads and core ground connection bump pads.Because the core weld pad 108 of the chip 100 of Fig. 2 A can be divided into core power supply weld pad 108a and the core ground connection weld pad 108b of Fig. 3 A, Fig. 3 B, so also corresponding above-mentioned core power supply weld pad 108a of core bump pads 208 and the core ground connection weld pad 108b of Fig. 4, and be divided into core power supply bump pads 208a and core ground connection bump pads 208b, shown in Fig. 5 A, be the layout arrangement mode of core power supply weld pad 108a and the core ground connection weld pad of corresponding diagram 3A, also interlaced with each other being arranged within the nucleus 210 between core power supply bump pads 208a and the core ground connection bump pads 208b.In like manner, layout arrangement mode for core power supply weld pad 108a and the core ground connection weld pad 108b of corresponding diagram 3B, core power supply bump pads 208a and core ground connection bump pads 208b form at least one core power supply projection gasket ring 214a and at least one core ground connection projection gasket ring 214b respectively, and are concentric annular and are distributed within the nucleus 210.
Then please refer to Fig. 6, it is the upward view of the crystal covered package substrate of Fig. 4.The bottom surface 204 of crystal covered package substrate 200 also is equipped with a plurality of solder ball pads, it is made of the bottom of these conductor layers 26 of Fig. 1 (near the bottom surface), these solder ball pads 36 are the signal bump pads 206a of the end face 202 of corresponding crystal covered package substrate 200 respectively, power supply bump pads 206b, ground connection bump pads 206c and core bump pads 208, and be divided into signal solder balls pad 236a, power supply solder ball pad 236b, ground connection solder ball pad 236c and core solder ball pad 238, wherein core solder ball pad 238 is positioned within the nucleus 240, and signal solder balls pad 236a, power supply solder ball pad 236b and ground connection solder ball pad 236c all are positioned at the periphery of core solder ball pad 238, and form at least one signal solder balls gasket ring 242a respectively, at least one power supply soldered ball gasket ring 242b and ground connection soldered ball gasket ring 242c, and with these core solder ball pads 238 is the center, and is the bottom surface 204 that concentric annular is distributed in crystal covered package substrate 200.
In order to shorten the coiling path between bump pads and the corresponding solder ball pad, to reduce planar inductor effect and Switching Noise, please also refer to Fig. 4, Fig. 6, the inside and outside annular distribution of the signal solder balls gasket ring 242a of the bottom surface 204 of crystal covered package substrate 200, power supply soldered ball gasket ring 242b and ground connection soldered ball gasket ring 242c will be corresponding to signal projection gasket ring 212a, the power supply projection gasket ring 212b of the end face 202 of crystal covered package substrate 200 and the inside and outside annular distribution of ground connection projection gasket ring 212c.For example, when signal projection gasket ring 212a is positioned at the outer shroud of these projection gasket rings, the then corresponding outer shroud that is positioned at these soldered ball gasket rings 242 of signal solder balls gasket ring 242a then so will make the signal bump pads 206a that is positioned at outer shroud with the signal solder balls pad 236a of correspondence coiling downwards to outer shroud.In like manner, when signal projection gasket ring 212a is positioned at the innermost ring of these projection gasket rings 212, then the then corresponding innermost ring that is positioned at these soldered ball gasket rings 242 of signal solder balls gasket ring 242a so will make the signal bump pads 206a that is positioned at innermost ring that correspondence is wound the line to the signal solder balls pad 236a of innermost ring downwards.Because bump pads 206 coiling downwards of outer shroud is to the solder ball pad 236 of the correspondence of outer shrouds, the bump pads 206 of innermost ring then winds the line downwards to the solder ball pad 236 of the correspondence of innermost ring, so can shorten the coiling path between bump pads 106 and the corresponding solder ball pad 236, thereby effectively reduce planar inductor effect and Switching Noise, and then improve its electric usefulness.
Please refer to Fig. 7 A, Fig. 7 B, it is respectively the crystal covered package substrate of Fig. 6, the schematic layout pattern of its core power supply solder ball pad and core ground connection solder ball pad.Because core power supply bump pads 208a and the core ground connection bump pads 208b of core solder ball pad 238 corresponding diagram 5A, Fig. 5 B of Fig. 6, can be divided into core power supply solder ball pad 238a and core ground connection solder ball pad 238b, shown in Fig. 7 A, be the layout arrangement mode of core power supply bump pads 208a and the core ground connection bump pads 208b of corresponding diagram 5A, also interlaced with each other being arranged within the nucleus 240 between core power supply solder ball pad 238a and the core ground connection solder ball pad 238b.In like manner, layout arrangement mode for core power supply bump pads 208a and the core ground connection bump pads 208b of corresponding diagram 5B, core power supply solder ball pad 238a and core ground connection solder ball pad 238b also form at least one core power supply soldered ball gasket ring 244a and at least one core ground connection soldered ball gasket ring 244b respectively, and are concentric annular and are distributed within the nucleus 240.
Please refer to Fig. 8, it is the utility model and known crystal covered package substrate, the comparison diagram of its planar inductor value.When known technology is planned at the crystal covered chip projection, do not consider the layout of substrate and soldered ball in the lump, the coiling path between the bump pads that so will increase regular annular arrangement and the corresponding irregular alignment solder ball pad, thereby cause long current path.Therefore, when inductance measures a zone of crystal covered package substrate with solder ball pad of irregular alignment, when different classes of solder ball pad has been interted at two ends that wherein should the zone, the inductance measurement obtains the planar inductor value near end positions of planar inductor curve 301 and will significantly climb sharply, and its corresponding inductance value variation is bigger, thereby reduces the electric usefulness of chip after chip package.Yet, the ring-type regular distribution is made in the position of the solder ball pad of crystal covered package substrate of the present utility model corresponding to the position of bump pads, so can shorten the coiling path between bump pads and the corresponding solder ball pad, because regularly arranged solder ball pad of the same type in the zone that is measured, so can make the planar inductor curve 302 of crystal covered package substrate present lower inductance value, and its corresponding inductance value variation is also less, so can effectively improve the electric usefulness of chip after chip package.
Based on above-mentioned, crystal covered package substrate of the present utility model has following advantage:
(1) crystal covered package substrate of the present utility model can design power supply and ground connection solder ball pad are concentrated, so help the wiring of the printed circuit board (PCB) of crystal covered package substrate and carrying.
(2) crystal covered package substrate of the present utility model can make the projection on the crystal covered chip arrive soldered ball on the crystal covered package substrate with the shortest coiling path, thus can effectively reduce the planar inductor effect, and the lower Switching Noise of generation.
(3) crystal covered package substrate of the present utility model can make power supply and ground connection solder ball pad concentrate, and utilizes thicker plane routing, in order to the reduction resistance value, and obtains preferable electrical characteristic.
(4) crystal covered package substrate of the present utility model can make same group of signal of chip use its needed power supply and ground connection nearby and on average.
In sum, crystal covered package substrate of the present utility model has the chip of multi-turn weld pad ring at known design, and multi-turn projection gasket ring is arranged in the corresponding design of end face of crystal covered package substrate, and the corresponding above-mentioned multi-turn projection gasket ring in the bottom surface of crystal covered package substrate and designed multi-turn soldered ball gasket ring, it should be noted that, the inside and outside relative position of the projection gasket ring of same type corresponds respectively to the inside and outside relative position of the soldered ball gasket ring of same type, wherein said projection gasket ring is meant the bump pads that wherein comprises the same type more than at least 50%, and described soldered ball gasket ring is meant the solder ball pad that wherein comprises the same type more than at least 50%.
Though the utility model discloses as above with a preferred embodiment; right its is not in order to limit the utility model; any those of ordinary skill in the art; in not breaking away from spirit and scope of the present utility model; when doing a little change and retouching, therefore protection range of the present utility model is as the criterion when looking the accompanying Claim person of defining.
Claims (7)
1. a crystal covered package substrate is characterized in that, comprises at least:
A plurality of conductor layers of patterning, overlapped in regular turn;
At least one insulating barrier is equipped between two adjacent these conductor layers, in order to isolating these conductor layers, and interlaced superimposed with these conductor layers; And
At least one conductive plunger runs through this insulating barrier, in order to electrically connecting these conductive layers,
Wherein the bottom of these conductor layers has:
A plurality of core solder ball pads,
At least one signal solder balls gasket ring, it is positioned at the periphery of these core solder ball pads,
At least one power supply soldered ball gasket ring, it is positioned at the periphery of these core solder ball pads, and
At least one ground connection soldered ball gasket ring, it is positioned at the periphery of these core solder ball pads, wherein
This signal projection gasket ring, this power supply projection gasket ring and this ground connection projection gasket ring are concentric annular
Distribute.
2. crystal covered package substrate as claimed in claim 1 is characterized in that: this core solder ball pad comprises a plurality of core power supply solder ball pads and a plurality of core ground connection solder ball pad.
3. crystal covered package substrate as claimed in claim 1 is characterized in that: these core power supply solder ball pads and these core ground connection solder ball pads are arrangement interlaced with each other.
4. crystal covered package substrate as claimed in claim 1, it is characterized in that: these core power supply solder ball pads are formed at least one core power supply soldered ball gasket ring, and these core ground connection solder ball pads are formed at least one core ground connection soldered ball gasket ring, and this core power supply soldered ball gasket ring and this core ground connection soldered ball gasket ring are concentric annular and distribute.
5. crystal covered package substrate as claimed in claim 1 is characterized in that: this signal solder balls gasket ring is made up of a plurality of solder ball pad, and these solder ball pads more than 50 percent are the signal solder balls pad.
6. crystal covered package substrate as claimed in claim 1 is characterized in that: this power supply soldered ball gasket ring is made up of a plurality of solder ball pad, and these solder ball pads more than 50 percent are the power supply solder ball pad.
7. crystal covered package substrate as claimed in claim 1 is characterized in that: this ground connection soldered ball gasket ring is made up of a plurality of solder ball pad, and these solder ball pads more than 50 percent are the ground connection solder ball pad.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 02236948 CN2559099Y (en) | 2002-06-05 | 2002-06-05 | Covered wafer packaging substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 02236948 CN2559099Y (en) | 2002-06-05 | 2002-06-05 | Covered wafer packaging substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN2559099Y true CN2559099Y (en) | 2003-07-02 |
Family
ID=33711048
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 02236948 Expired - Lifetime CN2559099Y (en) | 2002-06-05 | 2002-06-05 | Covered wafer packaging substrate |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN2559099Y (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100463130C (en) * | 2004-05-20 | 2009-02-18 | 威盛电子股份有限公司 | Crystal-cladded package preparing process |
| CN103295996A (en) * | 2012-06-29 | 2013-09-11 | 上海天马微电子有限公司 | Package substrate and manufacturing method thereof |
| CN105321889A (en) * | 2014-07-31 | 2016-02-10 | 京瓷电路科技株式会社 | Wiring board |
-
2002
- 2002-06-05 CN CN 02236948 patent/CN2559099Y/en not_active Expired - Lifetime
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100463130C (en) * | 2004-05-20 | 2009-02-18 | 威盛电子股份有限公司 | Crystal-cladded package preparing process |
| CN103295996A (en) * | 2012-06-29 | 2013-09-11 | 上海天马微电子有限公司 | Package substrate and manufacturing method thereof |
| CN103295996B (en) * | 2012-06-29 | 2016-06-15 | 上海天马微电子有限公司 | Package substrate and manufacturing method thereof |
| CN105321889A (en) * | 2014-07-31 | 2016-02-10 | 京瓷电路科技株式会社 | Wiring board |
| CN105321889B (en) * | 2014-07-31 | 2018-10-26 | 京瓷株式会社 | Circuit board |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CX01 | Expiry of patent term |
Expiration termination date: 20120605 Granted publication date: 20030702 |