CN2276176Y - Placing timer for track events - Google Patents
Placing timer for track events Download PDFInfo
- Publication number
- CN2276176Y CN2276176Y CN 96227115 CN96227115U CN2276176Y CN 2276176 Y CN2276176 Y CN 2276176Y CN 96227115 CN96227115 CN 96227115 CN 96227115 U CN96227115 U CN 96227115U CN 2276176 Y CN2276176 Y CN 2276176Y
- Authority
- CN
- China
- Prior art keywords
- ranking
- counter
- time
- signal
- controller
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Landscapes
- Measurement Of Unknown Time Intervals (AREA)
Abstract
The utility model relates to a place timer for track events, which comprises a starting signal making device 1, a radio transmitter 2, a radio receiver 3, an Infrared emitter 4, an Infrared receiver 5 and a recording module 6, wherein, the recording module 6 is controlled by a radio signal which is produced by the starting signal making device or manully controlled according to sound which is produced by the starting signal making device to start timing. The recordation of places and time are controlled by a signal which is outputted by the Infrared receiver 5. The utility model has the advantages of simple structure, low cost, accurate recordation and high work efficiency, and is applicable to the items of various track competitions.
Description
The utility model provides a kind of track with ranking, timer, belongs to time electronic measurement equipment field.
At present, manual time-keeping is adopted in track events more, also report relevant for the technology of electronic timing system, patent of invention as Chinese patent communique bulletin on April 21st, 1993: wireless telecontrol velocity measuring system for training athlete by segmental timekeepings, application number: 91109336, applicant: Ai Xiulan, it is by the device of issuing an order, off switch, radio transmitter, radio receiver, infrared transmitter, infrared remote receiver, micro-computer subsystem, keyboard, composition such as display and printer, can be used for measuring in real time in the track man training between the time and speed and reaction time of start that the sportsman runs omnidistance and set each minute segment distance, also can be used for speed skating, the section metering of runway such as footrace and bicycle sports events tests the speed, and uses as surveillance as electronic meter or for the arbitration personnel in minor tournament.Defective is complex structure, costs an arm and a leg, do not have the ranking writing function, can not write down athletic time of each runway and ranking simultaneously.
The purpose of this utility model provide a kind of with infrared ray is done finishing line, adopts radio remote control technology, can be remembered 8 athletic rankings and time simultaneously, cost is low track with ranking, timer.
The purpose of this utility model is achieved in that
A kind of track ranking, timer, comprise the device of issuing an order, radio transmitter, radio receiver, infrared transmitter, infrared receiver and logging modle, logging modle is by radio transmitter, radio receiver and the device control linkage of issuing an order, send wireless signal control or pick up counting by the device of issuing an order according to the acoustic artificial controlling recording module that the device of issuing an order sends, logging modle realizes ranking, clocking capability also through infrared receiver and infrared transmitter control linkage by infrared receiver output signal controlling recording module simultaneously.
Described track ranking, timer, corresponding to 8 runways, each runway is equipped with an infrared transmitter and an infrared receiver, corresponding to each runway, the also corresponding electronic switch that is provided with of logging modle, bistable circuit, differentiating circuit, ranking decoding latch and time decoding latch, also be provided with signal controller simultaneously, the long-distance running controller, the ranking display, the ranking counter, time display, time counter, the reading controller, the passage display, pulse producer, counter-controller and clear " 0 " controller, trigger pip by electronic switch or the output of long-distance running controller receiving infrared-ray receiver, counter-controller is connected with radio receiver with time counter respectively, acceptance issue an order starting singal that device sends and simultaneously the control time counter pick up counting, pulse producer is connected the input pulse signal with time counter, clearly " 0 " controller respectively with the long-distance running controller, radio transmitter, the reading controller, the ranking counter, time counter is connected with bistable circuit realizes that clear " 0 " and control radio transmitter send clearly " 0 " signal, the reading controller is connected with the passage display, and by control ranking decoding latch and time decoding latch, the ranking and the time that show certain a time by ranking display and time display, bistable circuit is connected with the long-distance running controller, or be connected with signal controller through electronic switch and receive sportsman's trigger pip of breasting the tape, and with this signal through differentiating circuit input ranking counter, the ranking of ranking latch decoder and time latch decoder and time signal are provided by ranking counter and time counter respectively.
Described track ranking, timer, clear " 0 " controller is by switch, electric capacity and phase inverter F
19Form, the long-distance running controller is by count splitter, phase inverter F
20, resistance and one group of diode form, during the dash match, by the electronic switch of each runway and corresponding infrared receiver connection reception trigger pip; During long-distance race, by phase inverter F
20Receive the trigger pip of lane number one infrared receiver output, and successively the signal that receives is outputed to corresponding bistable circuit through count splitter, by clear " 0 " of switch control bistable circuit, and through phase inverter F
19Connect clear " 0 " end of clear " 0 " end of count splitter and reading controller, ranking counter, time counter, control clear " 0 " signal of radio transmitter simultaneously and launch.
Described track ranking, timer, the IC of composition ranking counter
63And the IC of makeup time counter
57~62Be and add counter synchronously, wherein IC
59With phase inverter F
46~47, when electric capacity, diode, resistance are formed sextuple denotation counter and are used to count ten second, full 6 to IC
58Advance one, other is decade counter, IC
57~63An input end and IC
57~61Another input end grounding, IC
57~63An input end be clear " 0 " end, and IC
62The pulse signal of input end received pulse generator output, the permission count signal of another input end count pick up controller output, IC
63An input end receive the ranking trigger pip of each runway differentiating circuit output.
Described track ranking, timer, the reading controller is by counter IC
68, code translator IC
69~70And resistance R
33~34, R
45, diode, electric capacity, switch form, IC wherein
68An input end R be clear " 0 " end, its CPA end is by switch control received pulse signal, and signal is outputed to code translator IC respectively
69~70, code translator IC
70Output terminal a~g connect the passage display, code translator IC
690~7 output terminal connect the time decoding latch and the ranking decoding latch of corresponding runway respectively, its 8 output terminal connects clearly " 0 " end through diode.
Described track ranking, timer, the bistable circuit of corresponding each runway is by resistance, phase inverter F
21~23Form with light emitting diode, the signal of signal controller or the output of long-distance running controller is by phase inverter F
21Receive, and by phase inverter F
22Output to corresponding differentiating circuit, ranking decoding latch, time decoding latch and through phase inverter F
23Output to the light emitting diode indication, the differentiating circuit of corresponding each runway is formed by diode, electric capacity and resistance, receives phase inverter F by electric capacity
22The signal of output, and output to the ranking counter through diode.
Described track includes 6 latch IC with ranking, timer, the time decoding latch of corresponding each runway
1~6, ranking decoding latch includes 1 latch IC
7With the delay circuit of being made up of resistance, electric capacity, the latch signal of bistable circuit output all meets IC
1~6An input end and after delay circuit time-delay, meet IC
7An input end, IC
1~7Another input end receive the control signal of reading controller output, and control it time and ranking signal outputed to time display and ranking display, demonstration time and ranking through diode respectively by its output terminal.
Described track ranking, timer, can delete radio transmitter and radio receiver, other structure is constant, the sound that sends according to the device of issuing an order, thereby, realize ranking, clocking capability by artificial permission counting by control counter-controller control time counter.
The utility model compared with prior art, do finishing line with infrared ray, send wireless signal control time counter by the device of issuing an order and begin counting, also can begin according to the acoustic artificial control time rolling counters forward that the device of issuing an order sends, when the sportsman breasted the tape, the signal of infrared receiver output was by the ranking rolling counters forward, and the control time counter stops counting, by ranking, time decoding latch record ranking, time signal, show simultaneously by the control of reading controller.This apparatus structure is simple, cost is low, record is accurate, high efficiency, is highly suitable for various track events.
Fig. 1 is a principle of work block diagram of the present utility model;
Fig. 2 is the circuit theory diagrams of a logging modle part among the utility model one embodiment;
Fig. 3 is the circuit theory diagrams of logging modle another part among the utility model one embodiment;
Below in conjunction with drawings and Examples the utility model is described further:
Among Fig. 2, signal controller 8 is by K switch
3, capacitor C
1, resistance R
9~10With phase inverter F
17~18Form, wherein capacitor C
1One end ground connection, the other end connects K switch respectively
3And resistance R
10, K switch
3Respectively through resistance R
9With through phase inverter F
17~18Connect electronic switch 7, at phase inverter F
17With F
18Junction connecting resistance R
10During the dash match, each runway is established an infrared receiver 4, infrared receiver 5 and by resistance R
1, phase inverter F
1With bidirectional analog switch F
2The electronic switch of forming 7 is by phase inverter F
1The signal of breasting the tape of receiving infrared-ray receiver 5 outputs, and trigger bidirectional analog switch F
2Conducting is controlled output signals respectively through diode D by signal controller 8
1Connect the input end of corresponding bistable circuit 10, and successively through diode D
1, D
2Connect " 0 " controller 22 clearly, clear " 0 " controller 77 is by K switch
1, capacitor C
2And phase inverter F
19Form, wherein K switch
1And capacitor C
2One end ground connection meets diode D respectively after the other end joins
2, through phase inverter F
19Spreading runs controller 9 and through resistance R
12Connect+the 6V power supply; Long-distance running controller 9 is by count splitter IC
71, resistance R
3, phase inverter F
20And one group of diode D
17~24Form, only need during long-distance running count splitter IC
71CP end through phase inverter F
20Connect the output terminals A of lane number one infrared receiver 5, count splitter IC
71With the signal allocation that receives after respective diode outputs to corresponding bistable circuit 10, wherein count splitter IC
71Vdd terminal and EN termination+6V power supply, its VSS end ground connection, the output terminals A~H of infrared receiver 5 is through resistance R
1Also meet+the 6V power supply count splitter IC
71R end and the A end of remote control transmitter 2 be clearly " 0 " end, meet phase inverter F
19Output terminal, by K switch
1Control clear " 0 ", the VSS end ground connection of remote control transmitter 2, vdd terminal connects+the 6V power supply; Each road bistable circuit 10 is by resistance R
13, phase inverter F
21~23, LED forms phase inverter F
21The signal of received signal controller 8 or 9 outputs of long-distance running controller, and through phase inverter F
22Corresponding differentiating circuit 10, time decoding latch 15 and the ranking decoding latch 12 of input controlled it and latched phase inverter F respectively
22Output terminal also through resistance R
13Meet phase inverter F
21Input end, phase inverter F simultaneously
22The signal of output is also successively through phase inverter F
23, LED, resistance R
44Connect+6V power supply realization deixis; The differentiating circuit 11 on each road is by capacitor C
3, resistance R
23And diode D26 forms capacitor C
3With phase inverter F
22Output terminal connect received signal, its other end is through resistance R
23Ground connection and through diode D
26Import ranking counter 14 respectively and through resistance R
21Ground connection.
In Fig. 3, pulse producer 20 is by capacitor C
11~12, phase inverter F
44~45, crystal block W, resistance R
31And add counter IC synchronously by 4 BCD
64~67The level Four frequency-dividing counter of forming is formed, wherein capacitor C
11~12One end ground connection, capacitor C
11Other end connecting resistance R respectively
31, phase inverter F
44With crystal block W, resistance R
31, phase inverter F
44Join after capacitor C with the crystal block W other end
12Ground connection, and output 1MHZ pulse signal is through phase inverter F
45Input four utmost point frequency-dividing counters carry out frequency division after the integer, behind frequency division, by IC
67Q
4The pulse signal of end output 100HZ is to time counter 17, and the CPA of level Four frequency-dividing counter, VSS, R hold equal ground connection; Counter-controller 21 is by resistance R
22, phase inverter F
49~50, K switch
2Form K switch
2One termination+6V power supply, the other end connect A end, the resistance R of receiver of remote-control sytem 3 respectively
22Successively through phase inverter F
50And F
49Connect time counter 17 and resistance R
22The other end; Time counter 17 adds counter IC synchronously by 6 BCD
57~62, phase inverter F
46~47, capacitor C
13, diode D
25And resistance R
32Form, wherein IC
59With phase inverter F
46~47, capacitor C
13, diode D
25, resistance R
32Form sextuple denotation counter, when being used to count ten second, full 6 to IC
58Advance one, other is decade counter.IC
57~61CPA end and VSS hold ground connection, IC
62CPA end is connected with counter-controller 21 and receives the permission count signal, its VSS holds ground connection, IC
57~62R end be clearly " 0 " termination phase inverter F
19Output terminal, IC
62The 100HZ pulse signal of cpe end received pulse generator 20 input, IC
57~62Output terminal Q
1~4Count signal is imported input end A, B, C, the D of corresponding time decoding latch 15, IC simultaneously respectively with the binary-coded decimal form
57~61Cpe end also receive the next stage carry, make time counting can be accurate to 1/100 second; Ranking counter 12 adds counter IC synchronously for BCD
63, its VSS end ground connection, the R end is clear " 0 " end, and its CPA termination is received the signal of differentiating circuit 11 outputs, and it is defeated by end Q
1~4Import input end A, B, C, the D of the ranking decoding latch 12 on each road with the binary-coded decimal form; The VSS end ground connection of receiver of remote-control sytem 3, its vdd terminal connects+the 6V power supply.Each road time decoding latch 15 is by 6 binary-coded decimal latch IC
1~6Form, each road ranking decoding latch 12 is by binary-coded decimal latch IC
7Reaching the delay circuit of being made up of resistance R, capacitor C forms, the latch signal of bistable circuit 10 outputs is deciphered the LE end of latch 15 respectively input time, latch with the LE end control of input ranking decoding latch 12 after the delay circuit time-delay of resistance R, capacitor C group, simultaneously the other end ground connection of capacitor C.
Reading controller 18 is by counter IC
68, code translator IC
69~70, diode D
425~426Resistance R
33~34, capacitor C
22~23, K switch
4Form capacitor C
23One termination+6V power supply, other end ground connection, resistance R
33, capacitor C
22One end ground connection meets IC respectively after the other end joins
68CPA end or through resistance R
34, K switch
4Meet+the 6V power supply IC
68Cpe end and vdd terminal meet+the 6V power supply IC
68R end for clear " 0 " end, respectively through diode D
425Meet phase inverter F
19Output terminal, through diode D
426Meet IC
69Output terminal 8 and through resistance R
45Ground connection, IC
68Q
1~4Output terminal is imported IC respectively with the binary-coded decimal form
69~70A, B, C, D input end, IC
70A~g defeated show passages by termination passage display 19, its BI end and vdd terminal connect+the 6V power supply, its LE end, VSS hold and IC
69VSS end ground connection, IC
690~7 output terminal import the time decoding latch 15 of corresponding runway and the BI end of ranking decoding latch 12 respectively, by K switch
4Control select to show corresponding passage, and is collected mail number by the B1 termination of time decoding latch 15 and ranking decoding latch 12, by its control with time and ranking signal by output terminal a~g respectively through diode D
0When outputing to display 16 and ranking display 13, demonstration time and ranking.Resistance R
43One end ground connection, the other end connect ranking display 13, time display 16 and passage display 19 respectively, and time display 16 is made up of 6 display screens, show respectively very, divide, ten seconds, second, 1/10 second and 1/100 second.
Claims (8)
1, a kind of track ranking, timer, comprise the device of issuing an order (1), radio transmitter (2), radio receiver (3), infrared transmitter (4), infrared receiver (5) and logging modle (6), it is characterized in that: logging modle (6) is by radio transmitter (2), radio receiver (3) and device (1) control linkage of issuing an order, and through infrared receiver (5) and infrared transmitter (4) control linkage.
2, track ranking as claimed in claim 1, timer, it is characterized in that: corresponding to 8 runways, each runway is equipped with an infrared transmitter (4) and an infrared receiver (5), also corresponding 8 electronic switches (7) that are provided with of logging modle (6), 8 bistable circuits (10), 8 differentiating circuit (11), 8 ranking decoding latchs (12) and 8 groups of time decoding latchs (15), also be provided with signal controller (8) simultaneously, long-distance running controller (9), ranking display (13), ranking counter (14), time display (16), time counter (17), reading controller (18), passage display (19), pulse producer (20), counter-controller (21) and clear " 0 " controller (22), trigger pip by electronic switch (7) or long-distance running controller (9) receiving infrared-ray receiver (5) output, counter-controller (21) is connected with radio receiver (3) with time counter (17) respectively, pulse producer (20) is connected the input pulse signal with time counter (17), clearly " 0 " controller (22) respectively with long-distance running controller (9), radio transmitter (2), reading controller (18), ranking counter (14), time counter (17) is connected with bistable circuit (10) realizes that clear " 0 " and control radio transmitter (2) send clearly " 0 " signal to the device of issuing an order (1), reading controller (18) is connected with passage display (19), and by control ranking decoding latch (12) and time decoding latch (15), the ranking and the time that show certain a time by ranking display (13) and time display (16), bistable circuit (10) also is connected with long-distance running controller (9), or be connected with signal controller (8) through electronic switch (7) and receive trigger pip, and with this signal through differentiating circuit (11) input ranking counter (14), by ranking counter (14) signal is outputed to ranking latch decoder (12), bistable circuit (10) is also imported latch signal respectively ranking latch decoder (12) and time latch decoder (15) simultaneously, and time latch decoder (15) also is connected the time of reception signal with time counter (17).
3, track as claimed in claim 2 ranking, timer is characterized in that: clear " 0 " controller (22) is by K switch
1, capacitor C
2With phase inverter F
19Form, wherein K switch
1, capacitor C
1An end ground connection, long-distance running controller (9) is by count splitter IC
71, phase inverter F
20, resistance R
11And diode D
17~24Form, during the dash match, connect corresponding infrared receiver (5), receive trigger pip by the electronic switch (7) of each runway; During long-distance race, by phase inverter F
20Receive the trigger pip of lane number one infrared receiver (5) output, and with this signal through count splitter IC
71Output to corresponding 8 bistable circuits (10), by K switch
1Clear " 0 " of control bistable circuit (10), and through phase inverter F
19Meet count splitter IC
71Clear " 0 " end R and reading controller (18), ranking counter (14), clear " 0 " end of time counter (17), control clear " 0 " signal of radio transmitter (2) simultaneously and launch.
4, track as claimed in claim 2 is characterized in that: the IC that forms ranking counter (14) with ranking, timer
63And the IC of makeup time counter (17)
57~62Be and add counter synchronously, wherein IC
59With phase inverter F
46~47, capacitor C
13, diode D
25, resistance R
32Form sextuple denotation counter and be used for meter during second, other is decade counter, IC
57~63VSS end and IC
57~61CPA end ground connection, IC
57~63R end be clear " 0 " end, and IC
62The pulse signal of cpe end received pulse generator (20) output, receive the permission count signal of counter-controllers (21) output, IC by its CPA termination
63The CPA termination receive the ranking trigger pip of each runway differentiating circuit (11) output.
5, track as claimed in claim 2 ranking, timer, it is characterized in that: reading controller (18) is by counter IC
68, code translator IC
69~70And resistance R
33~34, R
45, diode D
426, capacitor C
22~23, K switch
4Form, wherein IC
68R end be clear " 0 " end, its CPA end is through K switch
4Control the received pulse signal, and signal is outputed to code translator IC respectively
69~70 input end, code translator IC
70Output termination passage display (19), code translator IC
690~7 output terminal meet the time decoding latch (15) of corresponding runway and the control display end BI of ranking decoding latch (12) respectively, its 8 output terminal connects clearly " 0 " through diode D426 and holds.
6, track as claimed in claim 2 ranking, timer, it is characterized in that: the bistable circuit (10) of corresponding each runway is by resistance R
13, phase inverter F
21~23Form with LED, by phase inverter F
21Received signal, and by phase inverter F
22Output to corresponding differentiating circuit (11) and corresponding ranking decoding latch (12) and time decoding latch (15), the differentiating circuit (11) of corresponding each runway is by diode D
26, capacitor C
3And resistance R
23Form, by capacitor C
3Receive phase inverter F
22The signal of output, and through diode D
26Output to ranking counter (14).
7, track as claimed in claim 2 ranking, timer is characterized in that: the time decoding latch (15) of corresponding each runway is by 6 latch IC
1~6Form, ranking decoding latch (17) is by 1 latch IC
7Form with the delay circuit of being made up of resistance R, capacitor C, the latch signal of bistable circuit (10) output all meets IC
1~6An input end LE and after the delay circuit time-delay that resistance R, capacitor C are formed, meet IC
7An input end LE, IC
1~7Another input end BI receive the control signal of reading controller (18) output, and control its with time and ranking signal by output terminal a~g respectively through diode D
0Output to time display (16) and ranking display (13) demonstration time and ranking.
8, track as claimed in claim 1 or 2 ranking, timer, it is characterized in that: can delete radio transmitter (2) and radio receiver (3), other structure is constant, realizes ranking, clocking capability by the permission counting of counter-controller (21) control time counter (17).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 96227115 CN2276176Y (en) | 1996-01-16 | 1996-01-16 | Placing timer for track events |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 96227115 CN2276176Y (en) | 1996-01-16 | 1996-01-16 | Placing timer for track events |
Publications (1)
Publication Number | Publication Date |
---|---|
CN2276176Y true CN2276176Y (en) | 1998-03-11 |
Family
ID=33905312
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN 96227115 Expired - Fee Related CN2276176Y (en) | 1996-01-16 | 1996-01-16 | Placing timer for track events |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN2276176Y (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11831430B2 (en) | 2020-08-20 | 2023-11-28 | Tencent Technology (Shenzhen) Company Limited | Methods and apparatuses for encoding and decoding signal frame |
-
1996
- 1996-01-16 CN CN 96227115 patent/CN2276176Y/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11831430B2 (en) | 2020-08-20 | 2023-11-28 | Tencent Technology (Shenzhen) Company Limited | Methods and apparatuses for encoding and decoding signal frame |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4442426A (en) | Signal transmission | |
CN103824439A (en) | Segmented timing velocity measuring system based on wireless local area network | |
CN2276176Y (en) | Placing timer for track events | |
CN104007284B (en) | Laser-array and intelligent-terminal combined shuttlecock speed measuring system and method | |
CN204008691U (en) | The shuttlecock velocity-measuring system of a kind of combination laser array and intelligent terminal | |
CN207587017U (en) | A kind of timer | |
CN106990738B (en) | A kind of distributed data acquisition synchronization system based on Hardware I/O | |
GB1325644A (en) | Scoring equipment for sporting contests | |
CN104639569A (en) | Body building network interaction system | |
GB1517304A (en) | Remote control means | |
CN204395392U (en) | Based on the hardware configuration of the running athlete auxiliary training system of Zigbee wireless network | |
CN217163123U (en) | Basketball stand for basketball teaching | |
CA1056038A (en) | Range readout method and appartus | |
CN2221233Y (en) | Electronic track and field sports judging device | |
DE69127278T2 (en) | SYSTEM FOR COLLECTING AND DISTRIBUTING ARROW STATISTICS | |
CN201329165Y (en) | Recording instrument of results of track events | |
CN213316251U (en) | Lollipop stick detection and sorting device | |
CN2679767Y (en) | Circles counter for long distance racing | |
CN220208105U (en) | Photoelectric timing device for body trunk punching and wire punching | |
CN108273251A (en) | A kind of swimming lane timing log arrangement based on RFID | |
CN2170783Y (en) | Electron device for guide running or guide swimming | |
CN2030739U (en) | Wireless remote control digital-display timer for water polo and basketball | |
CN216623009U (en) | Pigeon racing public shed collector | |
CN2609024Y (en) | Clocks and watches with illuminating point | |
CN209149324U (en) | Population flow detection device based on environment scattering |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C19 | Lapse of patent right due to non-payment of the annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |