CN2030739U - Wireless remote control digital-display timer for water polo and basketball - Google Patents
Wireless remote control digital-display timer for water polo and basketball Download PDFInfo
- Publication number
- CN2030739U CN2030739U CN87209393U CN87209393U CN2030739U CN 2030739 U CN2030739 U CN 2030739U CN 87209393 U CN87209393 U CN 87209393U CN 87209393 U CN87209393 U CN 87209393U CN 2030739 U CN2030739 U CN 2030739U
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- China
- Prior art keywords
- circuit
- diode
- time sequential
- timer
- monostable trigger
- Prior art date
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Abstract
The utility model discloses a wireless remote control digital-display timer used for the timekeeping of 35 seconds in a water polo match or 30 seconds in a basketball match. The main machine part is composed of a time-base pulse-generating circuit, a frequency dividing circuit, a 2*10 reversible counting circuit, a logic control circuit, an eight-way time sequential pulse code circuit and a time sequential pulse amplitude modulation carrier wave transmitting circuit with 100% modulation degree. A display part is compose of a signal receiving circuit, and large-sized LED dot-matrix digit display screens of a first demoding circuit, a second demoding circuit and a third demoding circuit. The timer can be remotely controlled for timekeeping and display by the wireless means or wire means.
Description
The utility model belongs to the product that the wireless remote control numeral shows timer.Existing both at home and abroad match of water polo 35 seconds or 30 seconds timing products of Basketball Match of being used for, commonly used stopwatch arranged, have line traffic control to show timer, electronic timer, above-mentioned three kinds of timing products, though can finish match of water polo 35 seconds or Basketball Match timework in 30 seconds, but also have many problems, what influence was competed normally carries out.
The utility model is according to wireless remote control principle and the existing problem that is used for match of water polo 35 seconds or the existence of 30 seconds timing product of Basketball Match, design that a kind of power consumption is few, cost is low, moisture resistance is strong, fault is few, demonstration is clear, easy to use, a tractor serves several purposes, and there is the wireless remote control numeral of higher reliability and accuracy to show timer, makes that the timing in 30 seconds of match of water polo 35 seconds or Basketball Match is come into the open, modernization, provide the very first time information of match for sportsman, trainer, spectators etc.
The utility model is made up of main frame (master station) and two 60 * 40cm digital display screens, as figure<1 〉,<2 〉.
Figure<1〉main frame outside drawing is 1. startup/pause button, 2. reset button, 3. selector switch, 4. power switch wherein, 5. subtract button, 6. add button, 7. main fuse, 8. numeral shows, 9. launch telescopic antenna, 10. supply socket, (11) radio frequency pilot lamp, (12) main fuse.
Figure<2〉digital display screen is (13) telescopic antenna wherein, (14) direct current 24V external power supply, (15) fuse, (16) line traffic control socket, the fastening gong silk of (17) foot rest, (18) power lead, (19) power switch, (20) loudspeaker.
Main pulse produced circuit, frequency dividing circuit, 2 * 10 system reversible counting circuit when the main frame block scheme included, logic control circuit, and the time sequential pulse modulated subcarrier technique radiating circuit of eight road time sequential pulse coding circuits and 100% degree of modulation is formed.As figure<3 〉.Show block scheme by signal receiving circuit, first, second and third decoding circuit and large LED battle array digital display screen are formed.As figure<4 〉.
The time main pulse circuit generation produce the 32768Hz/S pulse signal by quartz oscillation, through frequency dividing circuit IC
6Produce the pulse signal (16 frequency division) of 2048Hz/S, the one tunnel produces the sound signal of the interrupted 2048Hz/S of 4Hz/S through the audio frequency gate circuit; Another road is through gate 1/4IC
13To 2
-11Frequency division produces the 1Hz/S signal and gives the timer timing, delivers to the digital demonstration of LED then.As figure<5 〉.
The reversible presettable counter of 2 * 10 systems, the second signal of being sent here by frequency dividing circuit, gate circuit carries out double-digit countdown, simultaneously by two decoder ic IC
1, IC
2Decoding is given the LED numeral at last and is shown.Reset, timing, add, subtract counting etc. all thus counter finish.As figure<5 〉.
Logic control circuit is by IC
5And IC
10~IC
13The monostable trigger of forming, add, the gate circuit of down control, control instrument reset, start, suspend, add, subtract work such as selection.As figure<5 〉.
Eight road time sequential pulse coding circuits, the binary-coded decimal of being sent by counter accumulates eight road time sequential pulse signals through this circuit, so that remote-control transmitting.As figure<6 〉.
The high frequency carrier radiating circuit, by the carrier frequency oscillation of quartz oscillation generation 27.145MC, carrier frequency amplifies by high frequency power through 100% modulators modulate, launches from antenna.As figure<6 〉.
Signal receive section is by receiving, deciphering, and LED shows that promoting circuit forms.The radiofrequency signal that antenna receives is through BG
2High frequency amplifies the intermediate-freuqncy signal that goes out 455KHz with the frequency mixing difference of 26.690MC, through BG
3, BG
4Intermediate frequency amplifies the back by triode BG
5Detection goes out the time sequential pulse signal content, and produces AGC control voltage, and the gain of control intermediate frequency amplifier circuit forms eight road time sequential pulse signals after amplifying shaping.One tunnel input IC
1No. eight pulsqe distributors, and eight tunnel independence pulse widths are sent to by IC simultaneously corresponding to scrambler pulse width separately
5-IC
20The monostable trigger of forming is deciphered; Another road is then via phase inverter F
1-F
6It is the pulse of 0.28MS that integral differential of forming and shaping circuit produce pulsewidth, return zero to trigger divider, synchronizing signal as every frame, the 0.95MS width pulse signal that first decoding scheme produces, compare with the widened pulse that receives, the pulse signal that then to export a width when the ratio of pulse length to the total cycle length self-pulsing that receives is wide be 0.46MS, when the ratio of pulse length to the total cycle length self-pulsing that receives is narrow, then there is not output signal, at this moment, the pulse that first decoding detects is narrow, can not reflect needed signal content, for this reason, add second decoding scheme (being stretch circuit) and make output signal near the coded signal content, by eight road signals of second code translator output, the one tunnel through F again
9The anti-phase back of gate circuit control display screen is to zero flicker and interrupted sound equipment, and seven the tunnel through IC in addition
3, IC
4The 3rd decoding scheme translates the decimal number coded signal and delivers to the LED power pushing circuit and make display screen work.As figure<7 〉.
2KHz audio frequency restoring circuit:, do not comprise the 2KHz sound signal, thereby the 2KHz sound signal is lost because coding circuit only sends eight road signals.Therefore, be provided with F in the display screen circuit
7-F
8The 2KHz audio frequency restoring circuit of forming, this circuit signal produces interrupted sound equipment by gate circuit by 4Hz/S control.As figure<7 〉.
LED dot matrix digit display device is to be concatenated into one group again by some groups and be connected into seven piece of digital and show by several LED.As figure<8 〉.
The power conversion process: master station and display screen are all imported 220V/50 and are handed over the source electricity, and master station is reduced to 9V by transformation and provided stable 8V direct-current working volts through rectifying and voltage-stabilizing.Display screen is reduced to 9V and 24V by transformer, and 9V provides the work that receives decoding scheme through rectifying and voltage-stabilizing.24V provides LED light-emitting diodes operating voltage through rectification.
Important technological parameters:
Operate miss<2 * 10
-3/ S
Time-base signal degree of accuracy<10
-3/ S
Transmitting carrier frequency frequency 27.145MC
About 100 meters of emissive power 500MW()
Receiving sensitivity 10uv
IF-FRE 455KHz
The every frame 31ms of modulating pulse
Host power consumption 14W
Single display screen power consumption 50W
Screen size 60cm * 40cm
Claims (11)
1, a kind of match of water polo 35 seconds or dual-purpose wireless remote control numeral demonstration timer of Basketball Match timing in 30 seconds of being used for, it is characterized in that host machine part produces circuit by time base, the time sequential pulse modulated subcarrier technique radiating circuit of logic control circuit, eight road time sequential pulse coding circuits, 100% degree of modulation, display part are by signal receiving circuit, and first, second and third decoding circuit, promotion circuit and large LED dot matrix digit display screen are formed.
2, timer according to claim 1, the logic control circuit of host machine part, it is characterized in that by add, the gate circuit of down control, starting, time-out control circuit form.
3, the gate circuit of add-subtract control according to claim 2, it is characterized in that adding, subtracting an AND circuit input end separately and connect the anode that adds, subtracts button and diode respectively, the negative terminal of two diodes also connects, one the tunnel through resistance R ground connection, the other end of base pulse per second (PPS) control rejection gate was gone into end when another road connect, the output terminal of this output terminal and down control and door is connected to the CPD end of the reversible presettable counter of doubleclocking respectively through a rejection gate, the output terminal that adds counting and door connects the CPU end through a phase inverter.
4, starting according to claim 2, suspend control circuit, the output terminal that it is characterized in that monostable trigger is through a phase inverter, connect the CP end of d type flip flop, Q termination one Sheffer stroke gate of d type flip flop, the Q of d type flip flop end connects the IBR end of the seven-segment decoder of tens through one with door, the seven-segment decoder YBR output terminal of units is through phase inverter connecting resistance R, diode D and capacitor C are formed integrating circuit, connect the R end of d type flip flop again through a phase inverter.
5, eight road time sequential pulse coding circuits of timer host machine part according to claim 1 is characterized in that being made up of controlled circuit, the multichannel time sequential pulse coded combination circuit of oscillatory circuit, coding.
6, oscillatory circuit according to claim 5 is characterized in that one the tunnel connects R, C differentiating circuit through phase inverter, the TR end of the steady trigger of another road order.
7, coding according to claim 5, controlled circuit is characterized in that the binary-coded decimal control signal connects the I end through R
bConnect the triode b utmost point, diode D
1The C utmost point of positive termination triode, negative terminal and R
1, R
2Connect, the Q end of monostable trigger is through differentiating circuit C
2, R
3Be connected the TR end of Q termination next stage monostable trigger with the diode anode.
8, multichannel time sequential pulse coded combination circuit according to claim 5 is characterized in that can being connected to through two phase inverters by the negative pole output signal of the diode on multichannel time sequential pulse coding circuit and each road the TR end of monostable trigger.
9, timer according to claim 1 receives the pulsewidth comparator circuit that decoding circuit is characterized in that first decoding circuit is made of monostable trigger and diode D, resistance R, capacitor C, the Q end of monostable triggering wherein is connected with the anode of diode through resistance R, and through capacitor C ground connection, the negative terminal of diode and monostable trigger+the TR end is connected.
10, second and third decoding circuit of reception decoding circuit according to claim 9, it is characterized in that by the pulse signal of comparer output deliver to monostable trigger+the TR end, the binary-coded decimal signal of the Q end output of each road monostable trigger connects the corresponding A of the 3rd decoder ic, B, C, D end.
11, the LED dot matrix digit display device of timer shows part according to claim 1 is characterized in that connecing one group by several LED polyphones, and some groups constitute seven piece of digital display device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN87209393U CN2030739U (en) | 1987-06-20 | 1987-06-20 | Wireless remote control digital-display timer for water polo and basketball |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN87209393U CN2030739U (en) | 1987-06-20 | 1987-06-20 | Wireless remote control digital-display timer for water polo and basketball |
Publications (1)
Publication Number | Publication Date |
---|---|
CN2030739U true CN2030739U (en) | 1989-01-11 |
Family
ID=4824487
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN87209393U Ceased CN2030739U (en) | 1987-06-20 | 1987-06-20 | Wireless remote control digital-display timer for water polo and basketball |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN2030739U (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101390139B (en) * | 2006-02-27 | 2011-02-02 | 株式会社东芝 | Light emitting device |
CN102682491A (en) * | 2012-05-11 | 2012-09-19 | 深圳市天孚实业有限公司 | Basketball game count down device fusing singlechip and LED (light-emitting diode) display technology |
-
1987
- 1987-06-20 CN CN87209393U patent/CN2030739U/en not_active Ceased
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101390139B (en) * | 2006-02-27 | 2011-02-02 | 株式会社东芝 | Light emitting device |
US8053996B2 (en) | 2006-02-27 | 2011-11-08 | Kabushiki Kaisha Toshiba | Light emitting device for transmission of communications information |
CN102682491A (en) * | 2012-05-11 | 2012-09-19 | 深圳市天孚实业有限公司 | Basketball game count down device fusing singlechip and LED (light-emitting diode) display technology |
CN102682491B (en) * | 2012-05-11 | 2016-05-25 | 深圳市天孚实业有限公司 | A kind of Basketball Match inverse timing device that merges single-chip microcomputer and LED Display Technique |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CE01 | Termination of patent right |