CN2244738Y - D-A Converter for switch output of programmable controller - Google Patents
D-A Converter for switch output of programmable controller Download PDFInfo
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- CN2244738Y CN2244738Y CN 95224406 CN95224406U CN2244738Y CN 2244738 Y CN2244738 Y CN 2244738Y CN 95224406 CN95224406 CN 95224406 CN 95224406 U CN95224406 U CN 95224406U CN 2244738 Y CN2244738 Y CN 2244738Y
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- 238000002955 isolation Methods 0.000 description 1
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Abstract
The utility model discloses a D/A converter for a switching outlet of a programmable controller, which comprises two interface circuits; one end of one interface circuit is connected with a frequency signal I, and the other end is connected with a comparator; one end of the other interface circuit is connected with a pulse width signal II, and the other end is connected with a low-pass filter. A first analog voltage can be output by a low-pass filter after the frequency signal I passes through the comparator and a monostable oscillator; a second analog voltage is output by the other low-pass filter, and the two D/A converting processes can be completed. The cost of the utility model is low; the cost of hardware thereof is at least one order of magnitude lower than the price of the existing D/A module; each D/A signal occupies only one on-off outlet. The utility model has the advantages that the structure is simple, the performance is reliable, the assembly is free from the limitation of space, and the utility model has a universal property for many PC systems.
Description
The utility model relates to a kind of D/A that utilizes regular tap amount output port to finish the programable controller system digital-to-analogue conversion.
In the background technology field, Programmable Logic Controller (PC or PLC) obtains to use widely because of its reliability is high, not only is used in a large number substitute traditional relay system, and is used to the occasion of closed-loop control more and more.In comprising the closed-loop control system of Programmable Logic Controller, need the digital control amount of PC inside is converted into the output of simulation controlled quentity controlled variable, this is finished by the D/A in the programable controller system (D/A) module usually.The D/A module price of existing each Programmable Logic Controller series is higher, is unfavorable for applying of system; Secondly, because the physical dimension of existing D/A module is fixed, also there are some requirements of determining in the mode of its installation, orientation, and this often brings difficulty and inconvenience in the occasion that the restriction of having living space particularly undergoes technological transformation in original cabinet; In addition, the D/A module of existing each Programmable Logic Controller series usually also can not be general.
The purpose of this utility model is: provide a kind of regular tap amount output port of Programmable Logic Controller that directly utilizes to finish the D/A converter that 1~2 way type matrix is intended translation function, remedy the problem that exists in the background technology.
The technical solution adopted in the utility model is: earlier by PC software will be to be exported digital control amount be converted into the pulsed quantity with corresponding frequencies or the pulsewidth amount of corresponding dutycycle, and they are transported to D/A of the present utility model by the regular tap amount output port of PC.Frequency signal I is connected with frequency signal I by an end, and the interface circuit of another termination comparer, signal are through comparer, monostable oscillator, low-pass filter, by low-pass filter output first via aanalogvoltage V (I).Pulse width signal II is connected with pulse width signal II by an end, and another interface circuit of another another low-pass filter of termination is exported the second road aanalogvoltage V (II) through low-pass filter.Obtain at last and the proportional analog output voltage of digital control amount, finish the process of digital-to-analog conversion.Stabilized voltage supply is received interface circuit respectively, comparer, and monostable oscillator is on the low-pass filter.
The utility model is compared the useful effect that is had with background technology:
1. with low cost, its hardware cost than the low order of magnitude of existing D/A module price, helps improving cost performance at least, promotes the further popularization of Programmable Logic Controller in closed-loop control system;
2. simple in structure, dependable performance;
3.D/A signal need not pass through the PC data bus, every road signal only accounts for a PC switching value output port, at most only needs two lines, so easy to connect, assembling is not vulnerable to the restriction in space;
4. many PC system had versatility.
Below in conjunction with accompanying drawing,, provide details of the present utility model by description to embodiment.
Fig. 1, structured flowchart of the present utility model;
Fig. 2, electrical block diagram of the present utility model.
As shown in Figure 1, functional software 1 by Programmable Logic Controller A, the digital quantity of preparing output is converted into the frequency of proportional relation (pulse square wave) amount or pulsewidth (PWM) amount with it, and frequency signal I and pulse width signal II can be exported to the D/A converter B of PC outside by switching value output port 2.To with the proportional frequency signal I of PC digital quantity, produce an alternating signal with the break-make same frequency of PC output transistor through interface circuit 3, this signal becomes the burst pulse of fast rise/decline by comparer 5, go to trigger monostable oscillator 6 and the output pulse sequence of generation Fixed width degree tentering degree, this pulse train just obtains and the proportional first via simulating signal of digital quantity V (I) again through low-pass filter 7 smothing filterings.To pulse width signal II, because of the output circuit of PC has uncertain " on-state voltage drop ", interface circuit 4 carries out fixed ampllitude to the high level of pulse width signal II on the one hand, on the other hand low level being handled makes it be approximately zero, thereby make the output of interface circuit 4 can directly deliver to low-pass filter 8 filtering, obtain the second tunnel simulating signal V (II).Stabilized voltage supply 9 is received interface circuit 3,4 respectively, comparer 5, and monostable oscillator 6 on the low- pass filter 7,8, provides stable operating voltage and reference voltage.
Fig. 2 is an electrical block diagram of the present utility model, FX2917 among the figure (LM2917) is the integrated circuit (IC) chip that is used for the frequency/voltage conversion, it not only includes comparer, amplify the low-pass filter of holding concurrently, also have a frequency multiplication formula precision and discharge and recharge usefulness " pump circuit " as monostable oscillator, the source of stable pressure of an about 7.5V.Be the output digital quantity UI of example: PC is converted to corresponding frequencies by PC functional software PLSY pulse square wave signal with FX2 type Programmable Logic Controller among the figure, export interface circuit 3 to through transistor T 1, interface circuit 3 is by resistance R 1, capacitor C 1 is formed, after linking to each other, the two receives switching value output terminal corresponding to transistor T 1, the R1 other end links to each other with external power supply VCC, the other end of C1 is connected to 1 pin of the integrated circuit (IC) chip FX2917 (I) that is used for the frequency/voltage conversion, C2 one end links to each other with 2 pin of FX2917 (I) in the remaining circuit, the other end and the common port and the ground connection that are connected to the output of PC switching value after 11 pin of FX2917 (I) link to each other, R2, R3, C3 is with 3 pin that meet FX2917 (I), R2, the other end ground connection of C3, the other end of R3 and R4, C4 links to each other, the other end of R4 and 4 pin of receiving FX2917 (I) after C5 links to each other, the other end ground connection of C5, the other end of C4 is connected 5 pin that are connected to FX2917 (I) again with R5,10 pin are also exported first via aanalogvoltage V (I) thus, the other end ground connection of R5, R6 one end links to each other with 9 pin of FX2917 (I), the other end of R6 be connected to external power supply VCC, the 12 pin ground connection of FX2917 (I) after 8 pin of FX2917 (I) link to each other.To first via signal, by resistance R 1, a point current potential T1 by the time and external power supply VCC approaching, when the T1 conducting, reduce to " on-state voltage drop " value (0~1.5V) of T1.The alternation composition of signal that T1 produces is introduced in the positive input of comparer among the FX2917 (I) through the effect of capacitor C 1, and then in each link of internal circuit, finish the process of frequency/voltage conversion, and obtain aanalogvoltage V (I) from the output terminal of active low-pass filter 7.C2 is external " pump electric capacity " (belonging to element in Fig. 1 square frame 6), R2, C3 finish the conversion that the oscillator timing pip outputs current to the wave filter input voltage, R3, R4, C4, C5 are low-pass filter outward element (square frame 7 among Fig. 1), R5 is an output resistance, and R6 makes the influence of mu balanced circuit relative isolation with external power supply VCC reducing load.
As shown in Figure 2, digital quantity UII is converted to corresponding pulse width signal by PC functional software PWM, export interface circuit 4 to through transistor T 2, interface circuit 4 is by resistance R 8, R9, R10 and bidirectional analog electronic switch CC4066 form, R8 one end and 9 pin that meet FX2917 (II) after R7 links to each other, the other end of R8 then with 1 pin that is connected to CC4066 after R9 links to each other, the other end of R7 be connected to external power supply VCC after 8 pin of FX2917 (II) link to each other, the other end of R9 and 13 pin that are connected to CC4066 after R10 links to each other and corresponding to the PC switching value output terminal of transistor T 2, the other end of R10 links to each other and ground connection with PC switching value output common port, R11 end and R12, C7 connects, the other end of R11 is connected to 2 pin of CC4066, the other end of R12 links to each other with C6 and is connected to 4 pin of FX2917 (II), the other end ground connection of C6, behind another termination R13 of C7 with 5 pin of FX2917 (II), 10 pin link to each other, and export the second the tunnel thus and simulate voltage V (II), the other end ground connection of R13, the 12 pin ground connection of FX2917 (II).2 pin adjunction R14, C8 and the ground connection of CC4066 in case of necessity.R11, R12, C6, C7 are the low-pass filter outward elements of square frame 8 in the corresponding diagram 1 in the foregoing circuit, and R7, R13 effect are identical with R6, R5 respectively.When carry out the PWM function command in program, FX2 type PC is at assigned switch amount mouth T2 output pulse width modulation signal.Because the uncertainty of " on-state voltage drop " that hardware causes, the current potential that d is ordered during the T2 conducting is generally non-vanishing.Interface circuit 4 is to obtain high level to stablize to the purpose of this road signal Processing, low level is zero pwm signal, effect by stabilized voltage supply 9 pin among the FX2917 (II), b point current potential is stabilized in about 7.5V, when T2 ends, in the dividing potential drop branch road that R8, R9, R10 form, c point current potential has a suitable stationary value, has solved the stable problem of high level; D point current potential is adjusted into the CMOS level, and utilize a road among the CMOS bidirectional analog switch CC4066 (CD4066/C544) to make single-pole single-throw switch (SPST), pwm signal is directly caused active low-pass filter 8 input ends among the FX2917 (II), break-make by d point control of Electric potentials analog switch, like this when the T2 conducting, analog switch disconnects, active low-pass filter is input as zero level, the second road aanalogvoltage V (II) that obtains behind smothing filtering, its " zero " level can be corresponding with " zero " value of digital quantity " zero " and pwm pulse width.
This shows that do as a wholely, the utility model by two switching value output ports of PC, can be finished two-way digital-to-analog conversion process under PC software cooperates.Where necessary, the utility model also can be made the signal of single channel output or processing two-way same nature (pulse square wave or pulsewidth).
Claims (2)
1. Programmable Logic Controller switch delivery outlet D/A, it is characterized in that: comprise that an end is connected with frequency signal I, the interface circuit [3] of another termination comparer [5], signal is through comparer [5], monostable oscillator [6], low-pass filter [7], by low-pass filter [7] output first via aanalogvoltage V (I); One end is connected with pulse width signal II, another interface circuit [4] of another termination low-pass filter [8], through low-pass filter [8] output the second road aanalogvoltage V (II), stabilized voltage supply [9] is received interface circuit [3], [4] respectively, comparer [5], monostable oscillator [6] is on low-pass filter [7], [8]
2. Programmable Logic Controller switch delivery outlet D/A according to claim 1, it is characterized in that: interface circuit [3] is by resistance R 1, capacitor C 1 is formed, after linking to each other, the two receives the switching value output terminal of Programmable Logic Controller (PC), the R1 other end links to each other with external power supply VCC, the other end of C1 is connected to 1 pin of the integrated circuit (IC) chip FX2917 (I) that is used for the frequency/voltage conversion, C2 one end links to each other with 2 pin of FX2917 (I) in the remaining circuit, the other end and the common port and the ground connection that are connected to the output of PC switching value after 11 pin of FX2917 (I) link to each other, R2, R3, C3 is with 3 pin that meet FX2917 (I), R2, the other end ground connection of C3, the other end of R3 and R4, C4 links to each other, the other end of R4 and 4 pin of receiving FX2917 (I) after C5 links to each other, the other end ground connection of C5, the other end of C4 is connected 5 pin that are connected to FX2917 (I) again with R5,10 pin are also exported first via aanalogvoltage V (I) thus, the other end ground connection of R5, R6 one end links to each other with 9 pin of FX2917 (I), the other end of R6 be connected to external power supply VCC, the 12 pin ground connection of FX2917 (I) after 8 pin of FX2917 (I) link to each other; Interface circuit [4] is by resistance R 8, R9, R10 and bidirectional analog electronic switch CC4066 form, R8 one end and 9 pin that meet FX2917 (II) after R7 links to each other, the other end of R8 then with 1 pin that is connected to CC4066 after R9 links to each other, the other end of R7 be connected to external power supply VCC after 8 pin of FX2917 (II) link to each other, the other end of R9 be connected to 13 pin of CC4066 and the switching value output terminal of PC after R10 links to each other, the other end of R10 links to each other and ground connection with PC switching value output common port, R11 one end and R12, C7 connects, the other end of R11 is connected to 2 pin of CC4066, the other end of R12 links to each other with C6 and is connected to 4 pin of FX2917 (II), the other end ground connection of C6, behind another termination R13 of C7 with 5 pin of FX2917 (II), 10 pin link to each other, and export the second the tunnel thus and simulate voltage V (II), the other end ground connection of R13, the 12 pin ground connection of FX2917 (II).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN 95224406 CN2244738Y (en) | 1995-10-13 | 1995-10-13 | D-A Converter for switch output of programmable controller |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN 95224406 CN2244738Y (en) | 1995-10-13 | 1995-10-13 | D-A Converter for switch output of programmable controller |
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CN2244738Y true CN2244738Y (en) | 1997-01-08 |
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CN 95224406 Expired - Fee Related CN2244738Y (en) | 1995-10-13 | 1995-10-13 | D-A Converter for switch output of programmable controller |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100459434C (en) * | 2002-05-13 | 2009-02-04 | 奥地利微系统股份公司 | Digital-to-analog converter with integrated test circuit |
CN101242186B (en) * | 2008-03-18 | 2010-10-06 | 苏州纳米技术与纳米仿生研究所 | A programmable non linear digital/analog converter |
CN1676390B (en) * | 2004-09-01 | 2010-10-13 | 兰州大成科技股份有限公司 | Control-supervise-monitor integrated railway signal foundation equipment electronic control device |
-
1995
- 1995-10-13 CN CN 95224406 patent/CN2244738Y/en not_active Expired - Fee Related
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100459434C (en) * | 2002-05-13 | 2009-02-04 | 奥地利微系统股份公司 | Digital-to-analog converter with integrated test circuit |
CN1676390B (en) * | 2004-09-01 | 2010-10-13 | 兰州大成科技股份有限公司 | Control-supervise-monitor integrated railway signal foundation equipment electronic control device |
CN101242186B (en) * | 2008-03-18 | 2010-10-06 | 苏州纳米技术与纳米仿生研究所 | A programmable non linear digital/analog converter |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C19 | Lapse of patent right due to non-payment of the annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |