Background technology
Digital Electronic Technique and computer technology have been penetrated into every field, for example communication, network, control system, detection system etc.But interface input signal (as temperature, displacement) and output signal (as voltage, picture signal) analog quantity, so A/D often and D/A are essential.
Digital signal is converted to analog signal digital-to-analogue conversion (D/A), and corresponding circuit is called for short DAC D/A converter.The size that it exports aanalogvoltage V is directly proportional with input digit amount size:
In the formula, n is a number of bits, and D is a binary numeral, and k is a proportionality coefficient.
The weights of its lowest order (LSB) are 2
0, the weights of highest order (MSB) are 2
N-1, the pairing value of maximum number amount also is full scale value (FSR).Its resolution is represented the resolution capability of DAC to analog quantity, it be least significant bit (LSB) the value of corresponding analog quantity.Because the analogue value of full scale value representative is variable in different application, so resolution represents with the binary figure place of DAC usually, as 8,10,12, also is expressed as sometimes:
As seen, the quantification manner of DAC is the integral multiple that sampling voltage is converted into least unit, is a kind of uniform quantization mode.Its transformation result is referring to shown in the accompanying drawing 1.
Obtain evenly spaced b0-b7, corresponding evenly spaced a0-a7 on Y1, a0-a7 can represent with 3 binary data.But referring to accompanying drawing 2, when needs are realized non-linear conversion output, for Y2, b0-b7 uniformly, corresponding uneven a0-a7.Uneven a0-a7 can not represent with 3 binary data again, must greater than 3 smaller or equal to 7, concrete numerical value is by little common divisor of a0-a7 or precision decision.In like manner, if expect evenly spaced b0-b255, the Y1 correspondence evenly spaced a0-a255, can adopt 8 linear DAC to realize Y1; On the contrary, the Y2 correspondence uneven a0-a255, and it need adopt greater than 8 linear DAC smaller or equal to 256 and realize.But, implement just very difficult greater than 20 resolution for linear DAC.
Along with the development of technology, growing field needs non-linear high-resolution D/A, as: OLED, spatial light modulator etc.Therefore, solve high-resolution non-linear DAC problem and become more and more important.
Summary of the invention
The object of the invention provides a kind of programmable non linear digital/analog converter, under the situation of given input and output non-linear relation, realizes the non-linear digital-to-analogue conversion of arbitrary resolution; And, realize conversion to different resolution and different input and output nonlinear curve by the software preliminary treatment.
For achieving the above object, the technical solution used in the present invention is: a kind of programmable non linear digital/analog converter, be made of software pretreatment module and programmable circuit, described programmable circuit comprises programmable counter circuit, integrating circuit, sampling hold circuit and compensating circuit; Described software pretreatment module is controlled integrating circuit by programmable counter through pulsewidth according to the required time count value of non-linear relation output programmable counter, realizes required analog quantity output.
In the technique scheme, the process of fitting treatment of described software pretreatment module comprises, given curve functional relation H (X) determines output valve y according to gray value m and functional relation H (X)
nPairing input value x
n, its pass is: x
n=H
-1(y
n) |
0≤n≤m-1Programmable counter precision j changes to maximum j from 1
Max, in each process, according to x
nThe unit value of precision j decision integrating circuit of the maximum amplitude of oscillation (be between maximum and the minimum value poor) sum counter
Value (j) is carried out significant digits to be accepted or rejected | value (j) |, with | value (j) | be unit, reconstruct input value and output valve are
Fix for round and
, the error of calculation | y '
N, j-y
N, j|, find out the precision j of minimum value correspondence and the required count signal of output counter
This signal is exported with binary form.
During as given curve functional relation not, at first find out the several characteristic value on the curve,, simulate the functional relation of curve according to the curve fit formula
Adopt said method to find out the precision j of minimal error correspondence again, and export corresponding count signal.
Software is pretreated result leave among the RAM, uses in order to programmable circuit, and the number of storage is by gray scale m decision, and storage bit number is by the figure place decision of counter.
In the programmable circuit part, programmable counter is adjusted the figure place of clock cycle sum counter automatically according to the pretreated result of software.Counter generates a pulse-width signal according to the gate time temp of software preprocessing part output, and this signal is as the integrated signal of integrating circuit.Integrating circuit generates the x after the match
nAll intrinsic errors that exist before compensating circuit can be offset.At last according to x
nWith y
nFunctional relation, generate required y
nValue.
Because the technique scheme utilization, the present invention compared with prior art has following advantage:
The present invention is a kind of programmable non linear DAC, and its main advantage is: under the situation of given input and output non-linear relation, realize the non-linear DAC of arbitrary resolution; Simple in structure, speed is fast, highly versatile; Different resolution and different input and output nonlinear curves can use same DAC to realize by the software preliminary treatment.
Embodiment
Below in conjunction with drawings and Examples the present invention is further described:
Embodiment one: shown in accompanying drawing 3, a kind of programmable non linear digital/analog converter (DAC) comprises 2 parts, software pretreatment module and programmable circuit.The software pretreatment module by software processes, is exported in the programmable circuit gate time signal that programmable counter is required according to given non-linear relation and working index.Programmable circuit partly comprises programmable counter circuit, integrating circuit, sampling hold circuit and compensating circuit.The main process of software pretreatment module is as shown in Figure 3:
1, when given curve functional relation H (X), determines output valve y according to gray value m and functional relation H (X)
nPairing input value x
n, its pass is: x
n=H
-1(y
n) |
0≤n≤m-1Programmable counter precision j changes to maximum j from 1
Max, in each process, according to x
nThe unit value of precision j decision integrating circuit of the maximum amplitude of oscillation (be between maximum and the minimum value poor) sum counter
Value (j) is carried out significant digits to be accepted or rejected | value (j) |, with | value (j) | be unit, reconstruct input value and output valve are
Fix for round and
, calculate | y '
N, j-y
N, j|, find out the precision j of minimum value correspondence and the required count signal of output counter
This signal is exported with binary form.
2, when given curve functional relation H (X) not, at first find out the several characteristic value on the curve.According to the curve fit formula, simulate the functional relation of curve
The remaining
same step 1 of process.
Software is pretreated result leave among the RAM, uses in order to programmable circuit.
In the programmable circuit part, programmable counter is adjusted the figure place of clock cycle sum counter automatically according to the pretreated result of software.Counter generates a pulse-width signal according to the rolling counters forward signal temp of software preliminary treatment output, and this signal is as the integrated signal of integrating circuit.Integrating circuit generates the x after the match
nAll intrinsic errors that exist before compensating circuit can be offset.At last according to x
nWith y
nFunctional relation, generate required y
nValue.
Embodiment two: the application of programmable non linear digital/analog converter in the drive circuit of spatial light modulator.
The feature of spatial light modulator is: nonlinear reflection spectral line, ultrafast response device speed, lower power consumption and less area.At a high speed, letter is little, high-resolution, and the output voltage of full swing is the prerequisite key property of spatial light modulator drive circuit.But realize above-mentioned key property, in the development process of drive circuit, there are 3 big bottlenecks, that is, 1. in the development process of the nonlinear dependence of driving voltage and Multiple Quantum Well spatial light modulator, there are 3 big bottlenecks, promptly, 1. the non-linear relation of driving voltage and Multiple Quantum Well spatial light modulator, the 2. gap of the speed of the response speed of spatial light modulator picosecond and cmos circuit nanosecond, the 3. area constraints of spatial light modulator pixel unit tens square microns.
Present embodiment has successfully solved the problems referred to above by using programmable non linear digital/analog converter of the present invention, and the drive circuit of spatial light modulator can be realized the resolution of 256 grades of gray scales, the speed of 1K frame/second.
The specific design scheme is as follows:
Accompanying drawing 4 is a typical reflectivity curve of spatial light modulator.Spatial light modulator is a driven device, and different voltage produces different reflectivity.We wish to obtain uniform 256 reflectivity.Find out from the curve of figure three, uniform 256 reflectivity correspondences be uneven 256 voltages.The drive circuit of spatial light modulator just provides 256 required magnitudes of voltage of modulator.The circuit structure of drive circuit contains aforesaid software pretreatment module as shown in Figure 5 in the control circuit wherein.
The software preprocessing part uses the matlab language to programme, and its input value has: the characteristic value (v of modulator reflectivity curve
1, r
1), (v
2, r
2) ... (v
n, r
n), gray value gray, functional relation H (the x)=Ax+B of compensating circuit, the maximal accuracy of counter, i.e. figure place precision.At first, according to the fitting formula y1=interp1 (x, y, x1, ' mode ') of curve the reflectivity curve of modulator is carried out match.Wherein, the r vector of x character pair vector, the v vector of y character pair vector, mode are the match mode, can take quadratic fit, cubic fit or the like.The x1 vector is 256 required uniform reflectivity r ' vectors, and y1 vector is the driving voltage v ' vector of the even reflectivity correspondence that goes out by The Fitting Calculation.This driving voltage is exactly the output result of drive circuit.
When design of drive circuit, need be according to the output result, i.e. driving voltage value, the counter input value of releasing drive circuit, and input value delivered to integrating circuit.Push away in the process counter, at first the output of releasing integrating circuit according to the functional relation H (x) of voltage compensating circuit=Ax+B as a result Vint=(v '-B)/A; Functional relation U=(I*t)/C according to integrating circuit calculates the t=time of integration (Vint*C)/I then.Wherein I is a constant-current source, and C is an integrating capacitor, and t is the time of integration.I and C are constants, and t is a variable.According to 256 integral voltages, calculate each voltage required time of integration.
Be to be controlled by the pulse signal of different pulse durations the time of integration, and this pulse signal is produced by counter, and the number of rolling counters forward is provided by the software preprocessing part, and the clock of counter has determined the least unit of integrating circuit integral voltage.
Fig. 5 is the structural representation of the spatial light modulator array drive circuit of this thought of application design.Wherein, the circuit structure of each unit pixel as shown in Figure 6.Owing to adopted non-linear DA thought of the present invention, the non-linear drive characteristic of spatial light modulator can obtain handling at the software preprocessing part.Only comprise integrating circuit and a simple voltage compensating circuit in the unit pixel.Elemental area meets the index request of modulator driver circuit fully in 60um * 60um.And the gray scale that realizes is 256 grades of gray scales.
Fig. 7 is the hardware circuit block diagram.
Fig. 8 is a simulation result of utilization present embodiment, the non-linear DAC of 256 class resolution ratios and the comparison of primitive curve; From simulation result as can be seen, function of the present invention is correct.