CN220983384U - Power supply voltage detection device and chip tester - Google Patents
Power supply voltage detection device and chip tester Download PDFInfo
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- CN220983384U CN220983384U CN202322611053.4U CN202322611053U CN220983384U CN 220983384 U CN220983384 U CN 220983384U CN 202322611053 U CN202322611053 U CN 202322611053U CN 220983384 U CN220983384 U CN 220983384U
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Abstract
The application relates to a power supply voltage detection device and a chip testing machine, wherein the power supply voltage detection device comprises: the multiplexing module is connected with the power supply and used for switching the voltages at two ends of different power supplies to output; the amplifying circuit is connected with the multiplexing module, amplifies the voltage output by the multiplexing module and outputs an amplified voltage signal; and the differential circuit is connected with the amplifying circuit, and is used for carrying out differential conversion on the amplified voltage signal and outputting a single-path detection signal. The multiplexing module is used for switching and collecting multiple power supplies with different voltages, multiple collecting circuits do not need to be designed, the cost of devices is reduced, and occupied space is reduced.
Description
Technical Field
The application relates to the technical field of semiconductor testers, in particular to a power supply voltage detection device and a chip tester.
Background
In the chip production process, a tester is required to test the chip. The tester is powered by using a plurality of different isolated power supplies, and whether the output voltage of each isolated power supply is stable or not directly influences the work of the tester. Therefore, the output voltage of the isolated power supply needs to be monitored.
The traditional power supply voltage detection device is characterized in that a multipath resistor voltage division sampling circuit is designed to respectively process and sample the output voltage of each isolated power supply, so that the device is more and the occupied space is large.
Disclosure of utility model
In view of the foregoing, it is desirable to provide a power supply voltage detection device and a chip tester that can reduce the space occupied.
A power supply voltage detection apparatus comprising:
the multiplexing module is connected with the power supply and used for switching the voltages at two ends of different power supplies to output;
The amplifying circuit is connected with the multiplexing module, amplifies the voltage output by the multiplexing module and outputs an amplified voltage signal;
And the differential circuit is connected with the amplifying circuit, and is used for carrying out differential conversion on the amplified voltage signal and outputting a single-path detection signal.
In one embodiment, the multiplexing module comprises a first multiplexer, each pair of selection terminals of the first multiplexer being for connection to a corresponding power supply, a pair of common terminals of the first multiplexer being connected to the amplifying circuit.
In one embodiment, the multiplexing module further comprises a second multiplexer, a third multiplexer, and an attenuation circuit, each pair of select terminals of the third multiplexer being connected to a corresponding power supply; a pair of common terminals of the third multiplexer are connected with a pair of common terminals of the second multiplexer, and each pair of selection terminals of the second multiplexer is connected with a pair of selection terminals of the first multiplexer through the attenuation circuit, respectively.
In one embodiment, the attenuation circuit comprises a pass-through element and more than two attenuators, and the voltage attenuation multiples of each attenuator are different from each other; each pair of select terminals of the second multiplexer is connected to a pair of select terminals of the first multiplexer through a corresponding pass through element/attenuator, respectively.
In one embodiment, the number of the third multiplexers is more than two.
In one embodiment, the amplifying circuit includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, an amplifier U1A and an amplifier U1B, where the resistor R1 is connected to the common terminal of the first multiplexer in parallel, and a first end of the resistor R1 is connected to a first input end of the amplifier U1A, a second end of the resistor R1 is connected to a second input end of the amplifier U1B, a first end of the resistor R2 is connected to a first end of the resistor R1, and a second end of the resistor R2 is grounded; the first end of the resistor R3 is connected with the second input end of the amplifier U1A, and the second end of the resistor R3 is connected with the first input end of the amplifier U1B; the output end of the amplifier U1A is connected with the differential circuit, and the output end of the amplifier U1B is connected with the differential circuit; the first end of the resistor R4 is connected with the first end of the resistor R3, the second end of the resistor R4 is connected with the output end of the amplifier U1A, the first end of the resistor R5 is connected with the second end of the resistor R3, and the second end of the resistor R5 is connected with the output end of the amplifier U1B.
In one embodiment, the differential circuit includes a resistor R6, a resistor R7, and an amplifier U2A, where a first end of the resistor R6 is connected to the output end of the amplifier U1A, a second end of the resistor R6 is connected to the first input end of the amplifier U2A, a first end of the resistor R7 is connected to the output end of the amplifier U1B, and a second end of the resistor R7 is connected to the second input end of the amplifier U2A.
In one embodiment, the power supply voltage detection device further includes a processor connected to the differential circuit, and the processor calculates the power supply voltage according to the single-path detection signal.
In one embodiment, the processor is an FPGA.
A chip tester comprises a power supply and the power supply voltage detection device.
The power supply voltage detection device comprises a multiplexing module, an amplifying circuit, a differential circuit and a single-path detection signal, wherein the multiplexing module in the power supply voltage detection device switches voltages at two ends of different power supplies to output, the amplifying circuit amplifies the voltage output by the multiplexing module to output amplified voltage signals, and the differential circuit performs differential conversion on the amplified voltage signals to output the single-path detection signals. The multiplexing module is used for switching and collecting multiple power supplies with different voltages, multiple collecting circuits do not need to be designed, the cost of devices is reduced, and occupied space is reduced.
Drawings
FIG. 1 is a block diagram of a power supply voltage detection apparatus in one embodiment;
FIG. 2 is a schematic diagram of a power supply voltage detection device according to an embodiment;
Fig. 3 is a schematic structural diagram of a power supply voltage detection device in another embodiment.
Detailed Description
The present application will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present application more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
It is to be understood that in the following embodiments, "connected" is understood to mean "electrically connected", "communicatively connected", etc., if the connected circuits, modules, units, etc., have electrical or data transfer between them.
As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," and the like, specify the presence of stated features, integers, operations, elements, components, or groups thereof, but do not preclude the presence or addition of one or more other features, integers, operations, elements, components, or groups thereof. Also, the term "and/or" as used in this specification includes any and all combinations of the associated listed items.
In one embodiment, as shown in fig. 1, a power supply voltage detection apparatus is provided, which includes a multiplexing module 100, an amplifying circuit 110, and a differential circuit 120, where the multiplexing module 100 is connected to a power supply, the amplifying circuit 110 is connected to the multiplexing module 100, and the differential circuit 120 is connected to the amplifying circuit 110. The multiplexing module 100 switches the voltages at two ends of different power supplies to output; the amplifying circuit 110 amplifies the voltage output from the multiplexing module 100 and outputs an amplified voltage signal; the differential circuit 120 performs differential conversion on the amplified voltage signal, and outputs a single detection signal.
The number of the power supplies may be two or more, the multiplexing module 100 is connected to two ends of each power supply, and selects voltage output of two ends of different power supplies through channel switching, and the output voltage is amplified by the amplifying circuit 110 and then subjected to differential conversion by the differential circuit 120 to output a single-path detection signal for detecting the power supply voltage. The power supply voltage can be directly collected by monitoring different isolation power supplies in multiple paths through round inspection, one end of the isolation power supply is not required to be grounded, the characteristics of the isolation power supply are kept, and common-mode interference can be reduced.
Further, the differential circuit 120 may further attenuate and differentially convert the amplified voltage signal to generate a single-path detection signal. By adjusting the amplification and attenuation proportion combination of the amplification circuit 110 and the differential circuit 120, the voltage acquisition device is suitable for the isolated power acquisition of different voltages, and the voltage acquisition range is wider.
In the power supply voltage detection device, the multiplexing module 100 is used for switching and collecting multiple power supplies with different voltages, a multiple collection circuit is not required to be designed, the cost of devices is reduced, and the occupied space is reduced.
In one embodiment, as shown in fig. 2, the multiplexing module 100 includes a first multiplexer A1, each pair of selection terminals of the first multiplexer A1 is used to connect to a corresponding power supply, and a pair of common terminals of the first multiplexer A1 is connected to the amplifying circuit 110. The power supplies comprise a power supply 1, a power supply 2, a power supply 3 and the like. The first multiplexer A1 may specifically include a plurality of pairs of selection terminals and a pair of common terminals, for example, the terminal A0 and the terminal B0 are a pair of selection terminals, the terminal A1 and the terminal B1 are a pair of selection terminals, …, and the terminal AX and the terminal BX are a pair of selection terminals. Each pair of selection terminals of the first multiplexer A1 is used to connect two ends of a corresponding power supply, for example, the terminal A0 and the terminal B0 are respectively connected to two ends of the power supply 1. Each pair of selection terminals of the first multiplexer A1 is connected with the common terminal of the first multiplexer A1 through a corresponding group of internal change-over switches, and when the group of change-over switches in the first multiplexer A1 are controlled to be conducted, voltages at two ends of a corresponding power supply can be connected into the first multiplexer A1 from the selection terminals and then output from the common terminal. By alternately switching on the switches of different groups in the first multiplexer A1, the switching output of the voltages at two ends of different power supplies can be realized. In addition, the first multiplexer A1 may be connected to a processor, and the processor may control on/off of a switch in the first multiplexer A1.
It will be appreciated that the specific structures of the amplifying circuit 110 and the differential circuit 120 are not unique, and in one embodiment, as shown in fig. 2, the amplifying circuit 110 includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, an amplifier U1A and an amplifier U1B, the resistor R1 is connected to the common terminal of the first multiplexer A1 in parallel, and the first end of the resistor R1 is connected to the first input end of the amplifier U1A, the second end of the resistor R1 is connected to the second input end of the amplifier U1B, the first end of the resistor R2 is connected to the first end of the resistor R1, and the second end of the resistor R2 is grounded; the first end of the resistor R3 is connected with the second input end of the amplifier U1A, and the second end of the resistor R3 is connected with the first input end of the amplifier U1B; the output end of the amplifier U1A is connected with the differential circuit 120, and the output end of the amplifier U1B is connected with the differential circuit 120; the first end of the resistor R4 is connected with the first end of the resistor R3, the second end of the resistor R4 is connected with the output end of the amplifier U1A, the first end of the resistor R5 is connected with the second end of the resistor R3, and the second end of the resistor R5 is connected with the output end of the amplifier U1B.
Further, the differential circuit 120 includes a resistor R6, a resistor R7, and an amplifier U2A, where a first end of the resistor R6 is connected to an output end of the amplifier U1A, a second end of the resistor R6 is connected to a first input end of the amplifier U2A, a first end of the resistor R7 is connected to an output end of the amplifier U1B, and a second end of the resistor R7 is connected to a second input end of the amplifier U2A.
In addition, the power supply voltage detection device further includes a processor U3 connected to the differential circuit 120, where the processor U3 calculates a power supply voltage according to the single-path detection signal. The type of the processor U3 is not limited, and may be an FPGA (Field-Programmable GATE ARRAY, i.e., field Programmable gate array), a CPU (Central Processing Unit ), or the like. The processor U3 is specifically connected to the output end of the amplifier U2A, and receives the single-path detection signal to calculate the power supply voltage. In this embodiment, the processor U3 is an FPGA, and uses the XADC IP core of the FPGA to collect signals, and converts the signals into actual voltages through a conversion formula. By using 2-stage op-amp isolation power supplies in the amplifying circuit 110 and the differential circuit 120, power supply anomalies can be avoided from burning out the FPGA.
Further, as shown in fig. 3, the multiplexing module 100 further includes a second multiplexer A2, a third multiplexer A3, and an attenuation circuit 130, where each pair of selection terminals of the third multiplexer A3 is connected to a corresponding power supply; the pair of common terminals of the third multiplexer A3 are connected to the pair of common terminals of the second multiplexer A2, and each pair of selection terminals of the second multiplexer A2 is connected to the pair of selection terminals of the first multiplexer A1 through the attenuation circuit 130, respectively. The second multiplexer A2 and the third multiplexer A3 also include a plurality of pairs of selectivity terminals and a pair of common terminals, and the connection relationship between the terminals and the internal switch is the same as that of the first multiplexer A1, which is not described herein. The second multiplexer A2 and the third multiplexer A3 may be connected to the processor U3, and the processor U3 may perform on/off control of the switch.
In the present embodiment, the number of the third multiplexers A3 is more than two. Each pair of selectivity terminals of each third multiplexer A3 is connected to two ends of a power supply, and a pair of common terminals of each third multiplexer A3 is connected to a pair of common terminals of the second multiplexer A2. The multi-stage switch cascade connection can cover more paths of power supply detection, further reduces the device cost and saves the space.
In one embodiment, with continued reference to fig. 3, the attenuation circuit 130 includes a pass-through element and two or more attenuators, each of which has a different voltage attenuation factor; each pair of select terminals of the second multiplexer A2 is connected to a pair of select terminals of the first multiplexer A1 through a corresponding pass through element/attenuator, respectively. The through element may be a wire, and the attenuator may specifically include an X1 attenuator, an X2 attenuator, an X3 attenuator, and the like. A pair of selection terminals A0 and B0 of the second multiplexer A2 are connected to a pair of selection terminals A0 and B0 of the first multiplexer A1 through pass-through elements; a pair of selection terminals A1 and B1 of the second multiplexer A2 are connected to a pair of selection terminals A1 and B1 of the first multiplexer A1 through an X1 attenuator; a pair of selection terminals A2 and B2 of the second multiplexer A2 are connected to a pair of selection terminals A2 and B2 of the first multiplexer A1 through an X2 attenuator; the pair of selection terminals A3 and B3 of the second multiplexer A2 are connected to the pair of selection terminals A3 and B3 of the first multiplexer A1 through an X3 attenuator, and so on. According to different output voltage ranges of each power supply, the processor U3 controls the change-over switches in the first multiplexer A1 and the second multiplexer A2, so that the voltages at two ends of the power supply are transmitted to the amplifying circuit 110 through the pass-through element or the corresponding attenuator, and the multi-stage multiplexer and the plurality of attenuators are combined, so that high-voltage, medium-voltage and low-voltage detection can be covered, and the detection of the power supply voltage in different voltage ranges is adapted.
In one embodiment, a chip tester is provided, which includes a power supply and the power supply voltage detection device.
According to the chip testing machine, multiple paths of power supplies with different voltages are switched and collected by the multiplexing module, multiple paths of collecting circuits do not need to be designed, the cost of devices is reduced, and occupied space is reduced.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples illustrate only a few embodiments of the utility model, which are described in detail and are not to be construed as limiting the scope of the utility model. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the utility model, which are all within the scope of the utility model. Accordingly, the scope of protection of the present utility model is to be determined by the appended claims.
Claims (10)
1. A power supply voltage detection apparatus, characterized by comprising:
the multiplexing module is connected with the power supply and used for switching the voltages at two ends of different power supplies to output;
The amplifying circuit is connected with the multiplexing module, amplifies the voltage output by the multiplexing module and outputs an amplified voltage signal;
And the differential circuit is connected with the amplifying circuit, and is used for carrying out differential conversion on the amplified voltage signal and outputting a single-path detection signal.
2. The power supply voltage detection apparatus according to claim 1, wherein the multiplexing module includes a first multiplexer, each pair of selection terminals of the first multiplexer being for connection to a corresponding power supply, a pair of common terminals of the first multiplexer being connected to the amplifying circuit.
3. The power supply voltage detection apparatus according to claim 2, wherein the multiplexing module further comprises a second multiplexer, a third multiplexer, and an attenuation circuit, each pair of selection terminals of the third multiplexer being connected to a corresponding power supply; a pair of common terminals of the third multiplexer are connected with a pair of common terminals of the second multiplexer, and each pair of selection terminals of the second multiplexer is connected with a pair of selection terminals of the first multiplexer through the attenuation circuit, respectively.
4. The power supply voltage detection apparatus according to claim 3, wherein the attenuation circuit includes a pass-through element and two or more attenuators, and voltage attenuation multiples of each of the attenuators are different from each other; each pair of select terminals of the second multiplexer is connected to a pair of select terminals of the first multiplexer through a corresponding pass through element/attenuator, respectively.
5. A power supply voltage detection apparatus according to claim 3, wherein the number of the third multiplexers is two or more.
6. The power supply voltage detection apparatus according to any one of claims 2 to 5, wherein the amplifying circuit includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, an amplifier U1A, and an amplifier U1B, the resistor R1 is connected in parallel to a common terminal of the first multiplexer, a first end of the resistor R1 is connected to a first input end of the amplifier U1A, a second end of the resistor R1 is connected to a second input end of the amplifier U1B, a first end of the resistor R2 is connected to a first end of the resistor R1, and a second end of the resistor R2 is grounded; the first end of the resistor R3 is connected with the second input end of the amplifier U1A, and the second end of the resistor R3 is connected with the first input end of the amplifier U1B; the output end of the amplifier U1A is connected with the differential circuit, and the output end of the amplifier U1B is connected with the differential circuit; the first end of the resistor R4 is connected with the first end of the resistor R3, the second end of the resistor R4 is connected with the output end of the amplifier U1A, the first end of the resistor R5 is connected with the second end of the resistor R3, and the second end of the resistor R5 is connected with the output end of the amplifier U1B.
7. The power supply voltage detection apparatus according to claim 6, wherein the differential circuit includes a resistor R6, a resistor R7, and an amplifier U2A, a first end of the resistor R6 is connected to the output terminal of the amplifier U1A, a second end of the resistor R6 is connected to the first input terminal of the amplifier U2A, a first end of the resistor R7 is connected to the output terminal of the amplifier U1B, and a second end of the resistor R7 is connected to the second input terminal of the amplifier U2A.
8. The power supply voltage detection apparatus according to claim 1, further comprising a processor connected to the differential circuit, the processor calculating a power supply voltage from the single-pass detection signal.
9. The power supply voltage detection apparatus according to claim 8, wherein the processor is an FPGA.
10. A chip tester comprising a power supply and a power supply voltage detection apparatus as claimed in any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322611053.4U CN220983384U (en) | 2023-09-25 | 2023-09-25 | Power supply voltage detection device and chip tester |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322611053.4U CN220983384U (en) | 2023-09-25 | 2023-09-25 | Power supply voltage detection device and chip tester |
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| Publication Number | Publication Date |
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| CN220983384U true CN220983384U (en) | 2024-05-17 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202322611053.4U Active CN220983384U (en) | 2023-09-25 | 2023-09-25 | Power supply voltage detection device and chip tester |
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| CN (1) | CN220983384U (en) |
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- 2023-09-25 CN CN202322611053.4U patent/CN220983384U/en active Active
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