CN220913525U - Remote controller for lane peripheral - Google Patents

Remote controller for lane peripheral Download PDF

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Publication number
CN220913525U
CN220913525U CN202322063796.2U CN202322063796U CN220913525U CN 220913525 U CN220913525 U CN 220913525U CN 202322063796 U CN202322063796 U CN 202322063796U CN 220913525 U CN220913525 U CN 220913525U
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China
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processor
cpu processor
chip
interface
lane
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CN202322063796.2U
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Inventor
易术
鲍强
黄兴中
张毅
巫均
宋涛
张舸
陈文博
黄丹阳
朱中山
李勇
陈犁
陈尚
周晟宇
李元杰
潘峰
张传递
张勃
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Sichuan Intelligent Transportation System Management Co ltd
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Sichuan Intelligent Transportation System Management Co ltd
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Abstract

The utility model discloses a lane peripheral remote controller, which comprises a box body and a back plate arranged in the box body, wherein the back plate is provided with a slot for plugging a main plate and a slot for plugging an expansion plate; the main board comprises a CPU processor, wherein the CPU processor is a Loongson dual-core embedded processor 2K1000LA; the CPU processor is connected with a FLASH memory and a solid state disk; the CPU processor is connected with an RJ45 interface through a network control chip; the CPU processor is also connected with an RJ45 interface through a network control chip and a network exchange chip in sequence; the CPU processor is connected with the SMA interface through the 4G module and the WIFI module; the CPU processor is connected with the wiring terminal through the MOS tube, the optical coupler and the relay in sequence; the CPU processor is connected with the wiring terminal through the comparator and the optical coupler in sequence; the CPU processor is connected with the MCU processor; the CPU processor is connected with a serial communication interface; the MCU processor is connected with the ADC chip and is an STM32F407VGT6 chip.

Description

Remote controller for lane peripheral
Technical Field
The utility model relates to the technical field of intelligent traffic, in particular to a lane peripheral remote controller.
Background
After the expressway provincial boundaries toll station is canceled in the early 2020, the national expressway enters a new stage of 'one-network operation and integrated service', and along with the continuous increase of ETC user quantity and the continuous improvement of the passing experience demands of drivers and passengers, the online operation, intelligentization, precision and humanization of toll data become the mainstream. How to improve the integration level of the system, reduce the maintenance difficulty of the system, and build the charging system by utilizing the intensive concept, and receive more and more great attention from the industry.
At present, the new generation charging system independently finishes charging from the original charging station in an offline state, and adjusts the charging to a data reduction path by utilizing vehicle traffic records, license plate recognition and the like, thereby realizing a semi-online mode combining online charging under special conditions and finishing accurate charging and charging under all conditions. However, the architecture of the conventional charging system for the expressway in Sichuan province has a plurality of problems such as unclear service control boundaries, lane peripherals usually depend on the charging system strongly, equipment abnormality cannot be located rapidly, and the system is overwhelmed, so that single-point problems cause lane sealing treatment. Limited traditional charging system architecture, many advanced outfield devices can not exert the complete performance, and the lane application has low intelligent degree and poor service elasticity. The traditional charging service architecture is overweight, so that the resource consumption is high, the system adjustment influence range is wide if upgrading and reconstruction are carried out, the additional cost investment and the complexity are high, and the quick iteration online is difficult to realize.
After the cloud-side-end architecture mode is changed, the separation of lane charging service and lane control functions is realized, and the realization of a new mode needs to be developed into a new-generation lane controller. The lane controller is positioned beside a lane and bears the functions of lane data acquisition and driving control. The device is downwards abutted to lane side equipment, so that data acquisition and control driving of related equipment are realized; the up-link with the edge server is used as a protocol gateway to realize the package uploading of the collected data and the receiving and analyzing of the downlink instructions.
To achieve effective coordination of the toll collection system station level with the "side-end" of the lane, the lane controller is a key technology, and in the current toll service processing mode, the conventional lane controller is the core of the expressway toll collection system. The traditional lane controllers all adopt IPC industrial personal computers based on an x86 system structure, and drive and data acquisition function interfaces of lane edge equipment are realized by inserting IO cards with different functions into PCI slots of the industrial personal computers. The traditional industrial personal computer has the following pain points:
(2) The requirements of autonomous controllability cannot be met, and the basic software and hardware technologies such as X86, windows and the like cannot be met.
(2) The environmental adaptability is poor, the working temperature of the industrial control computer is mostly 0-55 ℃, and the future trend is that the installation position of the lane controller is moved to the lane station island outside the toll booth. Considering the wide geographical distribution of our country, a wider working temperature (e.g. -40 ℃ -70 ℃) would be a more realistic requirement. It is obvious that common commercial operators have difficulty adapting to this requirement.
(3) The system maintenance is inconvenient, and the traditional industrial personal computer usually adopts PCI/PCIe slot to expand IO, so that the maintainability is poorer in structure.
Disclosure of utility model
The utility model aims to provide a lane peripheral remote controller which solves the problems in the prior art.
In order to achieve the above purpose, the technical scheme adopted by the utility model is as follows:
The lane peripheral remote controller comprises a box body and a back plate arranged in the box body, wherein the back plate is provided with a slot for plugging a main plate and a slot for plugging an expansion plate; the main board comprises a CPU processor, wherein the CPU processor is a Loongson dual-core embedded processor 2K1000LA; the CPU processor is connected with a FLASH memory and a solid state disk; the CPU processor is connected with an RJ45 interface through a network control chip; the CPU processor is also connected with an RJ45 interface through a network control chip and a network exchange chip in sequence; the CPU processor is connected with the SMA interface through the 4G module and the WIFI module; the CPU processor is connected with the wiring terminal through the MOS tube, the optical coupler and the relay in sequence; the CPU processor is connected with the wiring terminal through the comparator and the optical coupler in sequence; the CPU processor is connected with the MCU processor; the CPU processor is connected with a serial communication interface; the MCU processor is connected with the ADC chip and is an STM32F407VGT6 chip.
As a preferable technical scheme, a double redundant power supply is arranged in the box body, and the power supply is supplied to the power utilization element through the backboard; the dual redundant power supply comprises two alternating current-to-direct current conversion power supplies; the AC-DC conversion power supply is connected to the backboard through a diode.
As a preferred technical scheme, the MCU processor is connected with the ADC chip through the network switching chip.
As a preferable technical scheme, a slot on the backboard for plugging the expansion board is reserved with 2 paths of PCIe x1 interfaces, 6 paths of UART interfaces, 2 paths of USB2.0 interfaces and 16 paths of GPIO interfaces.
Compared with the prior art, the method has the following beneficial effects:
In the lane peripheral remote controller, the latest embedded processor 2K1000LA of the domestic Loongson is adopted as the basic hardware support technology of the lane controller of the new generation, and the core component is domestic, so that the lane controller is completely and autonomously controllable in the bottom technology.
In the utility model, the working temperature of the domestic Loongson latest embedded processor 2K1000LA is-40-85 ℃. The temperature range is wide, and the method is suitable for the wide regional environment requirements of China.
In the utility model, the slot reserved on the backboard for plugging the expansion board is provided with a 2-way PCIe x1 interface, a 6-way UART interface, a 2-way USB2.0 interface and a 16-way GPIO interface, compared with an industrial personal computer, the expansion board has better expansibility and better structural maintainability.
Drawings
FIG. 1 is a topology of the present utility model;
FIG. 2 is a topology of an expansion board;
FIG. 3 is a frame diagram of a back plate;
Fig. 4 is a serial port routing relationship diagram.
Detailed Description
The present application will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present application more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.
On the contrary, the application is intended to cover any alternatives, modifications, equivalents, and variations as may be included within the spirit and scope of the application as defined by the appended claims. Further, in the following detailed description of the present application, certain specific details are set forth in order to provide a better understanding of the present application. The present application will be fully understood by those skilled in the art without the details described herein.
Example 1
The charging system in the cloud-side-end mode consists of a rear station-level system and front-end roadway equipment.
The background station level system realizes parallel processing of all lane charging business and lane peripheral control and monitoring of the background station, and centralized processing and control of all lane equipment in the toll station are realized through a standardized network protocol. The system adopts a micro-service architecture, containerized deployment and platform management, each service operates in an independent process, and the service are mutually coordinated by adopting a lightweight communication mechanism to complete the whole charging service.
The front-end lane equipment adopts intelligent nodes to integrate lane related equipment, lane equipment control and management are carried out in the nodes by using a lane controller, equipment control logic is only carried out at the lane side, and the service side is completed by station-level related service, so that service and control separation are realized. For the lane controller, it is necessary to provide respective communication interfaces for connecting communication with the downstream devices and the upstream devices.
The lane peripheral remote controller of the embodiment adopts the latest Embedded processor 2K1000LA and Loongnix-Embedded operating system of the domestic Loongson as the basic software and hardware support technology of the new-generation lane controller, so that the lane controller bottom technology is completely independently controllable, and the high-efficiency LA264 kernel can completely meet the requirements of a new computing architecture on network and computing performance. The characteristics of the 2K1000LA processor in performance, environmental adaptability, high integration level, encryption and decryption modules and the like are fully exerted, and meanwhile, the system state key control technology such as BMC and the like is combined, so that the requirements of the system in aspects of safety, instantaneity, usability, reliability, maintainability, high cost performance and the like can be well met when a new-generation lane controller is designed and developed.
Specifically, as shown in fig. 1-4, the lane peripheral remote controller integrally adopts a structure of a back plate, a main plate, an expansion slot and a dual-redundancy power supply. The device comprises a box body and a backboard arranged in the box body, wherein the backboard supports two slots, namely a main board slot and an expansion slot, and is used for supporting a plug-in card type to install a main board and an expansion board card, so that the maintainability and the expansion upgrading property of equipment are improved.
The main board takes a domestic Loongson dual-core embedded processor 2K1000LA as a CPU. Loongson 2K1000LA processors have versions of general industry, special industry, business, etc. The embodiment adopts a common industrial-grade device nuclear power source of 1.15V, a main frequency of 800Mhz and a working temperature of-40 ℃ to 85 ℃. The temperature range is wider, and the method is suitable for the wide regional environment requirements of China.
The specifications of the Loongson 2K1000LA processor used in this example are shown in Table 1.
TABLE 1 2K1000LA processor specifications
Specifically, in this embodiment, the main board of the lane peripheral remote controller includes the following designs:
Store: the Loongson 2K1000LA processor is connected with DDR3 memory, SSD solid state disk and FLASH FLASH memory. The backboard is provided with a hard disk expansion slot, and the Loongson 2K1000LA processor can be expanded and connected with the hard disk in a mode of being inserted with the solid state disk.
The memory is realized by adopting 64-bit 2GB capacity DDR3 particles, the hard disk supports 1 M.2 hard disk (compatible with 2242 and 2280 types), and 1 128GB capacity hard disk is installed by default.
Specifically, a CSN0 chip of the SPI interface of the Loongson 2K1000LA processor is hung with BIOS Flash. The flash type for the board card is GD25Q64CSIG,3.3V voltage, QSPI bus and 64Mb capacity of a megaly easy innovation company.
Only 1 sata2 interface is arranged on the Loongson 2K1000LA processor, and the Loongson 2K1000 is used by hanging an M.2 solid state disk.
Network interface: the PCIe interface of the Loongson 2K1000LA processor is connected with two RJ45 interfaces through two network control chips respectively, and the PCIe interface of the Loongson 2K1000LA processor is also connected with 4 RJ45 interfaces through the network control chip and LAN SWITCH network exchange chip in sequence.
6 Gigabit ethernet interfaces (RJ 45 interfaces). The 2 network interfaces are network control chip direct-out network interfaces, and can be used for using large message data volume scenes such as graphics, images and the like and using scenes with more frequent data volume; and the other 4 network interfaces are hung on a network exchange chip, share one gigabit network interface when carrying out data transmission with the Loongson 2K1000LA processor, and can be used for controlling the use of small message data volume scenes such as command transmission, acquisition state uploading and the like. The network interaction chip is also connected to the MCU processor. The design can connect the MCU processor connected with the network exchange chip to the networking network in a seamless way, realize intercommunication among the CPU, the MCU and the external network, and is more convenient for remote management, and can reduce the manufacturing cost of the equipment.
Table 2: loongson 2K1000LA processor PCIe interface allocation
The network control chip is used for converting a PCIe bus into a 1000Base-T gigabit network, and the Loongson 2K1000LA processor is connected with the RTL8119 network controller chip through PCIe x 1.
The project adopts three RTL8119 and the network exchange chip SF2507 to realize the design of the 1000BASE-T of the 6-way gigabit network.
RTL8119 is a product of Taiwan REALTEK company, china.
The main specification parameters of the chip are as follows:
Chip model: RTL8119-CG;
Chip specifications:
PCIe interface: gen1;
network interface: 1 support 1000Base-T;
Supporting an external EEPROM;
Power consumption: 0.65W;
Operating temperature: -40 to +85 ℃;
package size: QFN48, 6mm. Times.6 mm.
On one hand, the network exchange chip leads out 4 kilomega Ethernet interfaces to the outside, and on the other hand, realizes networking interconnection of the CPU, MCU and the external Ethernet in the board, and forms a data channel capable of communicating with each other.
The network exchange chip adopts SF2507 of Nafei microelectronics company in China.
The main specification parameters of the chip are as follows:
chip model: SF2507-BI;
Chip specifications:
Support 5+2 port 10/100/1000M high performance Ethernet switching;
The integrated 5 low-power consumption characteristics GigaPHY can support 1000Base-T/100BaseTX/10Base-T/100Base-FX;
Integrating 2 GMAC ports, which can support RGMII/RMII/MII protocol, and connecting the interfaces to the outside PHY, MAC, MCU for data communication;
power consumption: 2.28W;
Operating temperature: -40 to +85 ℃;
Package size: LQFP-128E-PAD.
Wireless network: as shown in the above Table 2, the Loongson 2K1000LA processor PCIe interface is connected with an SMA interface through a WIFI module
The Loongson 2K1000LA processor USB interface is connected with an SMA interface and an SIM card slot through a 4G module.
Specifically, 4 USB2.0 interfaces are shared on the Loongson 2K1000LA processor, and 4 interfaces are shared in the design.
Port 1 (USB 0), which is a multiplexing interface, is connected to the back plate or the WIFI module, is connected to the back plate by default, and is connected to the spare option of the WIFI module;
port 2 (USB 1), connected to the back plate;
Port 3 (USB 2), connected to the 4G module; the 4G LTE wireless module selects a GM510 module of a happy new Internet of things company;
port 4 (USB 3) is connected to the panel SMA interface.
Serial communication interface: loongson 2K1000LA processor serial ports have multiple configuration modes. A maximum of 12 3-wire serial ports may be configured. We use twelve 3-wire serial ports for uart0, uart1, uart2, uart3, uart4, uart5, uart6, uart7, uart8, uart9, uart10, uart11, the correspondence is as follows:
uart1, uart4, uart5, uart6, uart7, uart8 are connected to the backplane as reservations.
Uart2 corresponds to panel connector COM1, uart9 corresponds to panel connector COM2;
uart10 corresponds to panel connector COM3 and uart11 corresponds to panel connector COM4;
uart0 is connected to the panel Debug COM.
The uart3 is connected to uart4 of the MCU and is used for programming the MAC address of the MCU network port and modifying the IP address of the MCU network port.
4 Serial communication interfaces are designed externally, the serial communication interfaces are designed to be RS232 level by default, and the protocols of RS422/RS485 are compatible in design, if the RS422/RS485 level is required to be used subsequently, corresponding chips are welded.
Relay: the Loongson 2K1000LA processor is connected with the relay through the MOS tube and the optical coupler in sequence.
Thefour-wayrelayisprovidedwith4FORM-Arelayinterfaces,andthe4FORM-Crelayinterfacesadopt3.5mmspacingwiringterminalstofacilitatewiring. The relay is driven by MOS tube and optocoupler isolation, on one hand, the relay driving current and voltage are matched, and on the other hand, the relay can play a role in isolating and protecting CPU.
Digital quantity input: the Loongson 2K1000LA processor is connected with a wiring terminal through a comparator and an optical coupler in sequence, and is provided with 16 paths of wiring terminals;
The 16 paths of optocouplers isolate digital input, and wiring is facilitated by adopting 3.5 mm-distance wiring terminals. The isolated input is sent to the CPU after passing through the comparator, and the input threshold value is set, so that the sensitivity of digital quantity input is improved.
(1) The main specification parameters of the relay are as follows:
chip model: HFD27/012-S;
Chip specification:
Contact form: single-pass coil control 2 sets of FORM-C;
Contact capacity: 125VAC@1A or 30VDC@2A;
maximum switching voltage: 240VAC/120VDC;
Maximum switching current: 2A;
Opening time: maximum 7ms;
closing time: maximum 4ms;
Contact resistance: 100mΩ;
isolation impedance: 1000MΩ;
mechanical durability: 1x108 times;
Electrical durability: 1x105 times;
operating temperature: -40 to +70 ℃;
(2) The main specification parameters of the optical coupler are as follows:
chip model: 4N25S-TA1;
Chip specification:
Maximum current of input diode: 60mA (series 560 ohm resistor, meet 5-24 Vdc input voltage requirement, and 560 ohm input impedance requirement);
Isolation voltage: 2500Vdc;
operating temperature: -55 ℃ to +100 ℃.
(3) The main specification parameters of the comparator are as follows:
Chip model: XL2901
Chip specification:
Number of channels: 4, a step of;
output type: the collector electrode is opened and leaked;
response time: 1.3us;
Supply voltage: 2V-30V;
operating temperature: -40 to +125℃.
Monitoring: the Loongson 2K1000LA processor is connected with an MCU processor; the MCU processor is connected with an ADC chip.
The state monitoring function is realized through an I2C interface ADC chip on the MCU, and monitoring data can be sent into a network or a CPU processor through an Ethernet interface. Meanwhile, the functions of remote diagnosis, remote reset, health reporting and the like are realized.
The MCU processor adopts an STM32F407VGT6 chip based on ARM Cotex-M4 cores by Switzerland ST company. The main specification parameters of the chip are as follows:
Chip model: STM32F407VGT6;
Chip specification:
And (3) core: 32 bits ARM Cotex-M4;
The main frequency: 168MHz;
Built-in Flash:1024KB;
Built-in SRAM:192KB;
An interface: 3x SPI;3x i2c;4x UART;1x USB;2x Can;
comprising 12 16-bit timers and 2 32-bit counters;
the system comprises 16 paths of 12-bit ADCs and 2 paths of 12-bit DACs;
the device comprises 82 paths of GPIO;
The system comprises 1 hundred meganet port;
Operating temperature: -40 ℃ to +85 ℃ (technical grade);
And (3) packaging: LQFP100;
package size: 14mm by 14mm.
In this embodiment, an ADC chip is used as an external temperature and voltage monitoring chip to monitor the voltage of the back plate, the voltage of the CPU core, and other key power sources, and monitor the temperature of the system.
The ADC chip adopts an MS5175 chip of domestic Engineer science and technology company to collect 3 paths of voltage and 1 path of temperature.
Control interface/status display: the Loongson 2K1000LA processor is also connected with 4 LED system status lamps (respectively used for direct current power supply, CPU, MCU and software running indication) and 1 OLED liquid crystal screen (used for complete display of fault information).
The lane peripheral remote controller comprises a power supply source, and adopts 2 alternating current-to-direct current power supply modules which are connected with the backboard through diodes. The external input power supply 220V, the alternating current-to-direct current power supply module outputs a 5V direct current power supply for each electric element. The dual redundant power supply is realized, and the working reliability of the power supply is improved.
2 Paths of PCIe x1 and reference clocks are reserved and designed in the expansion board slot on the backboard; 6-way 3.3V LVTTL 3 line UART; 2-way USB2.0;16 GPIO. The method can be used for expanding functions of 5G modules, ethernet interfaces, serial interfaces, relays, digital quantity, PSAM cards and the like.
The present utility model can be well implemented according to the above-described embodiments. It should be noted that, based on the above structural design, in order to solve the same technical problems, the present utility model is not limited to the protection scope of the essential utility model.

Claims (4)

1. The lane peripheral remote controller is characterized by comprising a box body and a back plate arranged in the box body, wherein the back plate is provided with a slot for plugging a main plate and a slot for plugging an expansion plate; the main board comprises a CPU processor, wherein the CPU processor is a Loongson dual-core embedded processor 2K1000LA; the CPU processor is connected with a FLASH memory and a solid state disk; the CPU processor is connected with an RJ45 interface through a network control chip; the CPU processor is also connected with an RJ45 interface through a network control chip and a network exchange chip in sequence; the CPU processor is connected with the SMA interface through the 4G module and the WIFI module; the CPU processor is connected with the wiring terminal through the MOS tube, the optical coupler and the relay in sequence; the CPU processor is connected with the wiring terminal through the comparator and the optical coupler in sequence; the CPU processor is connected with the MCU processor; the CPU processor is connected with a serial communication interface; the MCU processor is connected with the ADC chip and is an STM32F407VGT6 chip.
2. The lane peripheral remote controller according to claim 1, wherein a dual redundant power supply is provided in the case for supplying power to the power-consuming element through the back plate; the dual redundant power supply comprises two alternating current-to-direct current conversion power supplies; the AC-DC conversion power supply is connected to the backboard through a diode.
3. The lane peripheral remote controller of claim 1 wherein the MCU processor is connected to the ADC chip via a network switch chip.
4. The lane peripheral remote controller according to claim 1, wherein a slot on the back board for plugging the expansion board is reserved with 2 PCIe x1 interfaces, 6 UART interfaces, 2 USB2.0 interfaces, and 16 GPIO interfaces.
CN202322063796.2U 2023-08-02 2023-08-02 Remote controller for lane peripheral Active CN220913525U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202322063796.2U CN220913525U (en) 2023-08-02 2023-08-02 Remote controller for lane peripheral

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202322063796.2U CN220913525U (en) 2023-08-02 2023-08-02 Remote controller for lane peripheral

Publications (1)

Publication Number Publication Date
CN220913525U true CN220913525U (en) 2024-05-07

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Application Number Title Priority Date Filing Date
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