CN220858080U - High-reliability multiplex electronic relay - Google Patents
High-reliability multiplex electronic relay Download PDFInfo
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- CN220858080U CN220858080U CN202321811404.XU CN202321811404U CN220858080U CN 220858080 U CN220858080 U CN 220858080U CN 202321811404 U CN202321811404 U CN 202321811404U CN 220858080 U CN220858080 U CN 220858080U
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Abstract
The utility model provides a high-reliability multiplex electronic relay, which comprises a multiplex main power circuit, an isolated current sampling circuit, a SEPIC boost power supply, a floating main power MOS tube driving circuit and an MCU micro-controller, wherein the MCU micro-controller is connected with the isolation current sampling circuit; the SEPIC boost power supply and the floating main power MOS tube driving circuit jointly realize the driving of the main power MOS tube; the adoption of the multiple main power circuit provides larger-capacity through-current capacity, and the safety of the circuit can provide a breakdown protection function through fusing when the MOS tube breaks down, so that the reliability of the electronic relay is greatly improved; meanwhile, the isolation current sampling circuit adopts a Hall element at the output side, accurately detects load current, and can timely carry out overcurrent and overload protection on the MOS tube, so that the current carrying capacity of the electronic relay is improved, the overall structure size is reduced, and the electronic relay has the characteristics of high reliability and miniaturization.
Description
Technical Field
The utility model belongs to the field of electronic relays, and particularly relates to a high-reliability multiplex electronic relay.
Background
In the process of switching heavy current, the action contact or action mechanism of the mechanical structure type relay, especially the heavy-load high-power relay or contactor, usually generates deformation, oxidation, corrosion and other conditions due to electrochemical reaction caused by electric arc generated when current is cut off, thereby not only influencing the service life of the relay, but also influencing the safety of a working circuit.
The electronic relay adopts a thyristor, an MOS tube, a power BJT and other power semiconductor devices as a switch executing unit. Because the semiconductor material is used for controlling the on-off of the current, no electric arc is generated in the process, and the electronic relay has the advantages of long service life and small interference to the working circuit. However, since a breakdown phenomenon occurs in the power semiconductor device, in this case, the reliability of the conventional electronic relay is difficult to be effectively ensured. When breakdown occurs, the breakdown point of the traditional electronic relay continuously heats, and meanwhile, load current cannot be cut off, so that the safety and reliability of the traditional electronic relay in actual use are seriously affected.
Meanwhile, the traditional electronic relay has the reliability problem when the semiconductor device breaks down, and the overcurrent and overload capacity of the electronic relay is weak due to the characteristics of the semiconductor device. For this case, the conventional electronic relay adopts a quota method, that is, a semiconductor device with a larger margin is selected, and the actual nominal use current is smaller. This practice greatly limits the current carrying capacity of conventional electronic relays and can also cause them to be oversized.
Disclosure of utility model
The utility model provides a high-reliability multiplex electronic relay, which solves the problems of safety and reliability during breakdown of the relay, weak overcurrent and overload capacity, oversized and the like.
The utility model adopts the following technical scheme:
A high-reliability multiple electronic relay comprises an electronic relay, wherein the electronic relay comprises a multiple main power circuit, an isolated current sampling circuit, a SEPIC boost power supply, a floating main power MOS tube driving circuit and an MCU micro-controller,
The external control signal is connected with the input end of the MCU, and the MCU is respectively connected with the output end of the isolated current sampling circuit, the input end of the SEPIC boost power supply and the input end of the floating main power MOS tube driving circuit; the output end of the floating main power MOS tube driving circuit is connected with the multiplex main power circuit, and the power end of the floating main power MOS tube driving circuit is connected with the SEPIC boosting power supply; the input end of the isolation current sampling circuit is connected with the multiple main power circuits.
Preferably, the circuit further comprises 4 pins: SGIN pins, VIN pins, VO pins and GND pins, and external control signals are connected with the input end of the MCU through SGIN pins; the positive electrode of the external storage battery is respectively connected with a multiplexing main power circuit and a SEPIC boost power supply through a VIN pin; the negative electrode of the external storage battery is respectively connected with the isolated current sampling circuit, the SEPIC boost power supply and the floating main power MOS tube driving circuit through the GND pin; one end of an external load is connected to the isolation current sampling circuit through a VO pin, and the other end of the load is connected with the negative electrode of the external storage battery.
Preferably, the multiple main power circuit comprises a preset number of MOS tubes and insurance identical to the number of the MOS tubes; the drains of the MOS tubes are in short circuit and connected to the VIN pin, the grids of the MOS tubes are in short circuit and connected to the output end of the floating main power MOS tube driving circuit (5); the source electrodes of the MOS tubes are respectively connected to one end of the corresponding insurance in a one-to-one correspondence manner; the other end of each fuse is short-circuited together and connected to the input end of the isolated current sampling circuit (3).
Preferably, the isolation current sampling circuit comprises a hall current sensor HS1, an operational amplifier OP1, a current limiting resistor RA1, a voltage stabilizing tube ZA1 and a filter capacitor CA1; the input end of the Hall current sensor HS1 is used as the input end of the isolation current sampling circuit to be connected with the multiple main power circuits; the sampling end of the Hall current sensor HS1 is connected with a VO pin; the output end of the Hall current sensor HS1 is connected with the positive electrode of the operational amplifier OP 1; the negative electrode of the operational amplifier OP1 is connected to the output end of the operational amplifier OP1, and the output end of the operational amplifier OP1 is connected to the pin 4 of the MCU through the current limiting resistor RA 1; one end of the voltage stabilizing tube ZA1 and one end of the filter capacitor CA1 are short-circuited and connected to the pin 4 of the MCU, and the other end of the voltage stabilizing tube ZA1 and the other end of the filter capacitor CA1 are short-circuited and connected to the GND pin.
Preferably, the SEPIC boost power supply includes a boost inductor LS1, a boost inductor LS2, a boost diode DS1, a boost capacitor CS2, a MOS transistor SS1, and a driving resistor RS1; one end of the boost inductor LS1 is connected to the VIN pin, and the other end of the boost inductor LS1 is respectively connected with the drain electrode of the MOS tube SS1 and one end of the boost capacitor CS 1; the source electrode of the MOS tube SS1 is connected with the GND pin, and the grid electrode of the MOS tube SS1 is connected to the pin 2 of the MCU through the driving resistor RS1; the other end of the boost capacitor CS1 is respectively connected with one end of the boost inductor LS1 and the anode of the boost diode DS 1; the other end of the boost inductor LS1 is connected with a GND pin; the cathode of the boost diode DS1 is connected with one end of the boost capacitor CS2, and the cathode of the boost diode DS1 is connected with the power supply end of the floating main power MOS tube driving circuit.
Preferably, the floating main power MOS transistor driving circuit includes a current limiting resistor RDr1, a current limiting resistor RDr2, a current limiting resistor RDr3, a driving resistor RDr4, a driving resistor RDr5, a voltage regulator ZDr1, a voltage regulator ZDr2, a MOS transistor SDr1, and a triode QDr1; the base electrode of the triode QDr1 is connected to the pin 3 of the MCU through a current limiting resistor RDr1, the emitter electrode of the triode QDr1 is connected to the GND pin, and the collector electrode of the triode QDr1 is respectively connected with one end of the current limiting resistor RDr3, the anode of the voltage regulator ZDr and the grid electrode of the MOS transistor SDr through a current limiting resistor RDr 2; the other end of the current-limiting resistor RDr1, the cathode of the voltage stabilizing tube ZDr and the source of the MOS tube SDr are in short circuit to form a common end, and the common end is used as a power end of a floating main power MOS tube driving circuit to be connected with a SEPIC boost power supply; the drain electrode of the MOS tube SDr is respectively connected with one end of a driving resistor RDr5 and the cathode of the voltage stabilizing tube ZDr through a driving resistor RDr4, and the public end connected with one end of the resistor RDr5 and the cathode of the voltage stabilizing tube ZDr is used as the output end of the floating main power MOS tube driving circuit to be connected with the multiple main power circuits; the other end of the driving resistor RDr5 is in short circuit with the anode of the voltage stabilizing tube ZDr, and the common end connected with the driving resistor RDr is connected with the input end of the isolation current sampling circuit (3).
The beneficial effects of the utility model are as follows: the utility model provides a high-reliability multiplex electronic relay, which comprises a multiplex main power circuit, an isolated current sampling circuit, a SEPIC boost power supply, a floating main power MOS tube driving circuit and an MCU micro-controller, wherein the MCU micro-controller is connected with the isolation current sampling circuit; the SEPIC boost power supply and the floating main power MOS tube driving circuit jointly realize the driving of the main power MOS tube; the adoption of the multiple main power circuit provides larger-capacity through-current capacity, and the safety of the circuit can provide a breakdown protection function through fusing when the MOS tube breaks down, so that the reliability of the electronic relay is greatly improved; meanwhile, the isolation current sampling circuit adopts a Hall element at the output side, accurately detects load current, and can timely carry out overcurrent and overload protection on the MOS tube, so that the current carrying capacity of the electronic relay is improved, the overall structure size is reduced, and the electronic relay has the characteristics of high reliability and miniaturization.
Drawings
Fig. 1 is a block diagram of a high reliability multiple electronic relay in accordance with an embodiment of the present utility model.
In the figure: the device comprises a 1-electronic relay, a 2-multiplexing main power circuit, a 3-isolation current sampling circuit, a 4-SEPIC boost power supply and a 5-floating main power MOS tube driving circuit.
Description of the embodiments
The utility model is further described below with reference to the accompanying drawings. The following examples will provide those skilled in the art with a more complete understanding of the utility model, but are not intended to limit the utility model in any way.
The embodiment provides a high-reliability multiplexing electronic relay, as shown in fig. 1, the high-reliability multiplexing electronic relay comprises an electronic relay 1, wherein the electronic relay 1 comprises a multiplexing main power circuit 2, an isolated current sampling circuit 3, a SEPIC boost power supply 4, a floating main power MOS tube driving circuit 5 and an MCU micro-controller, an external control signal is connected with the input end of the MCU micro-controller, and the MCU micro-controller is respectively connected with the output end of the isolated current sampling circuit 3, the input end of the SEPIC boost power supply 4 and the input end of the floating main power MOS tube driving circuit 5; the output end of the floating main power MOS tube driving circuit 5 is connected with the multiple main power circuits 2, and the power end of the floating main power MOS tube driving circuit 5 is connected with the SEPIC boosting power supply 4; the input end of the isolated current sampling circuit 3 is connected with the multiplexing main power circuit 2.
The electronic relay 1 further comprises 4 pins: SGIN pins, VIN pins, VO pins and GND pins, and external control signals are connected with the input end of the MCU through SGIN pins; the positive electrode of the external storage battery is respectively connected with the multiplexing main power circuit 2 and the SEPIC boost power supply 4 through the VIN pin; the negative electrode of the external storage battery is respectively connected with the isolation current sampling circuit 3, the SEPIC boost power supply 4 and the floating main power MOS tube driving circuit 5 through a GND pin; one end of an external load is connected to the isolation current sampling circuit through a VO pin, and the other end of the load is connected with the negative electrode of the external storage battery. The electronic relay 1 is controlled by an external control signal to be turned on and off, and output and stop are realized at the VO, so that the function of controlling whether a LOAD is connected to a working loop is realized.
The multiple main power circuit 2 comprises a preset number of MOS transistors and insurance which is the same as the number of the MOS transistors; the drains of the MOS tubes are in short circuit and connected to the VIN pin, the grids of the MOS tubes are in short circuit and connected to the output end of the floating main power MOS tube driving circuit (5); the source electrodes of the MOS tubes are respectively connected to one end of the corresponding insurance in a one-to-one correspondence manner; the other end of each fuse is short-circuited together and connected to the input end of the isolated current sampling circuit (3).
According to the power level, the MOS tube and the insurance quantity of different power levels can be different. In this embodiment, the multiple main power circuit 2 includes a MOS transistor S1, a MOS transistor S2, a MOS transistor S3, a MOS transistor S4, a safety F1, a safety F2, a safety F3, and a safety F4; the drains of the MOS tube S1, the MOS tube S2, the MOS tube S3 and the MOS tube S4 are short-circuited together and connected to the VIN pin; the grid electrodes of the MOS tube S1, the MOS tube S2, the MOS tube S3 and the MOS tube S4 are in short circuit connection and are connected to the output end of the floating main power MOS tube driving circuit 5; the sources of the MOS tube S1, the MOS tube S2, the MOS tube S3 and the MOS tube S4 are respectively connected to one end of the insurance F1, one end of the insurance F2, one end of the insurance F3 and one end of the insurance F4 in a one-to-one correspondence manner; the other ends of the fuses F1, F2, F3 and F4 are short-circuited together and connected to the input end of the isolation current sampling circuit 3.
The MOS tube is adopted as a main switch device in the multiple main power circuit 2, so that the on voltage is reduced and the current capacity is high. The whole structure adopts multiple structure, totally comprises 4 groups of main power MOS tubes and insurance combinations, and can effectively improve the reliability of the electronic relay. Because the multiple main power structure with the insurance is adopted, when the main power MOS tube breaks down, the insurance can quickly fuse and cut off the current, thereby further improving the reliability of the electronic relay.
The isolation current sampling circuit 3 comprises a Hall current sensor HS1, an operational amplifier OP1, a current limiting resistor RA1, a voltage stabilizing tube ZA1 and a filter capacitor CA1; the input end of the Hall current sensor HS1 is used as the input end of the isolation current sampling circuit 3 to be connected with the multiplexing main power circuit 2; the sampling end of the Hall current sensor HS1 is connected with a VO pin; the output end of the Hall current sensor HS1 is connected with the positive electrode of the operational amplifier OP 1; the negative electrode of the operational amplifier OP1 is connected to the output end of the operational amplifier OP1, and the output end of the operational amplifier OP1 is connected to the pin 4 of the MCU through the current limiting resistor RA 1; one end of the voltage stabilizing tube ZA1 and one end of the filter capacitor CA1 are short-circuited and connected to the pin 4 of the MCU, and the other end of the voltage stabilizing tube ZA1 and the other end of the filter capacitor CA1 are short-circuited and connected to the GND pin. In this embodiment, the 4 pins are IO ports configured as AD sampling ports; the current sensor may use, but is not limited to, INA139NA and the operational amplifier may use, but is not limited to, LMV321IDBVR.
The isolated current sampling circuit 3 adopts a current Hall element to realize accurate detection of the current of the main power MOS tube, and can provide rapid overcurrent protection for the main power MOS tube, so that the main power MOS tube does not need to be derated in operation, the current passing capability of the electronic relay can be effectively improved, and the structural size of the electronic relay is reduced.
The SEPIC boost power supply 4 comprises a boost inductor LS1, a boost inductor LS2, a boost diode DS1, a boost capacitor CS2, a MOS tube SS1 and a driving resistor RS1; one end of the boost inductor LS1 is connected to the VIN pin, and the other end of the boost inductor LS1 is respectively connected with the drain electrode of the MOS tube SS1 and one end of the boost capacitor CS 1; the source electrode of the MOS tube SS1 is connected with the GND pin, and the grid electrode of the MOS tube SS1 is connected to the pin 2 of the MCU through the driving resistor RS1; the other end of the boost capacitor CS1 is respectively connected with one end of the boost inductor LS1 and the anode of the boost diode DS 1; the other end of the boost inductor LS1 is connected with a GND pin; the cathode of the boost diode DS1 is connected to one end of the boost capacitor CS2, and the cathode of the boost diode DS1 is connected to the power supply end of the floating main power MOS transistor driving circuit 5. In this embodiment, the 2 pin is a high-low frequency driving signal pin, driving SS1.
When the main power MOS tube in the SEPIC boost power supply 4 is conducted, the drain electrode and the source electrode of the SEPIC boost power supply are both the storage battery voltage, and the storage battery voltage is required to be boosted by the SEPIC boost power supply and is sent to the grid electrode of the main power MOS tube, so that the SEPIC boost power supply is completely driven.
Because the MCU micro controller and the main power MOS tube are not grounded together, the floating main power MOS tube driving circuit can realize zero potential point conversion at two sides, thereby providing a floating driving function. The floating main power MOS tube driving circuit comprises a current limiting resistor RDr1, a current limiting resistor RDr2, a current limiting resistor RDr3, a driving resistor RDr4, a driving resistor RDr5, a voltage regulator ZDr, a voltage regulator ZDr2, a MOS tube SDr and a triode QDr1; the base electrode of the triode QDr1 is connected to the pin 3 of the MCU through a current limiting resistor RDr1, the emitter electrode of the triode QDr1 is connected to the GND pin, and the collector electrode of the triode QDr1 is respectively connected with one end of the current limiting resistor RDr3, the anode of the voltage regulator ZDr and the grid electrode of the MOS transistor SDr through a current limiting resistor RDr 2; the other end of the current-limiting resistor RDr1, the cathode of the voltage stabilizing tube ZDr and the source of the MOS tube SDr1 are short-circuited to form a common end, and the common end is used as a power end of the floating main power MOS tube driving circuit 5 to be connected with the SEPIC boost power supply 4; the drain electrode of the MOS tube SDr is respectively connected with one end of a driving resistor RDr5 and the cathode of the voltage stabilizing tube ZDr through a driving resistor RDr4, and the public end connected with one end of the resistor RDr5 and the cathode of the voltage stabilizing tube ZDr is used as the output end of the floating main power MOS tube driving circuit 5 to be connected with the multiple main power circuits 2; the other end of the driving resistor RDr5 is in short circuit with the anode of the voltage stabilizing tube ZDr, and the common end connected with the driving resistor RDr is connected with the input end of the isolation current sampling circuit 3. In this embodiment, the 3 pin is a high-low frequency driving signal pin, and QDr1 is driven.
The working principle of this embodiment is as follows:
Aiming at the multiple main power circuit 2, when the main power MOS tubes S1, S2, S3 and S4 are not broken down, the on-off control of the main power MOS tube can be realized by controlling the voltage of the output end of the floating main power MOS tube driving circuit 5, so that a LOAD LOAD is connected to or separated from a working circuit; when any main power MOS tube breaks down, all main power currents are only protected by being connected in series with the main power MOS tube which breaks down, the current flowing through the protection is 4 times of the rated working condition, and the protection is quickly fused to enable a LOAD LOAD to be separated from a working loop, so that breakdown protection is realized, and the working reliability of the electronic relay 1 is improved.
For the isolated current sampling circuit 3, when the main power MOS tube is conducted, the current Hall HS1 can detect the load current in real time, and form linear proportional voltage at the output end of the current Hall HS1, and the voltage value is sent to the MCU micro-controller for current value calculation through the follower circuit formed by the operational amplifier OP1, and a preset voltage threshold is set for the received voltage value. When the overcurrent condition occurs, the voltage value acquired by the MCU micro-controller exceeds a preset voltage threshold value, and the relay is disconnected, so that the quick overcurrent protection is realized, and the current carrying capacity and the reliability of the electronic relay 1 can be improved at the same time.
Aiming at the SEPIC boost power supply 4, the MCU micro-controller outputs a high-frequency PWM signal at the 2 pin, and drives the MOS tube SS1 in the SEPIC boost power supply 4 to be on-off at high frequency, so as to form the SEPIC boost circuit. At this time, the power supply end of the floating main power MOS tube driving circuit 5 obtains a voltage higher than VIN, so as to provide a driving power supply for the main power MOS tube.
For the floating main power MOS tube driving circuit 5, when the MCU micro-controller receives an opening signal through the SGIN pin, a high-level signal is output at the 3 pin, and at the moment, the triode QDr1 is conducted to generate pressure difference between the source grid electrodes of the MOS tube SDr, the MOS tube SDr is conducted, the power end of the floating main power MOS tube driving circuit 5 is stabilized by the MOS tube SDr, the driving resistor RDr4 and the voltage stabilizing tube ZDr, and the main power MOS tube is driven to be conducted, so that the electronic relay 1 is in a conducting state. When the MCU SGIN receives the closing signal, a low-level signal is output at the 3 pin, at the moment, the triode QDr1 is turned off, the current-limiting resistor RDr3 pulls down the source grid voltage difference of the MOS tube SDr1 to zero, the MOS tube SDr is turned off, and the main power MOS tube is turned off, so that the electronic relay 1 enters the off state. The MOS transistors used in this embodiment are NMOS.
The utility model designs a high-reliability multiplex electronic relay which comprises a multiplex main power circuit, an isolated current sampling circuit, a SEPIC boost power supply, a floating main power MOS tube driving circuit and an MCU micro-controller, wherein the isolation current sampling circuit is connected with the SEPIC boost power supply; the SEPIC boost power supply and the floating main power MOS tube driving circuit jointly realize the driving of the main power MOS tube; the adoption of the multiple main power circuit provides larger-capacity through-current capacity, and the safety of the circuit can provide a breakdown protection function through fusing when the MOS tube breaks down, so that the reliability of the electronic relay is greatly improved; meanwhile, the isolation current sampling circuit adopts a Hall element at the output side, accurately detects load current, and can timely carry out overcurrent and overload protection on the MOS tube, so that the current carrying capacity of the electronic relay is improved, the overall structure size is reduced, and the electronic relay has the characteristics of high reliability and miniaturization.
Although the present utility model has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that the foregoing embodiments may be modified or equivalents substituted for some of the features thereof. All equivalent structures made by the content of the specification and the drawings of the utility model are directly or indirectly applied to other related technical fields, and are also within the scope of the utility model.
Claims (6)
1. The high-reliability multiplex electronic relay is characterized by comprising an electronic relay (1), wherein the electronic relay (1) comprises a multiplex main power circuit (2), an isolated current sampling circuit (3), a SEPIC boost power supply (4), a floating main power MOS tube driving circuit (5) and an MCU micro-controller,
The external control signal is connected with the input end of the MCU micro-controller, and the MCU micro-controller is respectively connected with the output end of the isolated current sampling circuit (3), the input end of the SEPIC boost power supply (4) and the input end of the floating main power MOS tube driving circuit (5); the output end of the floating main power MOS tube driving circuit (5) is connected with the multiple main power circuits (2), and the power end of the floating main power MOS tube driving circuit (5) is connected with the SEPIC boosting power supply (4); the input end of the isolation current sampling circuit (3) is connected with the multiplexing main power circuit (2).
2. The high reliability multiplexed electronic relay of claim 1, further comprising 4 pins: SGIN pins, VIN pins, VO pins and GND pins, and external control signals are connected with the input end of the MCU through SGIN pins; the positive electrode of the external storage battery is respectively connected with the multiplexing main power circuit (2) and the SEPIC boost power supply (4) through the VIN pin; the negative electrode of the external storage battery is respectively connected with an isolated current sampling circuit (3), a SEPIC boost power supply (4) and a floating main power MOS tube driving circuit (5) through a GND pin; one end of an external load is connected to the isolation current sampling circuit through a VO pin, and the other end of the load is connected with the negative electrode of the external storage battery.
3. The high-reliability multiplexing electronic relay according to claim 2, wherein the multiplexing main power circuit (2) comprises a preset number of MOS transistors and a safety equal to the number of MOS transistors; the drains of the MOS tubes are in short circuit and connected to the VIN pin, the grids of the MOS tubes are in short circuit and connected to the output end of the floating main power MOS tube driving circuit (5); the source electrodes of the MOS tubes are respectively connected to one end of the corresponding insurance in a one-to-one correspondence manner; the other end of each fuse is short-circuited together and connected to the input end of the isolated current sampling circuit (3).
4. The high-reliability multiple electronic relay according to claim 2, wherein the isolation current sampling circuit (3) comprises a hall current sensor HS1, an operational amplifier OP1, a current limiting resistor RA1, a voltage stabilizing tube ZA1, and a filter capacitor CA1; the input end of the Hall current sensor HS1 is used as the input end of the isolation current sampling circuit (3) to be connected with the multiplexing main power circuit (2); the sampling end of the Hall current sensor HS1 is connected with a VO pin; the output end of the Hall current sensor HS1 is connected with the positive electrode of the operational amplifier OP 1; the negative electrode of the operational amplifier OP1 is connected to the output end of the operational amplifier OP1, and the output end of the operational amplifier OP1 is connected to the pin 4 of the MCU through the current limiting resistor RA 1; one end of the voltage stabilizing tube ZA1 and one end of the filter capacitor CA1 are short-circuited and connected to the pin 4 of the MCU, and the other end of the voltage stabilizing tube ZA1 and the other end of the filter capacitor CA1 are short-circuited and connected to the GND pin.
5. The high-reliability multiple electronic relay according to claim 1, wherein the SEPIC boost power supply (4) comprises a boost inductor LS1, a boost inductor LS2, a boost diode DS1, a boost capacitor CS2, a MOS tube SS1, and a driving resistor RS1; one end of the boost inductor LS1 is connected to the VIN pin, and the other end of the boost inductor LS1 is respectively connected with the drain electrode of the MOS tube SS1 and one end of the boost capacitor CS 1; the source electrode of the MOS tube SS1 is connected with the GND pin, and the grid electrode of the MOS tube SS1 is connected to the pin 2 of the MCU through the driving resistor RS1; the other end of the boost capacitor CS1 is respectively connected with one end of the boost inductor LS1 and the anode of the boost diode DS 1; the other end of the boost inductor LS1 is connected with a GND pin; the cathode of the boost diode DS1 is connected with one end of the boost capacitor CS2, and the cathode of the boost diode DS1 is connected with the power supply end of the floating main power MOS tube driving circuit (5).
6. The high-reliability multiple electronic relay according to claim 1, wherein the floating main power MOS transistor driving circuit (5) comprises a current limiting resistor RDr1, a current limiting resistor RDr2, a current limiting resistor RDr3, a driving resistor RDr4, a driving resistor RDr5, a voltage regulator ZDr1, a voltage regulator ZDr2, a MOS transistor SDr1, and a triode QDr1; the base electrode of the triode QDr1 is connected to the pin 3 of the MCU through a current limiting resistor RDr1, the emitter electrode of the triode QDr1 is connected to the GND pin, and the collector electrode of the triode QDr1 is respectively connected with one end of the current limiting resistor RDr3, the anode of the voltage regulator ZDr and the grid electrode of the MOS transistor SDr through a current limiting resistor RDr 2; the other end of the current-limiting resistor RDr1, the cathode of the voltage regulator ZDr and the source of the MOS tube SDr are in short circuit to form a common end, and the common end is used as a power end of the floating main power MOS tube driving circuit (5) to be connected with the SEPIC boost power supply (4); the drain electrode of the MOS tube SDr is respectively connected with one end of a driving resistor RDr5 and the cathode of the voltage stabilizing tube ZDr through a driving resistor RDr4, and the public end connected with one end of the resistor RDr5 and the cathode of the voltage stabilizing tube ZDr is used as the output end of the floating main power MOS tube driving circuit (5) to be connected with the multiple main power circuits (2); the other end of the driving resistor RDr5 is in short circuit with the anode of the voltage stabilizing tube ZDr, and the common end connected with the driving resistor RDr is connected with the input end of the isolation current sampling circuit (3).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321811404.XU CN220858080U (en) | 2023-07-11 | 2023-07-11 | High-reliability multiplex electronic relay |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321811404.XU CN220858080U (en) | 2023-07-11 | 2023-07-11 | High-reliability multiplex electronic relay |
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| Publication Number | Publication Date |
|---|---|
| CN220858080U true CN220858080U (en) | 2024-04-26 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202321811404.XU Active CN220858080U (en) | 2023-07-11 | 2023-07-11 | High-reliability multiplex electronic relay |
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| Country | Link |
|---|---|
| CN (1) | CN220858080U (en) |
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2023
- 2023-07-11 CN CN202321811404.XU patent/CN220858080U/en active Active
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