CN220796755U

CN220796755U - Solar cell and photovoltaic module

Info

Publication number: CN220796755U
Application number: CN202322434479.7U
Authority: CN
Inventors: 舍赫罗兹·拉扎克; 胡玉婷; 刘霖; 杨伯川; 陶加华
Original assignee: East China Normal University; Risen Energy Co Ltd
Current assignee: East China Normal University; Risen Energy Co Ltd
Priority date: 2023-09-07
Filing date: 2023-09-07
Publication date: 2024-04-16
Anticipated expiration: 2033-09-07

Abstract

The utility model discloses a solar cell and a photovoltaic module, wherein the solar cell comprises the following structures: a substrate, a first passivation layer, an N-type doped zinc sulfide layer and a first transparent conductive oxide layer which are sequentially stacked on a first surface of the substrate, and a second passivation layer, a P-type doped layer and a second transparent conductive oxide layer which are sequentially stacked on a second surface of the substrate; wherein the first passivation layer comprises a silicon dioxide passivation layer. The first passivation layer between the substrate and the N-type doped layer comprises a silicon dioxide passivation layer, and zinc sulfide is used as the N-type doped layer, so that surface reflection is effectively reduced, surface recombination rate is also reduced, light trapping effect is enhanced, and carrier life is prolonged to improve the electrical performance of the substrate. The solar cell of the above structure has high external quantum efficiency, spectral response in a short wavelength range (ultraviolet region), low transmittance of photons of a long wavelength (near infrared region), and little attenuation problem caused by ultraviolet rays.

Description

Solar cell and photovoltaic module

Technical Field

The utility model relates to the field of photovoltaics, in particular to a solar cell and a photovoltaic module.

Background

Crystalline silicon (c-Si) solar cells currently dominate the Photovoltaic (PV) industry, accounting for about 95% of the market share. Heterojunction batteries with a core structure of monocrystalline silicon/hydrogenated intrinsic amorphous silicon/hydrogenated doped microcrystalline silicon have high efficiency, low temperature coefficient and high double-sided property by virtue of excellent charge selective transmission and interface passivation characteristics, and are highly focused by researchers. However, the conventional heterojunction solar cell has the defects of poor spectral response in a short wavelength range, low utilization rate after long wavelength penetrates through a silicon wafer, ultraviolet attenuation (UVID) and the like.

Disclosure of Invention

Based on this, the present utility model provides a solar cell and a photovoltaic module, which have high external quantum efficiency, spectral response in a short wavelength range (ultraviolet region), low long wavelength (near infrared region) photon transmittance, and little attenuation problem caused by ultraviolet rays.

The utility model provides a solar cell, which comprises the following structures:

a substrate having opposed first and second surfaces;

a first passivation layer, an N-type doped zinc sulfide layer and a first transparent conductive oxide layer which are sequentially stacked on the first surface of the substrate, and a second passivation layer, a P-type doped layer and a second transparent conductive oxide layer which are sequentially stacked on the second surface of the substrate; wherein the first passivation layer comprises a silicon dioxide passivation layer.

In one embodiment, the first surface is a textured surface and the second surface is a polished surface.

In one embodiment, the second passivation layer comprises a silicon dioxide passivation layer or a hydrogenated intrinsic amorphous silicon passivation layer.

In one embodiment, the thickness of the second passivation layer is 1nm to 15nm.

In one embodiment, the P-type doped layer comprises a P-type hydrogenated doped microcrystalline silicon layer or a P-type doped nickel oxide layer.

In one embodiment, the thickness of the P-type doped layer is 5 nm-50 nm.

In one embodiment, the first transparent conductive oxide layer and the second transparent conductive oxide layer each independently comprise one or more of an indium tin oxide layer, a tungsten doped indium oxide layer, a cerium doped indium oxide layer, an aluminum doped zinc oxide layer, an indium doped cadmium oxide layer, and an antimony doped tin oxide layer.

In one embodiment, the thickness of the first transparent conductive oxide layer and/or the second transparent conductive oxide layer is 40nm to 80nm.

In one embodiment, the thickness of the N-type doped zinc sulfide layer is 5 nm-25 nm.

In one embodiment, the thickness of the first passivation layer is 1nm to 5nm.

Still further, the present utility model provides a photovoltaic module comprising a solar cell as described above.

According to the utility model, by selecting silicon dioxide as the first passivation layer between the substrate and the N-type doped layer and zinc sulfide as the N-type doped layer, the surface reflection can be effectively reduced, the surface recombination rate can be further reduced, the light trapping effect can be enhanced, and the service life of carriers can be prolonged to improve the electrical performance of the substrate. The solar cell having this structure achieves high external quantum efficiency, spectral response in a short wavelength range (ultraviolet region), low transmittance of photons of a long wavelength (near infrared region), and little attenuation caused by ultraviolet rays.

Drawings

Fig. 1 is a schematic view of a solar cell structure according to an embodiment of the present utility model;

FIG. 2 is a graph showing the reflectance, absorptivity and external quantum response test result of the solar cell structure of example 1;

FIG. 3 is an IV curve of the solar cell structure of example 1;

reference numerals illustrate: 10: a solar cell; 100: a substrate; 110: a first passivation layer; 120: an N-type doped zinc sulfide layer; 130: a first transparent conductive oxide layer; 140: a second passivation layer; 150: a P-type doped layer; 160: a second transparent conductive oxide layer; 170: a first electrode; 180: and a second electrode.

Detailed Description

The present utility model may be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete. They are, of course, merely examples and are not intended to limit the utility model. Furthermore, the present utility model may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.

In describing positional relationships, when an element such as a layer, film or substrate is referred to as being "on" another film layer, it can be directly on the other film layer or intervening film layers may also be present, unless otherwise indicated. Further, when a layer is referred to as being "under" another layer, it can be directly under, or one or more intervening layers may also be present. It will also be understood that when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present.

It will be understood that when an element or layer is referred to as being "on," "adjacent," "connected to," or "coupled to" another element or layer, it can be directly on, adjacent, connected, or coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" another element or layer, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present utility model.

Spatially relative terms, such as "under," "below," "beneath," "under," "above," "over," and the like, may be used herein for ease of description to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use and operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements or features described as "under" or "beneath" other elements would then be oriented "on" the other elements or features. Thus, the exemplary terms "below" and "under" may include both an upper and a lower orientation. The device may be otherwise oriented (rotated 90 degrees or other orientations) and the spatially relative descriptors used herein interpreted accordingly.

Furthermore, the drawings are not to scale 1:1, and the relative dimensions of the various elements are merely drawn by way of example in the drawings to facilitate an understanding of the utility model, but are not necessarily drawn to true scale, the proportions in the drawings not being limiting to the utility model. It will be understood that when an element is referred to as being "on," "connected to," "coupled to," or "contacting" another element, it can be directly on, connected or coupled to, or contacting the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly on," "directly connected to," "directly coupled to," or "directly contacting" another element, there are no intervening elements present. Likewise, when a first element is referred to as being "electrically contacted" or "electrically coupled" to a second element, there are electrical paths between the first element and the second element that allow current to flow. The electrical path may include a capacitor, a coupled inductor, and/or other components that allow current to flow even without direct contact between conductive components.

As shown in fig. 1, the present utility model provides a solar cell 10 including the following structure:

a substrate 100, the substrate 100 having opposing first and second surfaces;

a first passivation layer 110, an N-type doped zinc sulfide layer 120, and a first transparent conductive oxide layer 130 sequentially stacked on a first surface of the substrate 100, and a second passivation layer 140, a P-type doped layer 150, and a second transparent conductive oxide layer 160 sequentially stacked on a second surface of the substrate 100; wherein the first passivation layer 110 comprises a silicon dioxide passivation layer.

In the present utility model, by selecting silicon dioxide as the first passivation layer 110 between the substrate 100 and the N-doped zinc sulfide layer 120 and using zinc sulfide as the N-doped layer, surface reflection can be effectively reduced, surface recombination rate can be further reduced, light trapping effect can be enhanced, and carrier lifetime can be improved to improve electrical performance of the substrate 100. The solar cell 10 having this structure achieves high external quantum efficiency, spectral response in a short wavelength range (ultraviolet region), low transmittance of photons of a long wavelength (near infrared region), and little attenuation caused by ultraviolet rays.

The conventional silicon-based heterojunction solar cell is susceptible to ultraviolet rays due to the presence of hydrogen atoms at the interface between the hydrogenated intrinsic amorphous silicon layer and the crystalline silicon layer. When exposed to sunlight, hydrogen atoms can be excited and diffuse into most silicon-based substrates, resulting in the formation of defects such as dangling bonds and hydrogenated vacancies. These defects can recombine carriers, reduce minority carrier lifetime, and reduce cell efficiency.

Solar cells based on zinc sulphide do not present this problem, since they do not contain hydrogen atoms in their structure. Zinc sulfide (ZnS) is a wide bandgap (3.6-3.7 eV) semiconductor material that has been widely studied for its potential use in solar cells. Zinc sulfide is a highly transparent material in the visible range of the electromagnetic spectrum, a property that makes it an ideal candidate for use as a window layer for solar cells. Zinc sulphide has a very high electron mobility, i.e. electrons can easily move in the material, which is very important for efficient charge transport in solar cells. Zinc sulfide has chemical stability, so that the zinc sulfide can reduce attenuation of exposure to the environment, and can maintain long-term stability of the solar cell. In addition, zinc sulfide has a wider band gap and higher electron affinity than hydrogenated doped microcrystalline silicon, which helps to reduce recombination of photogenerated carriers and improve cell efficiency. Zinc sulfide is a relatively low cost material and is attractive for commercial solar cell fabrication.

Further, the substrate 100 is an n-type single crystal silicon wafer (c-Si wafer), and the resistivity of the substrate 100 is preferably 0.3 to 7. Omega. Cm, the thickness is preferably 50 to 150. Mu.m,<100>crystal orientation, area>100cm ² 。

In one specific example, the thickness of the first passivation layer 110 is 1nm to 5nm. Specifically, the thickness of the first passivation layer 110 may be, but is not limited to, 1nm, 2nm, 3nm, 4nm, or 5nm.

In one specific example, the thickness of the N-doped zinc sulfide layer 120 is 5nm to 25nm. Specifically, the thickness of the N-type doped zinc sulfide layer 120 may be, but is not limited to, 5nm, 10nm, 15nm, 20nm, or 25nm.

In one specific example, the first surface is a textured surface and the second surface is a polished surface.

It will be appreciated that the first surface is textured to enhance light trapping and absorption in the solar cell 10, while the second surface is polished to enhance reflection of internal long wavelength photons to reduce transmission thereof.

In one specific example, the second passivation layer 140 includes a silicon oxide passivation layer or a hydrogenated intrinsic amorphous silicon passivation layer.

Preferably, the second passivation layer 140 is a silicon dioxide passivation layer, and it is understood that silicon dioxide may improve the electrical performance of the substrate 100 by reducing the surface recombination rate and increasing the carrier lifetime, and may also reduce surface reflection, enhance the light trapping effect, and thereby increase light absorption to improve device performance.

In a specific example, the thickness of the second passivation layer 140 is 1nm to 15nm. Further, the thickness of the second passivation layer 140 may be, but is not limited to, 1nm, 2nm, 3nm, 4nm, 5nm, 6nm, 7nm, 8nm, 9nm, 11nm, 12nm, 13nm, 14nm, or 15nm.

It is understood that the thickness of the first passivation layer 110 is less than or equal to the thickness of the second passivation layer 140.

In one specific example, the P-doped layer 150 comprises a P-hydrogenated doped microcrystalline silicon layer or a P-doped nickel oxide layer.

Preferably, the P-doped layer 150 is a P-doped nickel oxide layer, since nickel oxide has a very high work function (5.0 eV), such as a relatively high work function compared to single crystal/polysilicon, copper indium gallium selenide, and cadmium telluride, poly (3-hexylthiophene), and the like, the nickel oxide is beneficial to achieving efficient hole extraction, and in addition, can form selective contact for carriers that is beneficial to hole transport but blocks electron transport, thereby enhancing separation of photo-generated electron-hole pairs, helping to reduce recombination losses, and enabling the cell to have higher efficiency.

Further, nickel oxide (NiOx) has good grading, conductivity, solution processability, stability, and cost effectiveness, and in particular, nickel oxide has a suitable energy grading that can achieve efficient hole extraction and electron blocking in solar cell structures, helping to reduce recombination losses and improve charge collection. Nickel oxide has a relatively high conductivity and enables efficient charge transport in the P-type layer, which also contributes to improved device performance. Nickel oxide has good solution processability and can be deposited by solution technology, so that a large-area, economical and efficient manufacturing process can be adopted. Whereas single crystal/polycrystalline silicon, copper indium gallium selenide, and cadmium telluride generally require more complex manufacturing methods. Nickel oxide has good chemical stability and thermal stability compared with some organic materials which are easier to degrade, such as poly (3-hexylthiophene), and the like, and can ensure the long-term performance of the nickel oxide in solar cell equipment. Nickel oxide is based on nickel, which is a rich and relatively low cost element that helps to increase the cost effectiveness of nickel oxide-based equipment compared to materials such as molybdenum oxide and vanadium oxide, which have limited reserves and high material costs.

In one specific example, the thickness of the P-doped layer 150 is 5nm to 50nm. Specifically, the thickness of the P-type doped layer 150 may be, but is not limited to, 5nm, 10nm, 15nm, 20nm, 25nm, 30nm, 35nm, 40nm, 45nm, or 50nm.

In one specific example, the first transparent conductive oxide layer 130 and the second transparent conductive oxide layer 160 each independently include one or more of, but are not limited to, an indium tin oxide layer, a tungsten doped indium oxide layer, a cerium doped indium oxide layer, an aluminum doped zinc oxide layer, an indium doped cadmium oxide layer, and an antimony doped tin oxide layer. It will be appreciated that the first transparent conductive oxide layer 130 and the second transparent conductive oxide layer 160 act as conductive electrodes, which not only helps to reduce reflection of light from the cell surface, but also allows carriers to be extracted quickly while allowing light to pass through.

In one specific example, the thicknesses of the first transparent conductive oxide layer 130 and the second transparent conductive oxide layer 160 are each independently 40nm to 80nm.

Further, the thickness of the first transparent conductive oxide layer 130 is 40nm to 80nm, and the thickness of the second transparent conductive oxide layer 160 is 40nm to 70nm.

Specifically, the thickness of the first transparent conductive oxide layer 130 may be, but is not limited to, 40nm, 45nm, 50nm, 55nm, 60nm, 65nm, 70nm, 75nm, or 80nm. The thickness of the second transparent conductive oxide layer 160 may be, but is not limited to, 40nm, 45nm, 50nm, 55nm, 60nm, 65nm, or 70nm.

In a specific example, a first electrode 170 disposed on the first transparent conductive oxide layer 130 and a second electrode 180 disposed on the second transparent conductive oxide layer 160 are further included.

It will be appreciated that the first electrode 170 includes a first main grid including 40 to 80 metal grid lines having a width of 30 to 60 μm and a height of 5 to 15 μm, and a first sub grid including 12 to 36 metal grid lines having a width of 50 to 100 μm and a height of 5 to 15 μm, and the cross-sectional shape of the first fine grid and the first main grid is square.

Further, the material of the first electrode 170 includes one or more of silver, copper, aluminum, zinc, nickel, tin, etc., specifically, the first electrode 170 is one or more of silver, copper, aluminum, silver copper, silver aluminum, silver zinc, silver nickel, silver tin, silver copper, silver aluminum, silver zinc, silver nickel, and silver tin, and the resistivity is 10 ^-5 Ω·cm～10 ^-7 Ω·cm。

Further, the second electrode 180 includes a second main gate and a second sub gate, and in particular, the second fine gate includes 100 to 150 metal gate lines having a width of 30 to 60 μm and a height of 5 to 15 μm, the second main gate includes 12 to 36 metal gate lines having a width of 50 to 100 μm and a height of 5 to 15 μm, and the cross-sectional shapes of the second fine gate and the second main gate are square.

In a specific example, the material of the second electrode 180 includes one or more of silver, copper, aluminum, zinc, nickel, tin, and other metals, and specifically, the second electrode 180 is silver, copper, aluminum, silver copper, silver aluminum, silver zinc, silver nickel, silver tin, silver copper clad, silver aluminum clad, silver zinc clad, silver nickel cladAnd one or more of silver-coated tin, with a resistivity of 10 ^-5 Ω·cm～10 ^-7 Ω·cm。

Further, the utility model also provides a preparation method of the solar cell 10, which comprises the following steps:

providing a substrate 100;

a first passivation layer 110, an N-type doped zinc sulfide layer 120, and a first transparent conductive oxide layer 130 are sequentially prepared on a first surface of the substrate 100, and a second passivation layer 140, a P-type doped layer 150, and a second transparent conductive oxide layer 160 are sequentially prepared on a second surface of the substrate 100.

It will be appreciated that preparing the first passivation layer 110 on the first surface of the substrate 100 may further include preparing the substrate 100 with a textured first surface, including a texturing process in a dilute alkali solution using an anisotropic wet etching process. The substrate 100 is then rinsed by RCA standard rinsing, specifically deionized water, RCAl, deionized water and RCA2 and deionized water in sequence.

Further, RCA standard cleaning is a two-step process using a cleaning solution comprising deionized water, hydrogen peroxide (H ₂ O ₂ ) Ammonia monohydrate (NH) ₃ ·H ₂ O) and hydrochloric acid (HCl) and the like. The two main solutions used for RCA cleaning are commonly referred to as RCA1 (solution No. 1) and RCA2 (solution No. 2).

Further, when the texturing is performed, the surface of the silicon wafer, which is not required to be textured, is protected from the etching solution so as to prevent unnecessary damage to the polished surface. The single sided texturing step is typically accomplished by using a mask or protective layer that covers the silicon wafer during etching. The mask or protective layer may be made of various materials such as photoresist, paraffin wax, or high molecular polymer, etc. In addition to using a mask or protective layer to shield surfaces that do not require texturing, there is another method of single-sided etching, i.e., immersing the surface of the wafer on the side that does require texturing in an etching solution, while the surface on the side that does not require texturing is covered with a water film. The depth of the etching solution is very shallow, and the covering of a water film on the surface of one side which does not need to be textured is not influenced, but simultaneously, a good etching effect can be provided for the surface which needs to be textured.

It will be appreciated that the second passivation layer 140 on the second surface of the substrate 100 may further include a polishing process on a side surface of the substrate 100 to be polished, and in particular, the polishing process may include one or both of mechanical polishing and chemical polishing. Wherein the mechanical polishing flatness is higher; chemical polishing is usually performed by using a mixed corrosive liquid of nitric acid and hydrofluoric acid, but the flatness is poor; chemical-mechanical polishing (CMP) utilizes the simultaneous effect of polishing solution on chemical corrosion and mechanical grinding of silicon wafer surface, and has the advantages of both chemical polishing and mechanical polishing, the polishing solution is typically colloid solution composed of polishing powder and sodium hydroxide solution, and the polishing powder is typically SiO ₂ 。

In one specific example, the method of preparing the first passivation layer 110 and the second passivation layer 140 may be, but is not limited to, atomic Layer Deposition (ALD), plasma Enhanced Chemical Vapor Deposition (PECVD), low Pressure Chemical Vapor Deposition (LPCVD), thermal oxidation, or sol-gel deposition.

In one specific example, the method of preparing the N-doped zinc sulfide layer 120 may be, but is not limited to, chemical Bath Deposition (CBD), atomic Layer Deposition (ALD), pulsed Laser Deposition (PLD), or Spray Pyrolysis (SP).

In one specific example, the method of fabricating P-doped layer 150 may be, but is not limited to, chemical Vapor Deposition (CVD), magnetron sputtering Physical Vapor Deposition (PVD), or reactive physical vapor deposition (RPD).

In one specific example, the first transparent conductive oxide layer 130 and the second transparent conductive oxide layer 160 are each independently selected from the group that may be, but are not limited to, magnetron sputtering (PVD), evaporation (evapration), or Chemical Vapor Deposition (CVD).

Further, the methods of the first electrode 170 and the second electrode 180 are each independently selected from the group consisting of, but not limited to, screen printing, electroplating, laser transfer, mask sputtering, or mask evaporation.

Specific examples and comparative examples are provided below to describe the solar cell 10 of the present utility model in further detail. The raw materials according to the following embodiments may be commercially available unless otherwise specified.

Example 1

The embodiment provides a solar cell structure, which comprises a substrate, wherein the substrate is a commercially available N-type c-Si silicon wafer with a crystal growth by a modified Siemens method (Czochralski), a first surface of the substrate is textured, a silicon dioxide layer with the thickness of 1nm is sequentially prepared on the textured surface to serve as a first passivation layer, an N-type doped zinc sulfide layer with the thickness of 8nm and Indium Tin Oxide (ITO) with the thickness of 50nm serve as a first transparent conductive oxide layer, a second surface of the substrate is polished, a silicon dioxide layer with the thickness of 1nm serves as a second passivation layer, a P-type doped nickel oxide layer with the thickness of 30nm serves as a P-type doped layer, and Indium Tin Oxide (ITO) with the thickness of 40nm serves as a second transparent conductive oxide layer. The first electrode is silver/copper/aluminum/silver copper/silver aluminum/silver zinc/silver nickel/silver tin/silver coated copper/silver coated aluminum/silver coated zinc/silver coated nickel/silver coated tin, etc., and has a resistivity of 10 ^-5 Ω·cm～10 ^-7 Omega cm, the first electrode comprises a first main grid and a first auxiliary grid, specifically, the first fine grid comprises 40-80 metal grid lines with the width of 30-60 μm and the height of 5-15 μm, and the first main grid comprises 12-36 metal grid lines with the width of 50-100 μm and the height of 5-15 μm. The second electrode is silver/copper/aluminum/silver copper/silver aluminum/silver zinc/silver nickel/silver tin/silver coated copper/silver coated aluminum/silver coated zinc/silver coated nickel/silver coated tin, etc., and has a resistivity of 10 ^-5 Ω·cm～10 ^-7 Omega cm. The second electrode includes a second main gate and a second sub gate, and specifically, the second fine gate includes 100 to 150 metal gate lines having a width of 30 to 60 μm and a height of 5 to 15 μm, and the second main gate includes 12 to 36 metal gate lines having a width of 50 to 100 μm and a height of 5 to 15 μm.

The solar cell provided in this example was tested, and the test results are shown in fig. 2 and 3, and the reflectance and external quantum response study result table in fig. 2It is clear that higher external quantum efficiency EQE and absorption in the short wavelength range will lead to higher short circuit current density, resulting in improved solar cell efficiency. The figure also shows a higher reflection from 900nm to 1200nm, which means a lower transmittance in this range. At present, silicon solar cells are developed in the direction of flaking, the utilization rate of long wave bands is also reduced, and the structure well relieves the problem. FIG. 3 shows the IV curve of the structured cell with a Jsc exceeding 40.25mA/cm ² I.e., higher short circuit current density, indicates less recombination of electrons and holes and better charge separation efficiency of the battery.

Example 2

The embodiment provides a solar cell structure, which comprises a substrate, wherein the substrate is a commercially available N-type c-Si silicon wafer with a crystal growth by a modified Siemens method (Czochralski), a first surface of the substrate is textured, a silicon dioxide layer with the thickness of 1nm is sequentially prepared on the textured surface to serve as a first passivation layer, an N-type doped zinc sulfide layer with the thickness of 25nm and Indium Tin Oxide (ITO) with the thickness of 70nm serve as a first transparent conductive oxide layer, a second surface of the substrate is polished, a hydrogenated intrinsic amorphous silicon layer with the thickness of 5nm serves as a second passivation layer, and a P-type hydrogenated doped microcrystalline silicon layer with the thickness of 20nm serves as a P-type doped layer and Indium Tin Oxide (ITO) with the thickness of 50nm serves as a second transparent conductive oxide layer. The first electrode is silver/copper/aluminum/silver copper/silver aluminum/silver zinc/silver nickel/silver tin/silver coated copper/silver coated aluminum/silver coated zinc/silver coated nickel/silver coated tin, etc., and has a resistivity of 10 ^-5 Ω·cm～10 ^-7 Omega cm, the first electrode comprises a first main grid and a first auxiliary grid, specifically, the first fine grid comprises 40-80 metal grid lines with the width of 30-60 μm and the height of 5-15 μm, and the first main grid comprises 12-36 metal grid lines with the width of 50-100 μm and the height of 5-15 μm. The second electrode is silver/copper/aluminum/silver copper/silver aluminum/silver zinc/silver nickel/silver tin/silver coated copper/silver coated aluminum/silver coated zinc/silver coated nickel/silver coated tin, etc., and has a resistivity of 10 ^-5 Ω·cm～10 ^-7 Omega cm. The second electrode comprises a second main gate and a second auxiliary gate, in particular, the second fine gate comprises a number of100-150 metal grid lines with the width of 30-60 mu m and the height of 5-15 mu m, wherein the second main grid comprises 12-36 metal grid lines with the width of 50-100 mu m and the height of 5-15 mu m.

Example 3

The embodiment provides a solar cell structure, which comprises a substrate, wherein the substrate is a commercially available N-type c-Si silicon wafer grown by a modified Siemens method (Czochralski), a first surface of the substrate is textured, a silicon dioxide layer with the thickness of 2nm is sequentially prepared on the textured surface to serve as a first passivation layer, an N-type doped zinc sulfide layer with the thickness of 25nm and tungsten doped indium oxide (IWO) with the thickness of 80nm serve as a first transparent conductive oxide layer, a second surface of the substrate is polished, a hydrogenated intrinsic amorphous silicon layer with the thickness of 8nm serves as a second passivation layer, a P-type doped nickel oxide layer with the thickness of 25nm serves as a P-type doped layer and Indium Tin Oxide (ITO) with the thickness of 55nm serves as a second transparent conductive oxide layer. The first electrode is silver/copper/aluminum/silver copper/silver aluminum/silver zinc/silver nickel/silver tin/silver coated copper/silver coated aluminum/silver coated zinc/silver coated nickel/silver coated tin, etc., and has a resistivity of 10 ^-5 Ω·cm～10 ^-7 Omega cm, the first electrode comprises a first main grid and a first auxiliary grid, specifically, the first fine grid comprises 40-80 metal grid lines with the width of 30-60 μm and the height of 5-15 μm, and the first main grid comprises 12-36 metal grid lines with the width of 50-100 μm and the height of 5-15 μm. The second electrode is silver/copper/aluminum/silver copper/silver aluminum/silver zinc/silver nickel/silver tin/silver coated copper/silver coated aluminum/silver coated zinc/silver coated nickel/silver coated tin, etc., and has a resistivity of 10 ^-5 Ω·cm～10 ^-7 Omega cm. The second electrode includes a second main gate and a second sub gate, and specifically, the second fine gate includes 100 to 150 metal gate lines having a width of 30 to 60 μm and a height of 5 to 15 μm, and the second main gate includes 12 to 36 metal gate lines having a width of 50 to 100 μm and a height of 5 to 15 μm.

Example 4

The embodiment provides a solar cell structure comprising a substrate of commercially available n-type c-Si grown by improved Siemens method (Czochralski)And (3) a silicon wafer, wherein the first surface of the substrate is subjected to texturing, a silicon dioxide layer with the thickness of 2nm is sequentially prepared on the textured surface to serve as a first passivation layer, an N-type doped zinc sulfide layer with the thickness of 15nm and cerium doped indium oxide (ICO) with the thickness of 50nm are sequentially prepared on the textured surface to serve as a first transparent conductive oxide layer, the second surface of the substrate is polished, a silicon dioxide layer with the thickness of 2nm is sequentially prepared on the polished surface to serve as a second passivation layer, a P-type hydrogenated doped microcrystalline silicon layer with the thickness of 25nm is sequentially prepared on the polished surface to serve as a P-type doped layer, and Indium Tin Oxide (ITO) with the thickness of 70nm is sequentially prepared on the polished surface to serve as a second transparent conductive oxide layer. The first electrode is silver/copper/aluminum/silver copper/silver aluminum/silver zinc/silver nickel/silver tin/silver coated copper/silver coated aluminum/silver coated zinc/silver coated nickel/silver coated tin, etc., and has a resistivity of 10 ^-5 Ω·cm～10 ^-7 Omega cm, the first electrode comprises a first main grid and a first auxiliary grid, specifically, the first fine grid comprises 40-80 metal grid lines with the width of 30-60 μm and the height of 5-15 μm, and the first main grid comprises 12-36 metal grid lines with the width of 50-100 μm and the height of 5-15 μm. The second electrode is silver/copper/aluminum/silver copper/silver aluminum/silver zinc/silver nickel/silver tin/silver coated copper/silver coated aluminum/silver coated zinc/silver coated nickel/silver coated tin, etc., and has a resistivity of 10 ^-5 Ω·cm～10 ^-7 Omega cm. The second electrode includes a second main gate and a second sub gate, and specifically, the second fine gate includes 100 to 150 metal gate lines having a width of 30 to 60 μm and a height of 5 to 15 μm, and the second main gate includes 12 to 36 metal gate lines having a width of 50 to 100 μm and a height of 5 to 15 μm.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this utility model belongs. The terminology used herein in the description of the utility model is for the purpose of describing particular embodiments only and is not intended to be limiting of the utility model. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.

The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.

The above examples merely illustrate a few embodiments of the present utility model, which are convenient for a specific and detailed understanding of the technical solutions of the present utility model, but should not be construed as limiting the scope of the claims. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the utility model, which are all within the scope of the utility model. It should be understood that those skilled in the art, based on the technical solutions provided by the present utility model, can obtain technical solutions through logical analysis, reasoning or limited experiments, all fall within the protection scope of the appended claims. The scope of the patent of the utility model should therefore be determined with reference to the appended claims, which are to be construed as in accordance with the doctrines of claim interpretation.

Claims

1. A solar cell comprising the structure:

a substrate having opposed first and second surfaces;

2. The solar cell of claim 1, wherein the first surface is a textured surface and the second surface is a polished surface.

3. The solar cell of claim 1, wherein the second passivation layer comprises a silicon dioxide passivation layer or a hydrogenated intrinsic amorphous silicon passivation layer.

4. The solar cell of claim 3, wherein the second passivation layer has a thickness of 1nm to 15nm.

5. The solar cell of claim 1, wherein the P-doped layer comprises a P-hydrogenated doped microcrystalline silicon layer or a P-doped nickel oxide layer.

6. The solar cell of claim 5, wherein the P-doped layer has a thickness of 5nm to 50nm.

7. The solar cell of claim 1, wherein the first transparent conductive oxide layer and the second transparent conductive oxide layer each independently comprise one or more of an indium tin oxide layer, a tungsten doped indium oxide layer, a cerium doped indium oxide layer, an aluminum doped zinc oxide layer, an indium doped cadmium oxide layer, and an antimony doped tin oxide layer.

8. The solar cell according to claim 7, wherein the thickness of the first transparent conductive oxide layer and/or the second transparent conductive oxide layer is 40nm to 80nm.

9. The solar cell of any one of claims 1-8, wherein the N-doped zinc sulfide layer has a thickness of 5nm to 25nm.

10. The solar cell according to any of claims 1-8, wherein the thickness of the first passivation layer is 1nm to 5nm.

11. A photovoltaic module comprising a solar cell according to any one of claims 1 to 10.