CN220730363U - General input/output electric characteristic parameter testing circuit - Google Patents
General input/output electric characteristic parameter testing circuit Download PDFInfo
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Abstract
The application relates to the field of chip testing, and discloses a general input/output electrical characteristic parameter testing circuit which can test performance parameters of input/output of a chip under different voltages. The test circuit includes a board configured to be coupled to a chip having a plurality of general purpose input-output interfaces. A universal input output interface configured to be coupled to the signal generator, the plurality of channels of the oscilloscope, and the electronic load instrument, respectively.
Description
Technical Field
The application relates to the field of chip testing, in particular to a general input/output electrical characteristic parameter testing circuit.
Background
GPIO (general purpose input/Output) is a general purpose input/Output interface for connecting a computer system and external devices. The digital electric interface can realize the input and output of data by controlling the level. The GPIO electrical index (electrical characteristic parameter) refers to some important electrical parameters of the GPIO interface, including voltage, current, power consumption, etc
The voltage of the GPIO refers to the voltage level on the GPIO interface. In general, the voltage of the GPIO interface may be 3.3V or 5V, depending on the hardware platform used. When GPIO is used, an appropriate voltage level needs to be selected according to the voltage requirements of the external device. If the voltages do not match, equipment damage or data transmission errors may result.
The current of the GPIO refers to the magnitude of the current through the GPIO interface. The current of a GPIO interface is generally of two types: an input current and an output current. The input current refers to the maximum current that the GPIO interface can accept when an external device inputs a signal to the GPIO interface. The output current refers to the maximum current that the GPIO interface can provide when the GPIO interface outputs a signal. When using a GPIO interface, it is necessary to select an appropriate GPIO interface according to the current requirements of the external device.
The power consumption of GPIO refers to the power consumed when using a GPIO interface. Power consumption is an important indicator, especially in mobile devices and embedded systems. Higher power consumption may lead to problems with device heating, reduced battery life, etc. Therefore, when designing and using GPIO interfaces, it is necessary to reduce power consumption as much as possible and improve the energy efficiency of the system.
In addition to the above several main electrical metrics, there are other metrics that need to be considered. Such as the input and output resistances of the GPIOs, the level ranges of the inputs and outputs, the delays of the inputs and outputs, etc. These indicators are also important to ensure accurate transmission of data and proper operation of the device.
The GPIO electrical index is an important index for evaluating the performance and applicability of the GPIO interface, and when the GPIO interface is used, appropriate parameters such as voltage, current, power consumption and the like need to be selected according to the requirements of external equipment. At the same time, other electrical indexes are also required to be considered so as to ensure accurate transmission of data and normal operation of the equipment. By reasonably selecting and using the GPIO interface, efficient connection and data interaction between the computer system and external equipment can be realized. Therefore, it is necessary to test the electrical characteristic parameters of the GPIO.
Disclosure of Invention
The utility model aims to provide a general input/output electrical characteristic parameter testing circuit which can test the performance parameters of the input/output of a chip under different voltages.
The application discloses general input output electrical characteristic parameter test circuit includes:
a plugboard (1) configured to be coupled to a chip (2), the chip (2) being provided with a plurality of universal input-output interfaces (3);
the universal input output interface (3) is configured to be coupled to a signal generator (4), a plurality of channels of an oscilloscope (5), and an electronic load instrument (6), respectively.
In a preferred embodiment, the universal input/output interface (3) comprises a first universal input/output interface (31), a second universal input/output interface (32), a third universal input/output interface (33), a fourth universal input/output interface (34) and a fifth universal input/output interface (35).
In a preferred embodiment, the oscilloscope (5) comprises a first channel (51), a second channel (52), a third channel (53) and a fourth channel (54).
In a preferred embodiment, the second common input output interface (32) is coupled to a first terminal of a capacitor, a second terminal of the capacitor being coupled to ground;
the second universal input output interface (32) is coupled to the second channel (52) of the oscilloscope (5).
In a preferred embodiment, the capacitance is 37pF.
In a preferred embodiment, the third pass input output interface (33) is coupled to a first end of a first resistor, a second end of the first resistor being coupled to ground;
the third universal input output interface (33) is coupled to the third channel (53) of the oscilloscope (5).
In a preferred embodiment, the first resistance is 51k ohms.
In a preferred embodiment, the fourth universal input output interface (34) is coupled to a first end of a second resistor, the second end of the second resistor being coupled to a reference power supply;
the fourth common input output interface (34) is coupled to the fourth channel (54) of the oscilloscope (5).
In a preferred embodiment, the second resistance is 51k ohms.
In a preferred embodiment, the first general purpose input output interface (31) is coupled to the signal generator (4) and the first channel (51) of the oscilloscope (5).
In this embodiment, through a picture peg adaptation chip that awaits measuring, GPIO interface connection to signal generator on the chip that awaits measuring, oscilloscope and electronic load appearance, signal generator is through the sine wave to GPI0 interface input, first general purpose input output interface and second general purpose input output interface are connected to the first passageway and the second passageway of oscilloscope, can observe input high level threshold and input low level threshold simultaneously, electronic load appearance can be to the electric current of GPIO interface input different gears, supply power according to the condition for the chip respectively, observe the voltage value of IO through the oscilloscope, thereby through configuration signal generator, electronic load appearance and oscilloscope can test the electrical characteristic parameter of GPIO under various conditions through the connection of this application.
In the present application, a number of technical features are described in the specification, and are distributed in each technical solution, which makes the specification too lengthy if all possible combinations of technical features (i.e. technical solutions) of the present application are to be listed. In order to avoid this problem, the technical features disclosed in the above summary of the present application, the technical features disclosed in the following embodiments and examples, and the technical features disclosed in the drawings may be freely combined with each other to constitute various new technical solutions (these technical solutions are all regarded as being already described in the present specification) unless such a combination of technical features is technically impossible. For example, in one example, feature a+b+c is disclosed, in another example, feature a+b+d+e is disclosed, and features C and D are equivalent technical means that perform the same function, technically only by alternative use, and may not be adopted simultaneously, feature E may be technically combined with feature C, and then the solution of a+b+c+d should not be considered as already described because of technical impossibility, and the solution of a+b+c+e should be considered as already described.
Drawings
Fig. 1 is a schematic circuit configuration diagram of a general input-output electrical characteristic parameter test circuit according to an embodiment of the present application.
Reference numerals illustrate:
1-inserting plates; 2-chip; 3-universal input/output interface; 31-a first universal input output interface; 32-a second general input-output interface; 33-third universal input/output interface; 34-fourth universal input/output interface; 35-a fifth universal input output interface; a 4-signal generator; 5-oscilloscopes; 51-first channel; 52-a second channel; 53-a third channel; 54-fourth channel; 6-electronic loadometer.
Detailed Description
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application. However, it will be understood by those skilled in the art that the claimed utility model may be practiced without these specific details and with various changes and modifications from the embodiments that follow.
Description of the terms:
as used herein, V IH For inputting a high threshold. V (V) IL For inputting a low level threshold. V (V) OH To output a high threshold. V (V) OL To output a low level threshold. R is R PU And the equivalent resistance value is pulled up for the interior of the GPIO interface. R is R PD The equivalent resistance value is pulled down for the interior of the GPIO interface. t is t fout Is the falling edge of the GPIO output. t is t rout Is the rising edge of the GPIO output.
As used herein, "GPIO interface" and "universal input output interface" may be used interchangeably.
For the purpose of making the objects, technical solutions and advantages of the present application more apparent, embodiments of the present application will be described in further detail below with reference to the accompanying drawings.
The circuit structure diagram of the circuit is shown in figure 1, and the circuit comprises a plugboard 1 and a universal input/output interface 3.
The board 1 is coupled to a chip 2, and a plurality of general input/output interfaces 3 are provided on the chip 2. The universal input output interface 3 is configured to be coupled to a signal generator 4, a plurality of channels of an oscilloscope 5, and an electronic load meter 6, respectively.
In an alternative embodiment, the chip 2 is a micro control unit.
In an alternative embodiment, the power supply is further included for powering the general purpose input output electrical characteristic parameter testing circuit.
In an alternative embodiment, the universal input output interface 3 comprises a first universal input output interface 31, a second universal input output interface 32, a third universal input output interface 33, a fourth universal input output interface 34, and a fifth universal input output interface 35.
In an alternative embodiment, oscilloscope 5 includes a first channel 51, a second channel 52, a third channel 53, and a fourth channel 54.
In an alternative embodiment, the second universal input output interface 32 is coupled to a first end of a capacitor, a second end of the capacitor is coupled to ground, and the second universal input output interface 32 is coupled to the second channel 52 of the oscilloscope 5.
In an alternative embodiment, the capacitance is 37pF.
In an alternative embodiment, a third pass input output interface 33 is coupled to a first end of a first resistor, a second end of the first resistor is coupled to ground, and the third pass input output interface 33 is coupled to a third channel 53 of the oscilloscope 5.
In an alternative embodiment, the first resistance is 51k ohms.
In an alternative embodiment, the fourth universal input output interface 34 is coupled to a first end of a second resistor, a second end of the second resistor is coupled to a reference power supply, and the fourth universal input output interface 34 is coupled to a fourth channel 54 of the oscilloscope 5.
In an alternative embodiment, the second resistance is 51k ohms.
In an alternative embodiment, the first general purpose input output interface 31 is coupled to the signal generator 4 and the first channel 51 of the oscilloscope 5.
In order to better understand the technical solutions of the present application, the following description is given with reference to a specific example, in which details are listed mainly for the sake of understanding, and are not meant to limit the scope of protection of the present application.
The plug board 1 is electrified through a power supply, the MCU micro-control unit is plugged into the plug board 1, and the MCU is provided with 5 general input/output interfaces 3, namely a first general input/output interface 31, a second general input/output interface 32, a third general input/output interface 33, a fourth general input/output interface 34 and a fifth general input/output interface 35. The first general input/output interface 31 is connected to the signal generator 4, and the signal generator 4 sets a sine wave of frequency 100Hz and amplitude VDD to be input to the first general input/output interface 31. The first general input output interface 31 is also connected to the first channel 51 of the oscilloscope 5 for observing the signals input by the signal generator 4 to the first general input output interface 31.
The second universal input output interface 32 is connected to the second channel 52 of the oscilloscope 5, and is further coupled to a capacitor of 37pF, through which it is connected to ground, over the connection of the second universal input output interface 32 to the second channel 52.
The third pass input output interface 33 is connected to the third channel 53 of the oscilloscope 5 and is further coupled to a first resistor of 51k ohms through which the connection circuit of the third pass input output interface 33 and the third channel 53 is connected to ground.
The fourth common input output interface 34 is connected to the fourth channel 54 of the oscilloscope 5, and is further coupled to a second resistor of 51k ohms, through which it is connected to a reference power supply, over the connection between the fourth common input output interface 34 and the fourth channel 54.
The fifth general input output interface 35 is connected to the electronic load instrument 6. The positive end of the electronic load instrument 6 is connected with the fifth general input/output interface 35, the negative end of the electronic load instrument 6 is grounded, and the voltage value is observed through the oscilloscope 5.
The connection can be used for testing V IH 、V IL 、V OH 、V OL 、R PU 、R PD 、t fout And t rout 。
It should be noted that in the present patent application, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element. In the present patent application, if it is mentioned that an action is performed according to an element, it means that the action is performed at least according to the element, and two cases are included: the act is performed solely on the basis of the element and is performed on the basis of the element and other elements. Multiple, etc. expressions include 2, 2 times, 2, and 2 or more, 2 or more times, 2 or more.
All documents mentioned in the present application are considered to be included in the disclosure of the present application in their entirety, so that they may be subject to modification if necessary. Further, it will be understood that various changes or modifications may be made to the present application by those skilled in the art after reading the foregoing disclosure of the present application, and such equivalents are intended to fall within the scope of the present application as claimed.
Claims (10)
1. A universal input output electrical characteristic parameter test circuit, comprising:
a plugboard (1) configured to be coupled to a chip (2), the chip (2) being provided with a plurality of universal input-output interfaces (3);
the universal input output interface (3) is configured to be coupled to a signal generator (4), a plurality of channels of an oscilloscope (5), and an electronic load instrument (6), respectively.
2. The universal input output electrical characteristic parameter testing circuit according to claim 1, wherein the universal input output interface (3) comprises a first universal input output interface (31), a second universal input output interface (32), a third universal input output interface (33), a fourth universal input output interface (34) and a fifth universal input output interface (35).
3. The universal input output electrical characteristic parameter testing circuit according to claim 2, wherein the oscilloscope (5) comprises a first channel (51), a second channel (52), a third channel (53) and a fourth channel (54).
4. A universal input output electrical characteristic parameter testing circuit according to claim 3, wherein the second universal input output interface (32) is coupled to a first terminal of a capacitor, a second terminal of the capacitor being coupled to ground;
the second universal input output interface (32) is coupled to the second channel (52) of the oscilloscope (5).
5. The universal input output electrical characteristic parameter testing circuit according to claim 4, wherein the capacitance is 37pF.
6. A universal input output electrical characteristic parameter testing circuit according to claim 3, wherein the third universal input output interface (33) is coupled to a first terminal of a first resistor, a second terminal of the first resistor being coupled to ground;
the third universal input output interface (33) is coupled to the third channel (53) of the oscilloscope (5).
7. The universal input output electrical characteristic parameter testing circuit according to claim 6, wherein the first resistance is 51k ohms.
8. A universal input output electrical characteristic parameter testing circuit according to claim 3, wherein the fourth universal input output interface (34) is coupled to a first end of a second resistor, the second end of the second resistor being coupled to a reference power supply;
the fourth common input output interface (34) is coupled to the fourth channel (54) of the oscilloscope (5).
9. The universal input output electrical characteristic parameter testing circuit according to claim 8, wherein the second resistance is 51k ohms.
10. A universal input output electrical characteristic parameter testing circuit according to claim 3, wherein the first universal input output interface (31) is coupled to the signal generator (4) and the first channel (51) of the oscilloscope (5).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322394599.9U CN220730363U (en) | 2023-09-04 | 2023-09-04 | General input/output electric characteristic parameter testing circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322394599.9U CN220730363U (en) | 2023-09-04 | 2023-09-04 | General input/output electric characteristic parameter testing circuit |
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| Publication Number | Publication Date |
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| CN220730363U true CN220730363U (en) | 2024-04-05 |
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| CN202322394599.9U Active CN220730363U (en) | 2023-09-04 | 2023-09-04 | General input/output electric characteristic parameter testing circuit |
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- 2023-09-04 CN CN202322394599.9U patent/CN220730363U/en active Active
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