CN103905955A - Method and apparatus for detecting insertion of earphones, and interface circuit - Google Patents
Method and apparatus for detecting insertion of earphones, and interface circuit Download PDFInfo
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- CN103905955A CN103905955A CN201210580574.1A CN201210580574A CN103905955A CN 103905955 A CN103905955 A CN 103905955A CN 201210580574 A CN201210580574 A CN 201210580574A CN 103905955 A CN103905955 A CN 103905955A
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Abstract
The invention provides a method and apparatus for detecting insertion of earphones, and an interface circuit. The method comprises: detecting a resistance value between the contact sheets of a right sound channel and a left sound channel of an electronic device insertion hole; and when the detected resistance value is greater than or equal to 32 ohms and is smaller than or equal to 64 ohms, determining that an earphone plug is inserted into the insertion hole. According to the invention, through detecting the resistance value between the left sound channel and the right sound channel of the insertion hole, the problem is solved that an earphone-similar object inserted into the insertion hole or a two-in-one socket is mistaken as earphones, and especially for the earphones and a fiber two-in-one socket, whether the earphone plug is inserted into the insertion hole or a fiber plug is inserted into the insertion hole can be effectively distinguished.
Description
Technical field
The present invention relates to interface circuit technology, relate in particular to a kind of method of Test earphone insertion, device and the interface circuit that Test earphone inserts.
Background technology
At present, along with the development of various hand-hold electronic equipments or home electronics miniaturization, the interface that can expose on electronic equipment is fewer and feweri, makes the interface exposing have more function.As, by adopting two two-in-one modes of interface to reduce interface, still do not reduce again the function of interface.
At present, the jack of earphone just has more function, not only can plugged earphone realizes the function of earphone as the jack of earphone, can also be used to insert optical fiber, communicate, etc.For ease of describing, this earphone jack is referred to as to multifunctional headphone jack.
But such has multi-functional interface and has individual drawback, in the time inserting the plug of a certain function, may be considered to insert the plug of another function.For example, while inserting optical fiber in multifunctional headphone jack, internal circuit can be thought has earphone to insert, and inserts corresponding operation and make with earphone, for example, stop outer sound reproduction sound etc.
Summary of the invention
The invention provides a kind of method of Test earphone insertion, device and the interface circuit that Test earphone inserts, for solving the problem of existing adaptor plug mistake identification.
First aspect, a kind of method that the embodiment of the present invention provides Test earphone to insert, comprising:
Resistance value between the contact chip of the left and right acoustic channels of detected electrons equipment jack;
When the resistance value detecting is more than or equal to 32 ohm and while being less than or equal to 64 ohm, be determined with headset plug and insert described jack.
In conjunction with first aspect, in the possible implementation of the first of first aspect, be determined with before headset plug inserts described jack, also comprise: change the resistance value detecting into magnitude of voltage.
Wherein, change the resistance value detecting into magnitude of voltage, can comprise:
When the resistance value detecting is more than or equal to 32 ohm and while being less than or equal to 64 ohm, change the resistance value detecting into high level output;
When the resistance value detecting is less than 32 ohm or while being greater than 64 ohm, change the resistance value detecting into low level output.
In conjunction with first aspect, in the possible implementation of the second of first aspect, be determined with headset plug and insert described jack, comprising:
If changing the magnitude of voltage obtaining is high level, is determined with headset plug and inserts described jack.
Second aspect, the device that the embodiment of the present invention provides a kind of Test earphone to insert, comprising:
Resistance detecting unit, for detection of the resistance value between the contact chip of the left and right acoustic channels of electronic equipment jack;
Headset plug inserts identifying unit, is more than or equal to 32 ohm and while being less than or equal to 64 ohm for the resistance value detecting when described resistance detecting unit, is determined with headset plug and inserts described jack.
In conjunction with second aspect, in the possible implementation of the first of second aspect, the device that above-mentioned Test earphone inserts also comprises:
Converting unit, is determined with before headset plug inserts described jack for insert identifying unit at described earphone, changes the resistance value detecting into magnitude of voltage.
Wherein, described converting unit can, specifically for be more than or equal to 32 ohm and while being less than or equal to 64 ohm when the resistance value detecting, change the resistance value detecting into high level output; When the resistance value detecting is less than 32 ohm or while being greater than 64 ohm, change the resistance value detecting into low level output.
In conjunction with second aspect, in the possible implementation of the second of second aspect, be high level if described earphone insertion identifying unit changes specifically for described converting unit the magnitude of voltage obtaining, be determined with headset plug and insert described jack.
In conjunction with second aspect, in the third possible implementation of second aspect, be high level if described earphone insertion identifying unit changes specifically for described converting unit the magnitude of voltage obtaining, be determined with headset plug and insert described jack.
In conjunction with second aspect, in the 4th kind of possible implementation of second aspect, described resistance detecting unit comprises:
The first power supply, is connected with the L channel contact chip of described jack;
The first resistance, the resistance of described the first resistance is less than or equal to 32 ohm, and the first end of described the first resistance is connected with the R channel contact chip of described jack, the second end ground connection of described the first resistance.
In the 4th kind of possible implementation of second aspect, described converting unit can comprise:
First window comparator, the input of described first window comparator is connected with the first end of described the first resistance, and the first reference voltage is 1/2 times of described the first supply voltage, and the second reference voltage is 1/3 times of described the first supply voltage.
In conjunction with second aspect, in the 5th kind of possible implementation of second aspect, described resistance detecting unit comprises:
Second source, is connected with the L channel contact chip of described jack;
The second resistance, the resistance of described the first resistance is less than or equal to 64 ohm, and the first end of described the first resistance is connected with the R channel contact chip of described jack, the second end ground connection of described the first resistance.
In the 5th kind of possible implementation of second aspect, described converting unit can comprise:
Second Window comparator, the input of described Second Window comparator is connected with the first end of described the first resistance, and the first reference voltage is 2/3 times of described the first supply voltage, and the second reference voltage is 1/2 times of described the first supply voltage.
In conjunction with second aspect, in the 6th kind of possible implementation of second aspect, described resistance detecting unit comprises:
The 3rd power supply, is connected with the L channel contact chip of described jack;
The 3rd resistance, the resistance of described the 3rd resistance is less than 32 ohm, the second end ground connection of described the 3rd resistance;
The 4th resistance, the resistance of described the 4th resistance is greater than 64 ohm, the second end ground connection of described the 4th resistance;
Analog switch, the first end of described the 3rd resistance is connected with the R channel contact chip of described jack by described analog switch, and the first end of described the 4th resistance is connected with the R channel contact chip of described jack by described analog switch.
In the 6th kind of possible implementation of second aspect, described converting unit can comprise:
The first voltage comparator, inverting input is connected with the first end of described the 3rd resistance, and reference input voltage is 1/2 times of described the 3rd power supply;
Second voltage comparator, input is connected with the first end of described the 4th resistance, and anti-phase reference input voltage is 1/2 times of described the 3rd power supply;
Transistor, described transistorized control end is connected with the output of described the first voltage comparator, the output of second voltage comparator.
In conjunction with second aspect, in the 7th kind of possible implementation of second aspect, described resistance detecting unit comprises:
The 4th power supply, is connected with the first end of the 5th resistance,
Described the 5th resistance, the resistance of described the 5th resistance is less than or equal to 32 ohm, and the second end of described the 5th resistance is connected with the L channel contact chip of described jack;
The 6th resistance, the resistance of described the 6th resistance is less than or equal to 32 ohm, and the first end of described the 6th resistance is connected with the R channel contact chip of described jack, the second end ground connection of described the 6th resistance.
In the 7th kind of possible implementation of second aspect, described converting unit can comprise:
Tertiary voltage comparator, input is connected with the second end of described the 5th resistance, and anti-phase reference input voltage is 2/3 times of described the 4th power supply;
The 4th voltage comparator, input is connected with the first end of described the 4th resistance, and anti-phase reference input voltage is 1/5 times of described the 4th power supply;
Transistor, described transistorized control end is connected with the output of described tertiary voltage comparator, the output of the 4th voltage comparator.
The 3rd aspect, the invention provides a kind of interface circuit, comprises jack and device that the above-mentioned Test earphone that is connected with described jack inserts.
The method that Test earphone provided by the invention inserts, device and the interface circuit that Test earphone inserts, by detecting the resistance value between jack left and right acoustic channels, after having solved class earphone object and inserting jack or two-in-one socket, be identified as the problem of earphone by mistake, especially for earphone and the two-in-one socket of optical fiber, can effectively distinguish headset plug insertion or Optical fiber plug insertion jack.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme in the embodiment of the present invention, below the accompanying drawing of required use during embodiment is described is briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
The flow chart of the method that a kind of Test earphone that Fig. 1 provides for the present invention executes example inserts;
The jack schematic diagram that Fig. 2 provides for the embodiment of the present invention;
Fig. 3 is earphone left and right acoustic channels schematic diagram;
Fig. 4 is traditional earphone detection circuit;
The structural representation of the device that a kind of Test earphone that Fig. 5 provides for the embodiment of the present invention inserts;
The structural representation of the device that the another kind of Test earphone that Fig. 6 provides for the embodiment of the present invention inserts;
The structural representation of the device that another Test earphone that Fig. 7 provides for the embodiment of the present invention inserts;
The structural representation of the device that the another kind of Test earphone that Fig. 8 provides for the embodiment of the present invention inserts;
Fig. 9 for the embodiment of the present invention provide in the internal structure schematic diagram of U1, U2;
The structural representation of the device that another Test earphone that Figure 10 provides for the embodiment of the present invention inserts;
The functional block diagram of a kind of interface circuit that Figure 11 provides for the embodiment of the present invention.
Embodiment
The flow chart of the method that a kind of Test earphone that Fig. 1 provides for the embodiment of the present invention inserts.As shown in Figure 1, the method comprises:
Resistance value between the contact chip of the left and right acoustic channels of step 11, detected electrons equipment jack.
Wherein, this jack can be unifunctional earphone jack, this jack also can be multifunctional jack, as shown in Figure 2, this jack can be used as the earphone jack of electronic equipment to example, for plugged earphone plug, simultaneously, this earphone jack can also be served as the fiber optic hub of electronic equipment, for inserting Optical fiber plug, etc.
As shown in Figure 3, for earphone 31, resistance range between its left and right acoustic channels is generally 32 ohm ~ 64 ohm, and therefore, the present embodiment is according to this characteristic, in the time having plug to insert jack, resistance between the contact chip of the left and right acoustic channels to jack detects, if the resistance of the resistance detecting, within the scope of 32 ohm ~ 64 ohm, illustrates and has headset plug to insert jack, otherwise, for non-headset plug inserts jack.Certainly, can detect in real time the resistance between left and right acoustic channels, be not just to have detected having detected that object inserts when jack yet, and when the resistance of the resistance detecting is within the scope of 32 ohm ~ 64 ohm, explanation has headset plug insertion jack; Otherwise, illustrate and in jack, there is no plugged earphone plug, such as, now, the plug that inserts jack is Optical fiber plug, or inserts jack without any plug.
In order to make the method that Test earphone plug that the embodiment of the present invention provides inserts be easier to realize, be determined with before headset plug inserts described jack, also comprise: change the resistance value detecting into magnitude of voltage.
For example, change the resistance value detecting into magnitude of voltage, comprising:
When the resistance value detecting is more than or equal to 32 ohm and while being less than or equal to 64 ohm, change the resistance value detecting into high level output;
When the resistance value detecting is less than 32 ohm or while being greater than 64 ohm, change the resistance value detecting into low level output.
Like this, can be converted to after magnitude of voltage in resistance value, can use traditional earphone detection circuit, to whether having headset plug insertion jack to confirm.
Traditional earphone detection circuit as shown in Figure 4, the 5th pin of earphone jack interface circuit (is designated hereinafter simply as pin 5, this pin also can be thought contact chip) and the 3rd pin (be designated hereinafter simply as pin 3, this pin also can be thought contact chip) be respectively headset plug insertion detection pin and L channel pin, large resistance is the more than 10 times of small resistor.In the time that earphone does not insert, pin 5 is connected with pin 3, and pin 5 is low level.In the time that headset plug inserts, pin 5 separates with pin 3, and pin 5 becomes high level.Therefore, the headset plug of rear end inserts decision circuit by knowing and whether have headset plug to insert jack from the voltage that detects pin.
Accordingly, the earphone detection circuit based on traditional in the present embodiment, is determined with headset plug and inserts above-mentioned jack and can comprise:
If changing the magnitude of voltage obtaining is high level, is determined with headset plug and inserts described jack.
Above-described embodiment is by detecting the resistance value between jack left and right acoustic channels, after having solved similar earphone object and inserting jack or two-in-one socket, be identified as the problem of earphone by mistake, especially for earphone and the two-in-one socket of optical fiber, above-described embodiment can effectively be distinguished headset plug and insert jack or Optical fiber plug insertion jack.
One of ordinary skill in the art will appreciate that: all or part of step that realizes above-mentioned each embodiment of the method can complete by the relevant hardware of program command.Aforesaid program can be stored in a computer read/write memory medium.This program, in the time carrying out, is carried out the step that comprises above-mentioned each embodiment of the method; And aforesaid storage medium comprises: various media that can be program code stored such as ROM, RAM, magnetic disc or CDs.
The structural representation of the device that a kind of Test earphone plug that Fig. 5 provides for the embodiment of the present invention inserts.The device that the present embodiment provides is for realizing the method shown in Fig. 1, and as shown in Figure 5, this device comprises: resistance detecting unit 51 and headset plug insert identifying unit 52.In the present embodiment, this electronic equipment can comprise the device that this jack and Test earphone plug insert.This electronic equipment can be mobile phone, or panel computer, or Set Top Box, or has the multimedia equipment of the function of online and Set Top Box simultaneously.
Headset plug inserts identifying unit 52 and is more than or equal to 32 ohm and while being less than or equal to 64 ohm for the resistance value detecting when resistance detecting unit 51, is determined with headset plug insertion jack.
Alternatively, also comprise: converting unit 53, be determined with before headset plug inserts described jack for insert identifying unit at described headset plug, change the resistance value detecting into magnitude of voltage.
This converting unit 53 can, specifically for be more than or equal to 32 ohm and while being less than or equal to 64 ohm when the resistance value detecting, change the resistance value detecting into high level output; When the resistance value detecting is less than 32 ohm or while being greater than 64 ohm, change the resistance value detecting into low level output.
Like this, be high level if headset plug insertion identifying unit 52 can change the magnitude of voltage obtaining specifically for converting unit, be determined with headset plug and insert jack.Now, headset plug inserts identifying unit 52 and can be traditional headset plug insertion decision circuit,, in the time that the voltage of the detection pin receiving is high level, is determined with headset plug and inserts; In the time that the voltage of the detection pin receiving is low level, judges and do not have headset plug to insert.
Alternatively, resistance detecting unit 51 comprises:
The first power supply, is connected with the contact chip of the L channel of described jack;
The first resistance, the resistance of described the first resistance is less than or equal to 32 ohm, and the first end of described the first resistance is connected with the R channel contact chip of described jack, the second end ground connection of described the first resistance.
Correspondingly, above-mentioned converting unit 53 can comprise:
First window comparator, the input of described first window comparator is connected with the first end of described the first resistance, and the first reference voltage is 1/2 times of described the first supply voltage, and the second reference voltage is 1/3 times of described the first supply voltage.
Referring to Fig. 6, the L channel pin 3 of jack meets power supply VCC, and R channel pin 4 is connected with the first end of the first resistance R a, the input of first window comparator 61.The resistance of the first resistance R a is 32 ohm, and the first reference voltage of first window comparator 61 is VCC/2, and the second reference voltage is VCC/3.
The voltage of R channel pin 4 is the input voltage Vi=VCC × Ra/(R+Ra of first window comparator 61)=VCC × 32/(R+32), wherein R is the resistance between L channel pin 3 and R channel pin 4.
In the time having headset plug to insert jack, 32 ohm of <R<64 ohms, VCC × 32/(64+32)=VCC/3<Vi<VCC × 32/(32+32)=VCC/2, be the input voltage VCC/3<Vi<VCC/2 of first window comparator 61, and the first reference voltage of first window comparator 61 is VCC/2, the second reference voltage is VCC/3, therefore, first window comparator 61 is exported high level, otherwise output low level.Thereby headset plug inserts decision circuit according to the output voltage of first window comparator 61, can judge whether that headset plug inserts jack.
By analog switch, the left and right acoustic channels of earphone is connected with voltage comparator, and comparator is typical window comparator.When the resistance between left and right acoustic channels is in 32 ~ 64ohm, corresponding voltage comparator is output as high level, now detects that headset plug inserts; Then, re-use traditional earphone detection circuit, to whether having headset plug insertion to confirm.
Or resistance detecting unit 51 can comprise:
Second source, is connected with the contact chip of the L channel of described jack;
The second resistance, the resistance of described the first resistance is less than or equal to 64 ohm, and the first end of described the first resistance is connected with the contact chip of the R channel of described jack, the second end ground connection of described the first resistance.
Correspondingly, above-mentioned converting unit 53 comprises:
Second Window comparator, the input of described Second Window comparator is connected with the first end of described the first resistance, and the first reference voltage is 2/3 times of described the first supply voltage, and the second reference voltage is 1/2 times of described the first supply voltage.
Referring to Fig. 7, the L channel pin 3 of jack meets power supply VCC, and R channel pin 4 is connected with the first end of the second resistance R b, the input of Second Window comparator 71.The resistance of the second resistance R b is 64 ohm, and the first reference voltage of Second Window comparator 71 is 2 × VCC/3, and the second reference voltage is VCC/2.
The voltage of R channel pin 4 is the input voltage Vi=VCC × Rb/(R+Rb of Second Window comparator 71)=VCC × 64/(R+64), wherein R is the resistance between L channel and R channel.
In the time having headset plug to insert jack, 32 ohm of <R<64 ohms, VCC × 64/(64+64)=VCC/3<Vi<VCC × 64/(32+64)=VCC/2, be the input voltage VCC/2<Vi<2 × VCC/3 of Second Window comparator 71, and the first reference voltage of Second Window comparator 71 is 2 × VCC/3, the second reference voltage is VCC/2, therefore, Second Window comparator 71 is exported high level, otherwise output low level.Thereby headset plug inserts decision circuit according to the output voltage of Second Window comparator 71, can judge whether that headset plug inserts jack.
Or resistance detecting unit 51 can comprise:
The 3rd power supply, is connected with the contact chip of the L channel of described jack;
The 3rd resistance, the resistance of described the 3rd resistance is less than 32 ohm, the second end ground connection of described the 3rd resistance;
The 4th resistance, the resistance of described the 4th resistance is greater than 64 ohm, the second end ground connection of described the 4th resistance;
Analog switch, the first end of described the 3rd resistance is connected with the contact chip of the R channel of described jack to be detected by described analog switch, and the first end of described the 4th resistance is connected with the contact chip of the R channel of described jack to be detected by described analog switch.
Correspondingly, converting unit 53 can comprise:
The first voltage comparator, inverting input is connected with the first end of described the 3rd resistance, and reference input voltage is 1/2 times of described the 3rd power supply;
Second voltage comparator, input is connected with the first end of described the 4th resistance, and anti-phase reference input voltage is 1/2 times of described the 3rd power supply;
Transistor, control end is connected with the output of described the first voltage comparator, the output of second voltage comparator.
Referring to Fig. 8, chip U1, chip U2, resistance R 15 and resistance R 1 belong to resistance detection unit, and chip U3 and metal-oxide-semiconductor Q1 belong to converting unit.
J1 is earphone and the two-in-one socket of optical fiber, and the pin 3 of J1 and pin 4 are respectively the pin of L channel and the pin of R channel.U1 and U2 are the chip with two-way single-pole double-throw switch (SPDT), and as shown in Figure 9, in the time of INx=0, NCx is connected with COMx the internal structure of U1, U2, and in the time of INx=1, COMx is connected with NOx, wherein x=1 or 2.
It is not shown that the pin 4 of U1 and U2 and pin 8 meet respectively CPU() two GPIO pin: GPIO_SEL0 and GPIO_SEL1, for controlling U1 and U2.
The pin 3 of U1 and pin 9 are connected respectively the GPIO pin of two 1.8V of CPU: GPIO_1V8_1 and GPIO_1V8_2, and these two GPIO pins need to be configured to high level, to utilize GPIO to export as a faint power supply VCC, reach the object that detects resistance between J1 left and right acoustic channels.
The pin 1 of U1 and U2 all connects 1.8V power supply, to give these two analog switch U1 and U2 power supply.
The pin 2 of U1 is all connected with the L channel pin 3 of J1 with pin 10, and the pin 2 of U2 is all connected with the R channel pin 4 of J1 with pin 10, and the pin 3 of U2 is by resistance R 15 ground connection, and pin 9 is by resistance R 1 ground connection.Wherein, the resistance that the resistance of R15 is 30, R1 is 68.
VO1 and VO2 are the output after earphone internal resistance and non-essential resistance dividing potential drop, are also the pin 3 of U2, the voltage signal that pin 9 is exported.
Chip U3 comprises two comparators, one of them comparator is (for ease of describing, below this comparator is called to the first voltage comparator) the pin that is input as chip U3 2, the pin that is input as chip U3 5 of another one comparator (for ease of describing, below this comparator being called to second voltage comparator).
The reference input of the first voltage comparator is that the pin 3 of U3 is connected with the second end of the first end of resistance R 3, resistance R 4, the second end ground connection of resistance R 3, the first termination 1.8V power supply of resistance R 4, and the resistance of R3, R4 is 100K ohm, therefore, the reference input terminal voltage of the first voltage comparator is 0.9V.
The anti-phase reference input of second voltage comparator is that the pin 6 of U3 is connected with the second end of the first end of resistance R 5, resistance R 6, the second end ground connection of resistance R 5, the first termination 1.8V power supply of resistance R 6, and the resistance of R5, R6 is 100K ohm, therefore, the anti-phase reference input terminal voltage of second voltage comparator is 0.9V.
The pin 3 of U2, input pin 2 and the pin 5 that pin 9 connects respectively chip U3.In chip U3, the output of two comparators is all done after a level conversion by the metal-oxide-semiconductor Q1 of a N raceway groove, is input to the headset detection pin GPIO_DET of CPU.This CPU can think that having traditional headset plug inserts decision-making function.Wherein, the drain D of Q1 is connected with the GPIO_DET pin of CPU, the second end of resistance R 8, the first termination 1.8V power supply of resistance R 8.Here CPU can think that headset plug inserts identifying unit.
After headset plug inserts J1, insert detection method by traditional headset plug, detect that the columnar object of 3.5mm inserts.
Now, control GPIO_SEL0=1, GPIO_SEL1=0 by CPU, U1 is connected with COM1 with NO1 in U2, COM2 and NO2 disconnect, and COM2 is connected with NC2.Weak current on GPIO_1V8_1 first passes through the resistance R (be greater than 32ohm and be less than 64ohm) between earphone left and right acoustic channels, is then connected to ground through R15.Now voltage=1.8V × R15/(R+R15 of VO1)=1.8V × 30/(R+30), due to 32<R<64, therefore, the voltage of VO1 is less than 1.8V/2=0.9V, and the voltage that U2 pin 3 is inputted is less than 0.9V.
The reference input voltage of the first voltage comparator connecting due to U2 pin 3 is 0.9V, and therefore the output of the first voltage comparator is that the pin 1 of U3 is low level.In the time that the pin 1 of U3 is low level, Q1 disconnects, drain D output high level, and CPU detects high level signal by GPIO_DET pin, inserts thereby be determined with headset plug.
In order to determine that the resistance between J1 L channel and R channel is also less than 64 ohm, CPU controls GPIO_SEL0=0, GPIO_SEL1=1, makes in U1 and U2, and COM1 and NO1 disconnect, and are connected with NC1, and COM2 is connected with NO2, disconnects with NC2.Like this, the weak current on GPIO_1V8_2 first passes through the resistance R (be greater than 32ohm and be less than 64ohm) between earphone left and right acoustic channels, is then connected to ground through R1.Now voltage=1.8V × R1/ of VO1 (R+R1)=1.8V × 68/ (R+68), due to 32<R<64, therefore, the voltage of VO1 is greater than 1.8V/2=0.9V, and the voltage that U2 pin 9 is exported is greater than 0.9V.
The anti-phase reference input voltage of the second voltage comparator connecting due to U2 pin 9 is 0.9V, and therefore the output of second voltage comparator is that the pin 7 of U3 is low level.The drain D output high level signal of same Q1.
CPU is by the frequent signal that switches GPIO_SEL0 and GPIO_SEL1, and the resistance of the resistance between the left and right acoustic channels that guarantees to detect is between 32 ohm and 64o ohm.Detect and cause the GPIO_DET pin of CPU low level to be detected when any road wherein, all think and be not that headset plug inserts J1, but other devices insert J1 as Optical fiber plug.
Or resistance detecting unit 51 can comprise:
The 4th power supply, is connected with the first end of the 5th resistance,
Described the 5th resistance, the resistance of described the 5th resistance is less than or equal to 32 ohm, and the second end of described the 5th resistance is connected with the contact chip of the L channel of described jack;
The 6th resistance, the resistance of described the 6th resistance is less than or equal to 32 ohm, and the contact chip of described the 6th first end of resistance and the R channel of described jack is connected, the second end ground connection of described the 6th resistance.
Correspondingly, converting unit 53 can comprise:
Tertiary voltage comparator, input is connected with the second end of described the 5th resistance, and anti-phase reference input voltage is 2/3 times of described the 4th power supply;
The 4th voltage comparator, input is connected with the first end of described the 4th resistance, and anti-phase reference input voltage is 1/5 times of described the 4th power supply;
Transistor, described transistorized control end is connected with the output of described tertiary voltage comparator, the output of the 4th voltage comparator.
Referring to Figure 10, chip U5, resistance R 20, resistance R 21 belong to resistance detection unit, and chip U4 and metal-oxide-semiconductor Q2 belong to converting unit.
Wherein, J2 is multi-functional earphone socket, and pin 3 and the pin 4 of J2 are respectively L channel and R channel.U5 is the chip with two-way single-pole double-throw switch (SPDT), and the internal structure of U5 can, referring to Fig. 9, repeat no more here.
The pin 4 of U5 and pin 8 all meet the GPIO pin of CPU: GPIO_SEL, for controlling U5.Here CPU can think that headset plug inserts identifying unit.
The pin 3 of U5 is connected with the second end of resistance R 20, and the pin 9 of U5 is connected with the first end of resistance R 21, the GPIO_1V8 pin of the first termination 1.8V of resistance R 20.This GPIO_1V8 pin need to be configured to high level, to utilize GPIO to export as a faint power supply VCC, reaches the object that detects resistance R between J2 left and right acoustic channels.The second end ground connection of resistance R 21.Like this, resistance R 20, resistance R and resistance R 21 are cascaded.And the first termination power 1.8V of resistance R 20, resistance R 21 ground connection, because the resistance of resistance R 20 and resistance R 21 is 30 ohm, like this, in the time of headset plug plugged earphone socket J2, the resistance of resistance R is greater than 32 ohm and be less than 64 ohm, like this, the pin 3 of U5 is also 2/3 times that the voltage VO1 of the second end of resistance R 20 is greater than 1.8V, is less than 3/4 times of 1.8V; The pin 9 of U5 is also 1/4 times that the voltage VO2 of the first end of resistance R 21 is greater than 1.8V, is less than 1/3 times of 1.8V.
U4 chip comprises two comparators, one of them comparator is (for ease of describing, below this comparator is called to the first voltage comparator) the pin that is input as chip U4 3, the pin that is input as chip U4 5 of another one comparator (for ease of describing, below this comparator being called to second voltage comparator).
The pin 3 of U4 is connected with the pin 3 of U5, and VO1 is the input voltage of the first voltage comparator; The pin 5 of U4 is connected with the pin 9 of U5, and VO1 is the input voltage of second voltage comparator.
The pin 2 of U4 the anti-phase reference input of the first voltage comparator between resistance R 24 and R22, and connect between resistance R 24, R22 and R23, the resistance of resistance R 24, R22 and R23 is 10k ohm, the first termination 1.8V power supply of resistance R 24, resistance R 23 second end ground connection, like this, the voltage of the anti-phase reference input of the first voltage comparator is 1.8V 2/3 times, be less than input voltage VO1.
The pin 6 of U4 is that the anti-phase reference input of second voltage comparator is between resistance R 16 and R25, and connect between resistance R 17, R16 and R25, the resistance of resistance R 17, R16 is 20K ohm, the resistance of R25 is 10k ohm, the first termination 1.8V power supply of resistance R 17, resistance R 25 second end ground connection, like this, the voltage of the anti-phase reference input of second voltage comparator is 1/5 times of 1.8V, is less than input voltage VO2.
Therefore,, when after plugged earphone in earphone socket J2, the equal output low level signal of the first voltage comparator and second voltage comparator is to the grid G of metal-oxide-semiconductor Q2.
The drain D of Q2 is connected with the GPIO_DET pin of CPU, the second end of resistance R 18, the first termination 1.8V power supply of resistance R 18.In the time that the pin 1 of U4 is low level, Q2 disconnects, drain D output high level, and CPU detects high level signal by GPIO_DET pin, inserts thereby be determined with headset plug.
Above-described embodiment is connected the left and right acoustic channels of earphone by analog switch with voltage comparator, metal-oxide-semiconductor, when the resistance between left and right acoustic channels is during at 32 ohm ~ 64 ohm, after metal-oxide-semiconductor output high level, re-use traditional earphone discrepancy decision circuit, to whether having headset plug insertion to confirm.Make the device that above-described embodiment provides there is good compatibility.
The functional block diagram of a kind of interface circuit that Figure 11 provides for the embodiment of the present invention.As shown in figure 11, this interface circuit comprise jack 111 and with checkout gear 112.Jack 111 can be unifunctional earphone jack, also can be multi-functional earphone jack, except including the physical receptacle matching with plug, also includes the circuit of left and right acoustic channels etc.The device that any one Test earphone plug that checkout gear 112 can be above-described embodiment to be provided inserts.Checkout gear 112 is connected with the pin of the left and right acoustic channels of jack 111, for by detecting resistance between left and right acoustic channels whether between 32 ohm to 64 ohm, has judged whether that headset plug inserts jack 111.
Above-described embodiment detects resistance between left and right acoustic channels whether between 32 ohm to 64 ohm by checkout gear, judges whether that headset plug inserts jack and solved the problem of existing earphone detection circuit erroneous judgement, has improved the performance of multifunctional headphone jack.
Finally it should be noted that: above each embodiment, only in order to technical scheme of the present invention to be described, is not intended to limit; Although the present invention is had been described in detail with reference to aforementioned each embodiment, those of ordinary skill in the art is to be understood that: its technical scheme that still can record aforementioned each embodiment is modified, or some or all of technical characterictic is wherein equal to replacement; And these modifications or replacement do not make the essence of appropriate technical solution depart from the scope of various embodiments of the present invention technical scheme.
Claims (17)
1. the method that Test earphone inserts, is characterized in that, comprising:
Resistance value between the contact chip of the left and right acoustic channels of detected electrons equipment jack;
When the resistance value detecting is more than or equal to 32 ohm and while being less than or equal to 64 ohm, be determined with headset plug and insert described jack.
2. method according to claim 1, is characterized in that, is determined with before headset plug inserts described jack, also comprises: change the resistance value detecting into magnitude of voltage.
3. method according to claim 2, is characterized in that, changes the resistance value detecting into magnitude of voltage, comprising:
When the resistance value detecting is more than or equal to 32 ohm and while being less than or equal to 64 ohm, change the resistance value detecting into high level output;
When the resistance value detecting is less than 32 ohm or while being greater than 64 ohm, change the resistance value detecting into low level output.
4. according to method described in claim 1-3 any one, it is characterized in that, be determined with headset plug and insert described jack, comprising:
If changing the magnitude of voltage obtaining is high level, is determined with headset plug and inserts described jack.
5. the device that Test earphone inserts, is characterized in that, comprising:
Resistance detecting unit, for detection of the resistance value between the contact chip of the left and right acoustic channels of electronic equipment jack;
Earphone inserts identifying unit, is more than or equal to 32 ohm and while being less than or equal to 64 ohm for the resistance value detecting when described resistance detecting unit, is determined with headset plug and inserts described jack.
6. install according to claim 5, it is characterized in that, also comprise:
Converting unit, is determined with before headset plug inserts described jack for insert identifying unit at described earphone, changes the resistance value detecting into magnitude of voltage.
7. device according to claim 6, is characterized in that, described converting unit, specifically for be more than or equal to 32 ohm and while being less than or equal to 64 ohm when the resistance value detecting, changes the resistance value detecting into high level output; When the resistance value detecting is less than 32 ohm or while being greater than 64 ohm, change the resistance value detecting into low level output.
8. described in claim 5-7 any one, installing, it is characterized in that, is high level if described earphone insertion identifying unit changes specifically for described converting unit the magnitude of voltage obtaining, and is determined with headset plug and inserts described jack.
9. according to device described in claim 6 or 7, it is characterized in that, described resistance detecting unit comprises:
The first power supply, is connected with the L channel contact chip of described jack;
The first resistance, the resistance of described the first resistance is less than or equal to 32 ohm, and the first end of described the first resistance is connected with the R channel contact chip of described jack, the second end ground connection of described the first resistance.
10. install according to claim 9, it is characterized in that, described converting unit comprises:
First window comparator, the input of described first window comparator is connected with the first end of described the first resistance, and the first reference voltage is 1/2 times of described the first supply voltage, and the second reference voltage is 1/3 times of described the first supply voltage.
11. according to device described in claim 6 or 7, it is characterized in that, described resistance detecting unit comprises:
Second source, is connected with the L channel contact chip of described jack;
The second resistance, the resistance of described the first resistance is less than or equal to 64 ohm, and the first end of described the first resistance is connected with the R channel contact chip of described jack, the second end ground connection of described the first resistance.
12. according to device described in claim 11, it is characterized in that, described converting unit comprises:
Second Window comparator, the input of described Second Window comparator is connected with the first end of described the first resistance, and the first reference voltage is 2/3 times of described the first supply voltage, and the second reference voltage is 1/2 times of described the first supply voltage.
13. according to device described in claim 6 or 7, it is characterized in that, described resistance detecting unit comprises:
The 3rd power supply, is connected with the L channel contact chip of described jack;
The 3rd resistance, the resistance of described the 3rd resistance is less than 32 ohm, the second end ground connection of described the 3rd resistance;
The 4th resistance, the resistance of described the 4th resistance is greater than 64 ohm, the second end ground connection of described the 4th resistance;
Analog switch, the first end of described the 3rd resistance is connected with the R channel contact chip of described jack by described analog switch, and the first end of described the 4th resistance is connected with the R channel contact chip of described jack by described analog switch.
14. according to device described in claim 13, it is characterized in that, described converting unit comprises:
The first voltage comparator, inverting input is connected with the first end of described the 3rd resistance, and reference input voltage is 1/2 times of described the 3rd power supply;
Second voltage comparator, input is connected with the first end of described the 4th resistance, and anti-phase reference input voltage is 1/2 times of described the 3rd power supply;
Transistor, described transistorized control end is connected with the output of described the first voltage comparator, the output of second voltage comparator.
15. according to device described in claim 6 or 7, it is characterized in that, described resistance detecting unit comprises:
The 4th power supply, is connected with the first end of the 5th resistance,
Described the 5th resistance, the resistance of described the 5th resistance is less than or equal to 32 ohm, and the second end of described the 5th resistance is connected with the L channel contact chip of described jack;
The 6th resistance, the resistance of described the 6th resistance is less than or equal to 32 ohm, and the first end of described the 6th resistance is connected with the R channel contact chip of described jack, the second end ground connection of described the 6th resistance.
16. according to device described in claim 15, it is characterized in that, described converting unit comprises:
Tertiary voltage comparator, input is connected with the second end of described the 5th resistance, and anti-phase reference input voltage is 2/3 times of described the 4th power supply;
The 4th voltage comparator, input is connected with the first end of described the 4th resistance, and anti-phase reference input voltage is 1/5 times of described the 4th power supply;
Transistor, described transistorized control end is connected with the output of described tertiary voltage comparator, the output of the 4th voltage comparator.
17. 1 kinds of interface circuits, is characterized in that, comprise jack and the claims 5-16 any one that is connected with described jack described in the device that inserts of Test earphone.
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| CN201210580574.1A CN103905955B (en) | 2012-12-27 | 2012-12-27 | The method of test earphone insertion, the device and interface circuit of test earphone insertion |
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| CN110209543A (en) * | 2019-05-28 | 2019-09-06 | 维沃移动通信有限公司 | A kind of detection method and terminal of earphone socket |
| CN112333505A (en) * | 2020-10-26 | 2021-02-05 | 歌尔智能科技有限公司 | Remote controller and audio and video playing system |
| CN114983314A (en) * | 2022-04-25 | 2022-09-02 | 武汉博视曼医疗科技有限公司 | Light guide beam on-site detection device, cold light source device and endoscope system |
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Address after: 518129 Building 2, B District, Bantian HUAWEI base, Longgang District, Shenzhen, Guangdong. Patentee after: Huawei terminal (Shenzhen) Co.,Ltd. Address before: 518129 Building 2, B District, Bantian HUAWEI base, Longgang District, Shenzhen, Guangdong. Patentee before: HUAWEI DEVICE Co.,Ltd. |
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