CN220673605U

CN220673605U - High-side driving switch circuit

Info

Publication number: CN220673605U
Application number: CN202322205690.1U
Authority: CN
Inventors: 林侨; 周全兵; 刘友辉
Original assignee: Huizhou Haoying Motor Co ltd
Current assignee: Huizhou Haoying Motor Co ltd
Priority date: 2023-08-15
Filing date: 2023-08-15
Publication date: 2024-03-26
Anticipated expiration: 2033-08-15

Abstract

The utility model discloses a high-side driving switch circuit, which comprises: the device comprises a pulse generation circuit module, an automatic boosting circuit module and an NMOS driving circuit module; the output end of the pulse generating circuit module is connected with the input end of the automatic boosting circuit module; the output end of the automatic boost circuit module is connected with the control end of the NMOS drive circuit module; the input end of the NMOS drive circuit module is connected with a power supply, and the output end of the NMOS drive circuit module is externally connected with a load. The high-side driving switch circuit disclosed by the utility model has low implementation cost and can be suitable for occasions with high power loads.

Description

High-side driving switch circuit

Technical Field

The present utility model relates to switching circuits, and more particularly to a high-side drive switching circuit.

Background

The traditional high-side driving switch circuit is used for doing high-side load switch through a PMOS tube. However, PMOS tubes are expensive and have poor performance parameters, which cannot meet the high power load situation.

Disclosure of Invention

The utility model aims to overcome the defects in the prior art, and provides a high-side driving switch circuit which is low in implementation cost and suitable for occasions with high power loads.

The aim of the utility model is realized by the following technical scheme:

a high side drive switching circuit comprising: the device comprises a pulse generation circuit module, an automatic boosting circuit module and an NMOS driving circuit module;

the output end of the pulse generating circuit module is connected with the input end of the automatic boosting circuit module; the output end of the automatic boost circuit module is connected with the control end of the NMOS drive circuit module;

the input end of the NMOS drive circuit module is connected with a power supply, and the output end of the NMOS drive circuit module is externally connected with a load.

In one embodiment, the automatic boost circuit module is a voltage doubling circuit module.

In one embodiment, the NMOS drive circuit module includes: NMOS tube Q3, the first zener diode D2 and the first resistor R8;

the D pole of the NMOS tube Q3 is used as an input end to be connected with a power supply, the S pole of the NMOS tube Q3 is used as an output end to be externally connected with a load, and the G pole of the NMOS tube Q3 is used as a control end to be connected with the output end of the voltage doubling circuit module;

the first zener diode D2 is connected in parallel with the first resistor R8, and the positive electrode of the first zener diode D2 is connected to the S electrode of the NMOS transistor Q3, and the negative electrode of the first zener diode D2 is connected to the D electrode of the NMOS transistor Q3.

In one embodiment, the voltage doubling circuit module includes: the second diode D3, the third zener diode D4, the first capacitor C5, the second capacitor C19 and the second resistor R7;

the positive electrode of the second diode D3 is connected with the output end of the pulse generating circuit module, and the negative electrode of the second diode D3 is connected with the control end of the NMOS drive circuit module; the cathode of the second diode D3 is connected in series with the first capacitor C5 and then connected with the anode of the third zener diode D4; the cathode of the third zener diode D4 is connected with the anode of the second diode D3;

the positive electrode of the third zener diode D4 is connected in series with the second capacitor C19 and then grounded;

one end of the second resistor R7 is connected with the positive electrode of the third zener diode D4, and the other end of the second resistor R is connected with the load.

In one embodiment, the voltage doubling circuit module further includes a third capacitor C4, and the positive electrode of the second diode D3 is connected in series with the third capacitor C4 and then connected to the output end of the pulse generating circuit module.

In one embodiment, the voltage doubling circuit module further includes a third resistor R12, and the negative electrode of the second diode D3 is connected in series with the third resistor R12 and then connected to the control end of the NMOS driving circuit module.

In one embodiment, the NMOS transistor Q3 is FDBL0150N80.

In one embodiment, the first zener diode D2 is of the type BZT52C20.

In one embodiment, the pulse generating circuit module includes: a fourth resistor R63, a fifth resistor R67, a fourth capacitor C1, a fifth capacitor C65, a sixth capacitor C70, an eighth capacitor C56, and a timer U4;

the power supply pin VCC and the reset pin RST of the timer U4 are respectively connected with a direct current power supply; the power pin VCC of the timer U4 is also connected in series with the eighth capacitor C56 and then grounded;

the direct current power supply is sequentially connected in series with the fourth resistor R63, the fifth resistor R67 and the fifth capacitor C65 and then grounded; the junction between the fourth resistor R63 and the fifth resistor R67 is connected to the power supply terminal pin DIS of the timer U4, and the non-inverting input terminal pin THR and the inverting input terminal pin TRI of the timer U4 are respectively connected to the junction between the fifth resistor R67 and the fifth capacitor C65; the direct current power supply is also connected in series with the fourth capacitor C1 and then grounded; the control pin CON of the timer U4 is connected in series with the sixth capacitor C70 and then grounded; the output pin OUT of the timer U4 is used as the output end of the pulse generating circuit module and is connected with the input end of the automatic boosting circuit module.

In one embodiment, the pulse generating circuit module outputs a square wave signal with amplitude of 12V and frequency of 230KHz.

The high-side driving switch circuit of the embodiment adopts the NMOS driving circuit module to realize high-side load switch, has low realization cost and can be suitable for occasions with high power load.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present utility model and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic block diagram of an embodiment of a high-side drive switching circuit;

FIG. 2 is a functional block diagram of a high-side drive switching circuit according to another embodiment of the present application;

FIG. 3 is a schematic circuit diagram of a high side drive switch circuit according to another embodiment of the present application;

fig. 4 is a schematic circuit diagram of a pulse generating circuit module according to another embodiment of the present application.

Detailed Description

In order that the utility model may be readily understood, a more complete description of the utility model will be rendered by reference to the appended drawings. The drawings illustrate preferred embodiments of the utility model. This utility model may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

It will be understood that when an element is referred to as being "fixed to" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only and are not meant to be the only embodiment.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this utility model belongs. The terminology used herein in the description of the utility model is for the purpose of describing particular embodiments only and is not intended to be limiting of the utility model. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.

An embodiment of the present application discloses a high-side driving switch circuit 100, comprising: the pulse generating circuit module 130, the automatic boosting circuit module 120 and the NMOS driving circuit module 110. The output of the pulse generating circuit module 130 is connected to the input of the automatic boost circuit module 120. The output terminal of the automatic boost circuit module 120 is connected to the control terminal of the NMOS drive circuit module 110. The input end of the NMOS drive circuit module 110 is connected with the power supply 200, and the output end of the NMOS drive circuit module 110 is externally connected with the load 300.

The power supply 200 inputs a direct current power to the input end of the NMOS driving circuit module 110; the pulse generating circuit module 130 outputs a pulse signal to the input end of the automatic boosting circuit module 120; after the automatic boost circuit module 120 automatically boosts the pulse signal, the boosted pulse signal is input to the control end of the NMOS driving circuit module 110 to control the NMOS driving circuit module 110 to be turned off or turned on, so as to realize the turn-off or turn-on of the external load 300.

The high-side driving switch circuit 100 of the embodiment adopts the NMOS driving circuit module 110 to realize the switching of the high-side load 300, has low realization cost, and is applicable to the occasion of the high-power load 300.

Another embodiment of the present application discloses a high-side driving switch circuit 100, comprising: the pulse generating circuit module 130, the voltage doubling circuit module 140 and the NMOS driving circuit module 110. An output terminal of the pulse generating circuit module 130 is connected to an input terminal of the voltage doubling circuit module 140. The output terminal of the voltage doubling circuit module 140 is connected to the control terminal of the NMOS driving circuit module 110. The input end of the NMOS drive circuit module 110 is connected with the power supply 200, and the output end of the NMOS drive circuit module 110 is externally connected with the load 300.

In the present embodiment, the NMOS driving circuit module 110 includes: NMOS transistor Q3, first zener diode D2 and first resistor R8. The D electrode of the NMOS tube Q3 is used as an input end to be connected with the power supply 200, the S electrode of the NMOS tube Q3 is used as an output end to be externally connected with the load 300, and the G electrode of the NMOS tube Q3 is used as a control end to be connected with the output end of the voltage doubling circuit module 140; the first zener diode D2 is connected in parallel with the first resistor R8, the positive electrode of the first zener diode D2 is connected with the S electrode of the NMOS tube Q3, and the negative electrode of the first zener diode D2 is connected with the D electrode of the NMOS tube Q3.

The voltage doubler circuit module 140 includes: the second diode D3, the third zener diode D4, the first capacitor C5, the second capacitor C19, the second resistor R7, the third capacitor C4, and the third resistor R12. The positive electrode of the second diode D3 is connected to the output end of the pulse generating circuit module 130, and the negative electrode is connected to the control end of the NMOS driving circuit module 110. The cathode of the second diode D3 is connected in series with the first capacitor C5 and then connected with the anode of the third zener diode D4. The cathode of the third zener diode D4 is connected to the anode of the second diode D3. The positive electrode of the third zener diode D4 is connected in series with the second capacitor C19 and then grounded. One end of the second resistor R7 is connected with the positive electrode of the third zener diode D4, and the other end is connected with the load 300.

The positive electrode of the second diode D3 is connected in series with the third capacitor C4 and then connected to the output end of the pulse generating circuit module 130. The cathode of the second diode D3 is connected in series with the third resistor R12 and then connected to the control end (i.e., the G-pole of the NMOS) of the NMOS driving circuit module 110.

Specifically, in this embodiment, the NMOS transistor Q3 is FDBL0150N80, and the first zener diode D2 is BZT52C20. The second zener diode D4 is model BZT52C24.

Specifically, in this embodiment, the parameter of the third capacitor C4 is 0805-100nF/50V. The first capacitor C5 has a parameter of 0805-100nF/50V and the second capacitor C19 has a parameter of 0805-100nF/100V.

In this embodiment, the pulse generating circuit module includes: fourth resistor R63, fifth resistor R67, fourth capacitor C1, fifth capacitor C65, sixth capacitor C70, eighth capacitor C56, and timer U4.

The power supply pin VCC and the reset pin RST of the timer U4 are respectively connected with a direct current power supply; the power pin VCC of the timer U4 is also connected in series with the eighth capacitor C56 and then grounded. In this embodiment, the voltage of the dc power supply is 12V.

The direct current power supply is sequentially connected with a fourth resistor R63, a fifth resistor R67 and a fifth capacitor C65 in series and then grounded; the junction between the fourth resistor R63 and the fifth resistor R67 is connected with the power end pin DIS of the timer U4, and the non-reverse input end pin THR and the reverse input end pin TRI of the timer U4 are respectively connected with the junction between the fifth resistor R67 and the fifth capacitor C65; the direct current power supply is also connected in series with a fourth capacitor C1 and then grounded. The control pin CON of the timer U4 is connected in series with the sixth capacitor C70 and then grounded; the output pin OUT of the timer U4 is used as an output end of the pulse generating circuit module and is connected with an input end of the automatic boosting circuit module.

In this embodiment, the pulse generating circuit module outputs a square wave signal with a voltage of 0 or 12V, and the frequency of the square wave signal is 230KHz.

The working principle of the high-side driving switch circuit 100 of the present application is:

the following description will be made taking the voltage of the power supply 200 as an example of 50V: when the high-side driving switch circuit 100 is powered on, the pulse generating circuit module 130 outputs a pulse SIGNAL (SIGNAL) with a frequency of about 230KHz and an amplitude of 12V to the voltage doubling circuit module 140;

the pulse SIGNAL (SIGNAL) is coupled through the third capacitor C4 of the voltage doubling circuit module 140 and then charges the first capacitor C5 and the second capacitor C19; each cycle (1/230 KHz) is charged once, and after a few cycles the C19 voltage will be charged to about 50V; the voltage is input to the S electrode of the NMOS tube Q3 through the second resistor R7, so that the voltage of the S electrode of the NMOS tube Q3 is about 50V at the moment; meanwhile, the voltages at two ends of the second capacitor C19 are input into the third capacitor C4 through forward conduction of the third zener diode D4, so that the voltage at the rear end of the third capacitor C4 is stabilized at about 50V;

when the subsequent pulse SIGNAL (SIGNAL) is input through the third capacitor C4, the first capacitor C5 is continuously charged to about 60V; the first capacitor C5 is connected with the G electrode of the NMOS tube Q3, so that the G electrode voltage of the NMOS tube Q3 is about 10V higher than the S electrode voltage of the NMOS tube Q3, the NMOS tube Q3 can be started at the moment, and the voltage of the power supply is transmitted to the load;

after the NMOS tube Q3 is switched on, the output end of the NMOS drive circuit module is connected to the second capacitor C19 through the second resistor R7; at this time, the voltage of the second capacitor C19 is stabilized at 50V; thus, when the pulse SIGNAL (SIGNAL) is input later, the pulse SIGNAL (SIGNAL) is superimposed on the basis of the voltage of 50V, and then the second diode D3 charges the first capacitor C5, so that the voltage of the first capacitor C5 is continuously and stably a fixed voltage (about 10V) higher than 50V, and the NMOS transistor Q3 can be stably turned on.

The above examples illustrate only a few embodiments of the utility model, which are described in detail and are not to be construed as limiting the scope of the utility model. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the utility model, which are all within the scope of the utility model. Accordingly, the scope of protection of the present utility model is to be determined by the appended claims.

Claims

1. A high side drive switching circuit, comprising: the device comprises a pulse generation circuit module, an automatic boosting circuit module and an NMOS driving circuit module;

2. The high side drive switching circuit of claim 1 wherein the automatic boost circuit module is a voltage doubling circuit module.

3. The high-side drive switching circuit according to claim 2, wherein the NMOS drive circuit module comprises: NMOS tube Q3, the first zener diode D2 and the first resistor R8;

4. The high-side drive switching circuit according to claim 2, wherein the voltage doubling circuit module comprises: the second diode D3, the third zener diode D4, the first capacitor C5, the second capacitor C19 and the second resistor R7;

5. The high-side driving switch circuit according to claim 4, wherein the voltage doubling circuit module further comprises a third capacitor C4, and the positive electrode of the second diode D3 is connected in series with the third capacitor C4 and then connected to the output end of the pulse generating circuit module.

6. The high-side driving switch circuit according to claim 4, wherein the voltage doubling circuit module further comprises a third resistor R12, and the negative electrode of the second diode D3 is connected in series with the third resistor R12 and then connected to the control end of the NMOS driving circuit module.

7. The high-side drive switching circuit according to claim 3, wherein the NMOS transistor Q3 is of the type FDBL0150N80.

8. The high side drive switching circuit of claim 3 wherein the first zener diode D2 is model BZT52C20.

9. The high-side drive switching circuit according to claim 1, wherein the pulse generating circuit module comprises: a fourth resistor R63, a fifth resistor R67, a fourth capacitor C1, a fifth capacitor C65, a sixth capacitor C70, an eighth capacitor C56, and a timer U4;

10. The high side drive switching circuit according to claim 9, wherein the pulse generating circuit module outputs a square wave signal having an amplitude of 12V and a frequency of 230KHz.