CN220629188U - Step-down conversion circuit and direct-current test power supply - Google Patents

Step-down conversion circuit and direct-current test power supply Download PDF

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Publication number
CN220629188U
CN220629188U CN202321994247.0U CN202321994247U CN220629188U CN 220629188 U CN220629188 U CN 220629188U CN 202321994247 U CN202321994247 U CN 202321994247U CN 220629188 U CN220629188 U CN 220629188U
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mos tube
conversion circuit
buck
inductor
electrode
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CN202321994247.0U
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胡正
陶磊
邹海晏
吴云
张�杰
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Hefei Blue Dot Digital Power Supply Co ltd
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Hefei Blue Dot Digital Power Supply Co ltd
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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Abstract

The application discloses a buck conversion circuit and a direct current test power supply. The buck conversion circuit includes: the first BUCK module comprises a first MOS tube, a first follow current MOS tube and a first inductor; the second BUCK module comprises a second MOS tube, a second follow current MOS tube and a second inductor; two ends of the input filter module are respectively connected with the positive electrode and the negative electrode of the direct current input end; and two ends of the output filter module are respectively connected with the positive electrode and the negative electrode of the direct current output end. According to the BUCK conversion circuit, through arranging the two BUCK modules distributed in a staggered mode, the MOS tube is used for replacing the diode to carry out follow current, the on resistance of the follow current device is low, the circuit loss can be effectively reduced, and the circuit conversion efficiency is improved.

Description

Step-down conversion circuit and direct-current test power supply
Technical Field
The application belongs to the technical field of power electronics, and particularly relates to a buck conversion circuit and a direct current test power supply.
Background
The direct current power supply can output another direct current power supply with different output characteristics after passing through the BUCK conversion circuit, the common BUCK conversion circuit is provided with a BUCK circuit, the BUCK circuit operates based on an inductance energy storage principle, and in the BUCK circuit, the direct current voltage provided by the input power supply is converted into adjustable low-voltage output by controlling the on-off state of a PWM wave switching switch tube with variable input duty ratio, so that the power supply requirements of different circuits are met.
The current common BUCK circuit is a main circuit, the structure is simple, the use is popular, but the voltage and current ripple output by the BUCK circuit with the structure is large, and when the output current of the main circuit is large, the conduction voltage drop of a freewheeling diode is large, the circuit loss is large, and the conversion efficiency is low.
Disclosure of Invention
The present application aims to solve at least one of the technical problems existing in the prior art. Therefore, the voltage-reducing conversion circuit and the direct-current test power supply can reduce ripple waves of voltage and current, and the follow current device is low in on-resistance, low in circuit loss and high in conversion efficiency.
In a first aspect, the present application provides a buck conversion circuit comprising:
a DC input and a DC output;
the first BUCK module comprises a first MOS tube, a first follow current MOS tube and a first inductor, wherein the drain electrode of the first MOS tube is connected with the positive electrode of the direct current input end, the drain electrode of the first follow current MOS tube is connected with the source electrode of the first MOS tube, the source electrode of the first follow current MOS tube is connected with the negative electrode of the direct current input end, one end of the first inductor is connected with the drain electrode of the first follow current MOS tube, and the other end of the first inductor is connected with the positive electrode of the direct current output end;
the second BUCK module comprises a second MOS tube, a second follow current MOS tube and a second inductor, wherein the drain electrode of the second MOS tube is connected with the positive electrode of the direct current input end, the drain electrode of the second follow current MOS tube is connected with the source electrode of the second MOS tube, the source electrode of the second follow current MOS tube is connected with the negative electrode of the direct current input end, one end of the second inductor is connected with the drain electrode of the second follow current MOS tube, and the other end of the second inductor is connected with the positive electrode of the direct current output end;
the two ends of the input filter module are respectively connected with the positive electrode and the negative electrode of the direct current input end;
and two ends of the output filter module are respectively connected with the positive electrode and the negative electrode of the direct current output end.
According to the BUCK conversion circuit, through setting up two BUCK modules of staggered distribution, adopt the MOS pipe to replace the diode to carry out the freewheel, the on resistance of freewheel device is low, can effectively reduce circuit loss, improves circuit conversion efficiency.
According to one embodiment of the present application, the first inductor includes a first winding, the second inductor includes a second winding, and the first winding and the second winding are wound on the same magnetic core structure.
According to one embodiment of the application, a first absorption resistor and a first absorption capacitor are sequentially connected between the drain electrode and the source electrode of the first MOS tube, and a second absorption resistor and a second absorption capacitor are sequentially connected between the drain electrode and the source electrode of the second MOS tube;
the drain electrode and the source electrode of the first follow current MOS tube are sequentially connected with a third absorption resistor and a third absorption capacitor, and the drain electrode and the source electrode of the second follow current MOS tube are sequentially connected with a fourth absorption resistor and a fourth absorption capacitor.
According to one embodiment of the present application, further comprising:
and the anode of the diode is connected with the anode of the direct current output end, and the cathode of the diode is connected with the drains of the first MOS tube and the second MOS tube.
According to one embodiment of the present application, further comprising:
the first pin and the third pin of the common mode inductor are respectively connected with two ends of the output filter module, the second pin and the fourth pin of the common mode inductor are respectively connected with two ends of the filter capacitor, and two ends of the filter capacitor are respectively connected with an anode and a cathode of the direct current output end.
According to one embodiment of the present application, the gate of the first freewheeling MOS transistor is configured to receive a first pwm signal, where a duty cycle of the first pwm signal is 0.5; the grid electrode of the second follow current MOS tube is used for receiving a second pulse width modulation signal, and the duty ratio of the second pulse width modulation signal is 0.5.
According to one embodiment of the application, the withstand voltage of the first freewheel MOS transistor and the second freewheel MOS transistor is smaller than 650Vdc, and the on-resistance of the first freewheel MOS transistor and the second freewheel MOS transistor is smaller than 20mΩ.
According to one embodiment of the application, the input filter module comprises a first capacitor, and two ends of the first capacitor are respectively connected with the positive electrode and the negative electrode of the direct current input end.
According to one embodiment of the application, the output filter module comprises a second capacitor, and two ends of the second capacitor are respectively connected with the positive electrode and the negative electrode of the direct current output end.
In a second aspect, the present application provides a dc test power supply comprising:
the PFC correction circuit, at least one isolation DC/DC conversion circuit and at least one step-down conversion circuit according to the first aspect, wherein the isolation DC/DC conversion circuit is connected between the step-down conversion circuit and the PFC correction circuit, and the isolation DC/DC conversion circuit is connected with the step-down conversion circuit in a one-to-one correspondence manner.
According to the direct-current test power supply, the BUCK conversion circuit of the direct-current test power supply is provided with the two BUCK modules distributed in a staggered mode, the MOS tube is used for replacing the diode to carry out follow current, the on-resistance of the follow current device is low, the circuit loss can be effectively reduced, and the circuit conversion efficiency is improved.
Additional aspects and advantages of the application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application.
Drawings
The foregoing and/or additional aspects and advantages of the present application will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings, wherein:
fig. 1 is a schematic diagram of a buck conversion circuit according to an embodiment of the present disclosure;
FIG. 2 is a schematic diagram of a buck converter according to an embodiment of the present disclosure;
FIG. 3 is a third schematic diagram of a buck converter according to the embodiment of the present disclosure;
FIG. 4 is a schematic diagram of a buck converter according to an embodiment of the present disclosure;
fig. 5 is a schematic structural diagram of a dc test power supply according to an embodiment of the present application.
Detailed Description
Embodiments of the present application are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals refer to the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the drawings are exemplary only for the purpose of explaining the present application and are not to be construed as limiting the present application.
A buck converter circuit and a dc test power supply according to an embodiment of the present application are described below with reference to fig. 1-5.
The buck conversion circuit of the embodiment of the application comprises: the device comprises a direct current input end, a direct current output end, a first BUCK module, a second BUCK module, an input filtering module and an output filtering module.
The first BUCK module comprises a first MOS tube, a first follow current MOS tube and a first inductor; the second BUCK module comprises a second MOS tube, a second follow current MOS tube and a second inductor.
In the first BUCK module and the second BUCK module, the on and off states of the two switching tubes of the first MOS tube and the second MOS tube can be switched by controlling a Pulse Width Modulation (PWM) signal with a variable input duty ratio, and direct-current voltage provided by an input power supply is converted into adjustable low-voltage output, so that power supply requirements of different circuits are met.
The first inductor in the first BUCK module and the first inductor in the second BUCK module are in a conducting state, the magnetic field of the current passing through the center core of the inductor is converted into magnetic energy, and the magnetic energy is stored in the inductor; in the off state, the magnetic field generates a voltage due to the self-inductance of the inductor, converts electromagnetic energy into electrical energy, and supplies power through the direct current output terminal.
In actual execution, the periodic conversion and adjustment of electric energy between the capacitor and the inductor are realized by controlling the on-off states of the two switching tubes of the first MOS tube and the second MOS tube, and finally, stable direct-current voltage is output through the direct-current output end.
The first BUCK module and the second BUCK module can adopt negative feedback control, output voltage is sampled and fed back to the microcontroller, and then the microcontroller adjusts the duty ratio of an output PWM signal to control the on time and the off time of the first MOS tube and the second MOS tube, so that the output voltage is kept in a preset range.
In this embodiment, the drain electrode of the first MOS transistor is connected to the positive electrode of the dc input terminal, the drain electrode of the first freewheel MOS transistor is connected to the source electrode of the first MOS transistor, the source electrode of the first freewheel MOS transistor is connected to the negative electrode of the dc input terminal, one end of the first inductor is connected to the drain electrode of the first freewheel MOS transistor, and the other end of the first inductor is connected to the positive electrode of the dc output terminal.
The second BUCK module comprises a second MOS tube, a second follow current MOS tube and a second inductor, wherein the drain electrode of the second MOS tube is connected with the positive electrode of the direct current input end, the drain electrode of the second follow current MOS tube is connected with the source electrode of the second MOS tube, the source electrode of the second follow current MOS tube is connected with the negative electrode of the direct current input end, one end of the second inductor is connected with the drain electrode of the second follow current MOS tube, and the other end of the second inductor is connected with the positive electrode of the direct current output end.
In this embodiment, the first BUCK module and the second BUCK module are distributed in an interlaced manner, so that the ripple of the voltage and the current of the dc output terminal can be reduced.
In some embodiments, the gate of the first freewheeling MOS transistor is configured to receive a first pwm signal, where a duty cycle of the first pwm signal is 0.5; the grid electrode of the second follow current MOS tube is used for receiving a second pulse width modulation signal, and the duty ratio of the second pulse width modulation signal is 0.5.
It can be understood that the gates of the first MOS transistor and the second MOS transistor are also used for receiving a pulse width modulation signal, and the pulse width modulation signal can control the on-off state of the MOS transistors.
For example, as shown in fig. 1, the gate of the first MOS transistor Q1 may receive the PWM driving signal 1, and the gate G of the first freewheel MOS transistor Q3 may receive the PWM driving signal 3 (i.e., the first pulse width modulation signal).
The gate of the second MOS transistor Q2 may receive the PWM driving signal 2, and the gate G of the second freewheel MOS transistor Q4 may receive the PWM driving signal 4 (i.e., the second pulse width modulation signal).
In some embodiments, the withstand voltage of the first and second freewheel MOS transistors is 650Vdc, and the on-resistance of the first and second freewheel MOS transistors is less than 20mΩ.
It is understood that the input filter module and the output filter module filter the dc input and the dc output of the buck converter circuit, respectively, to smooth the voltage ripple.
In some embodiments, the input filter module includes a first capacitor, and two ends of the first capacitor are respectively connected with the positive pole and the negative pole of the direct current input terminal.
In some embodiments, the output filter module includes a second capacitor, and two ends of the second capacitor are respectively connected with the positive pole and the negative pole of the direct current output terminal.
The first continuous flow MOS tube is a continuous flow device in the first BUCK module, the second continuous flow MOS tube is a continuous flow device in the second BUCK module, the continuous flow devices of the first BUCK module and the second BUCK module which are distributed in an interlaced mode adopt the MOS tube to replace a diode in the related technology for continuous flow, the on-resistance of the MOS tube is low, the circuit loss is small, and the conversion efficiency is high.
In the related art, two MOS tubes in an interleaved BUCK circuit are alternately conducted at half a switch period, when the MOS tubes are conducted, the inductance stores energy and outputs the energy to a load, when the MOS tubes are turned off, the inductance utilizes a diode to conduct follow current discharge to the load, the withstand voltage of the diode is more than 650Vdc, the current is more than 100A, the conduction voltage drop of the diode is generally not less than 1.5V, under the assumption of rated working conditions, the total output current of the interleaved BUCK circuit is I=80A, the duty ratio of the two MOS tubes is D=0.5, the conduction voltage drop of the diode is Ud not less than 1.5V, the conduction current of a single diode is Id=I×0.5, the diode conduction loss is Pd=UdId×D not less than 30W, the diode conduction loss is larger, and the circuit conversion efficiency is low.
In this embodiment, as shown in fig. 1, two ends of a first capacitor C3 are respectively connected with an anode and a cathode of a dc input end, a drain electrode of a first MOS transistor Q1 is connected with the anode of the dc input end, a source electrode of the first freewheel MOS transistor Q3 is connected with the cathode of the dc input end, a source electrode of the first MOS transistor Q1 is connected with a drain electrode of the first freewheel MOS transistor Q3, and a first inductor is connected with the drain electrode of the first freewheel MOS transistor Q3; the drain electrode of the second MOS tube Q2 is connected with the positive electrode of the direct current input end, the source electrode of the second follow current MOS tube Q4 is connected with the negative electrode of the direct current input end, the source electrode of the second MOS tube Q2 is connected with the drain electrode of the second follow current MOS tube Q4, the second inductor is connected with the drain electrode of the second follow current MOS tube Q4, and two ends of the second capacitor C4 are respectively connected with the positive electrode and the negative electrode of the direct current output end.
In this embodiment, the first MOS transistor Q1 and the second MOS transistor Q2 are alternately turned on at intervals of half a switching period, after the same dead time, the first flywheel MOS transistor Q3 and the second flywheel MOS transistor Q4 are alternately turned on at intervals of half a switching period, the body diodes of the first flywheel MOS transistor Q3 and the second flywheel MOS transistor Q4 are turned on for the first inductor flywheel in the dead time, and the first flywheel MOS transistor Q3 and the second flywheel MOS transistor Q4 are turned on after the dead time until the first MOS transistor Q1 and the second MOS transistor Q2 are turned off before being turned on, the first MOS transistor Q1 and the first flywheel MOS transistor Q3 are not turned on at the same time, and the second MOS transistor Q2 and the second flywheel MOS transistor Q4 are not turned on at the same time.
According to the embodiment of the utility model, the first freewheel MOS tube Q3 and the second freewheel MOS tube Q4 are adopted to replace diodes for freewheel, the withstand voltage of the two freewheel MOS tubes is within 650Vdc, the on-resistance is within 20mΩ, the on-resistance Rds_on of the first freewheel MOS tube Q3 and the second freewheel MOS tube Q4 is less than or equal to 20mΩ, the working condition is the same as that of a traditional staggered BUCK circuit, the output total current is I=80A, the duty ratio of the first freewheel MOS tube Q3 and the second freewheel MOS tube Q4 is D=0.5, the on-current of a single freewheel MOS tube is imos_on=Ix0.5, the on-voltage drop Umos_on=imos_on×Rds_on is less than or equal to 0.8V, the on-loss of the MOS tube is Pmos_on=imos_on×Imos_on×D is less than or equal to 16W, the on-loss of the diodes in the traditional staggered BUCK circuit is far lower than that of the conventional staggered BUCK circuit, and the on-loss of the MOS tube is adopted to replace diodes, so that the efficiency of the conversion circuit is improved.
According to the BUCK conversion circuit provided by the embodiment of the application, through arranging the two BUCK modules distributed in a staggered mode, the MOS tube is adopted to replace the diode to carry out follow current, the on resistance of the follow current device is low, the circuit loss can be effectively reduced, and the circuit conversion efficiency is improved.
In some embodiments, the first inductor comprises a first winding and the second inductor comprises a second winding, the first winding and the second winding being wound on the same magnetic core structure.
In this embodiment, the first inductance and the second inductance are integrated, and are wound on the same magnetic core structure together in a magnetic integration mode, and the two inductances share one magnetic core, so that the power density can be effectively improved, and the cost is reduced.
In the related art, the traditional staggered BUCK circuit adopts two independent inductors, the inductors are generally customized workpieces, the two independent inductors are selected, the cost is high, and the size, the power and the density are low.
As shown in fig. 1, the first inductor and the second inductor in the embodiment of the present application are wound on the same magnetic core structure to form an integrated inductor L1, where the 1 pin and the 3 pin of the integrated inductor L1 are the same name end, and when the first MOS tube Q1 and the second MOS tube Q2 are alternately conducted, the magnetic induction intensity of the magnetic core of the integrated inductor L1 is the superposition of the magnetic induction intensities of two independent magnetic cores in the traditional staggered BUCK circuit, so that the power density can be effectively improved, and the cost is reduced.
In practical implementation, the magnetic core of the integrated inductor L1 can be an alloy magnetic powder core with high saturation magnetic induction intensity, so that the unsaturation of the inductor during operation is ensured.
As shown in fig. 1, drains of a first freewheeling MOS transistor Q3 and a second freewheeling MOS transistor Q4 of the buck conversion circuit are respectively connected to a 1 pin and a 3 pin of an integrated inductor L1, and a 2 pin and a 4 pin of the integrated inductor L1 are connected to an anode of a dc output end and output after being filtered by a second capacitor C4 of an output filter module.
It should be noted that, when the first MOS transistor Q1 and the second MOS transistor Q2 are turned off, the integrated inductor L1 freewheels through the body diodes inside the first freewheeling MOS transistor Q3 and the second freewheeling MOS transistor Q4, and then the PWM driving signal 3 and the PWM driving signal 4 control the first freewheeling MOS transistor Q3 and the second freewheeling MOS transistor Q4 to be turned on respectively, the integrated inductor L1 freewheels through the on-resistance inside the first freewheeling MOS transistor Q3 and the second freewheeling MOS transistor Q4, and the existence of the body diodes inside the first freewheeling MOS transistor Q3 and the second freewheeling MOS transistor Q4 ensures the continuity of the current when the integrated inductor L1 freewheels.
In some embodiments, a first absorption resistor and a first absorption capacitor are sequentially connected between the drain electrode and the source electrode of the first MOS tube, and a second absorption resistor and a second absorption capacitor are sequentially connected between the drain electrode and the source electrode of the second MOS tube;
a third absorption resistor and a third absorption capacitor are sequentially connected between the drain electrode and the source electrode of the first follow current MOS tube, and a fourth absorption resistor and a fourth absorption capacitor are sequentially connected between the drain electrode and the source electrode of the second follow current MOS tube.
As shown in fig. 2, a first absorption resistor R1 and a first absorption capacitor C1 are sequentially connected between the drain and the source of the first MOS transistor Q1, and a second absorption resistor R2 and a second absorption capacitor C2 are sequentially connected between the drain and the source of the second MOS transistor Q2.
A third absorption resistor R3 and a third absorption capacitor C5 are sequentially connected between the drain electrode and the source electrode of the first follow current MOS tube Q3, and a fourth absorption resistor R4 and a fourth absorption capacitor C6 are sequentially connected between the drain electrode and the source electrode of the second follow current MOS tube Q4.
In this embodiment, an absorption resistor and an absorption capacitor are connected between the drain D and the source S of each MOS transistor of the buck converter circuit, and are used to absorb the spike voltage generated by the parasitic inductance of the line when the MOS transistor is turned off, so as to prevent the spike voltage from exceeding the drain-source withstand voltage of the MOS transistor, thereby damaging the MOS transistor.
In some embodiments, the buck conversion circuit may further include a diode.
In this embodiment, the anode of the diode is connected to the anode of the dc output terminal, and the cathode of the diode is connected to the drains of the first MOS transistor and the second MOS transistor.
As shown in fig. 3, a diode D1 is added to the positive electrode of the dc input terminal, the negative electrode of the diode D1 is connected to the drain electrode Q2 of the first MOS transistor Q1 and the second MOS transistor, and the diode D1 is configured to prevent damage caused when the positive and negative polarities of the dc input are reversed.
In some embodiments, the buck conversion circuit may further include a common mode inductance and a filter capacitance.
In this embodiment, the first pin and the third pin of the common-mode inductor are respectively connected with two ends of the output filter module, the second pin and the fourth pin of the common-mode inductor are respectively connected with two ends of the filter capacitor, and two ends of the filter capacitor are respectively connected with the positive pole and the negative pole of the direct current output end.
As shown in fig. 4, the first pin 1 and the third pin 3 of the common-mode inductor L3 are respectively connected with two ends of a capacitor C4 of the output filter module, the second pin 2 and the fourth pin 4 of the common-mode inductor L3 are respectively connected with two ends of a filter capacitor C5, two ends of the filter capacitor C5 are respectively connected with the positive pole and the negative pole of the dc output end, and by adding the common-mode inductor L3 and the filter capacitor C5, the common-mode interference of the circuit is filtered, and the voltage ripple of the dc output of the buck conversion circuit is reduced.
The embodiment of the application also provides a direct current test power supply.
The direct current test power supply of the embodiment of the application comprises: the PFC correction circuit, at least one isolated DC/DC conversion circuit and at least one buck conversion circuit as described above.
The PFC correction circuit is a power factor correction (Power Factor Correction, PFC) circuit; the isolation DC/DC conversion circuit can convert direct-current voltage level to realize isolation between input and output.
In this embodiment, the isolated DC/DC conversion circuit is connected between the buck conversion circuit and the PFC correction circuit, and the isolated DC/DC conversion circuit is connected in one-to-one correspondence with the buck conversion circuit.
As shown in fig. 5, the PFC correction circuit may be a three-phase PFC correction circuit, and three-phase ac (a-phase, B-phase, and C-phase) is connected to the three-phase PFC correction circuit, and is converted into a stable DC output through power factor correction, and the positive and negative poles of the DC output of the three-phase PFC correction circuit are connected to the positive and negative poles of the inputs of the isolated DC/DC conversion circuit 1, the isolated DC/DC conversion circuit 2, and the isolated DC/DC conversion circuit 3, respectively.
The isolated DC/DC conversion is carried out to obtain stable direct current output, and the positive electrode and the negative electrode of the output of the isolated DC/DC conversion circuit 1, the isolated DC/DC conversion circuit 2 and the isolated DC/DC conversion circuit 3 are respectively connected with three BUCK conversion circuits, namely an interleaved BUCK circuit 1, an interleaved BUCK circuit 2 and an interleaved BUCK circuit 3, and the BUCK conversion circuits are used for BUCK output.
In this embodiment, the output cathode of the interleaved BUCK circuit 1 is connected to the output anode of the interleaved BUCK circuit 2, and the output cathode of the interleaved BUCK circuit 2 is connected to the output anode of the interleaved BUCK circuit 3.
The output voltage of the buck conversion circuit and the duty ratio D are in a direct proportion relation, the larger the duty ratio D is, the higher the output voltage of the buck conversion circuit is, the output of three buck conversion circuits in the direct current test power supply is in a serial structure, the output voltage range of the direct current test power supply adopting the serial structure is wider, and the use of different user scenes can be met.
According to the direct-current test power supply provided by the embodiment of the application, the BUCK conversion circuit of the direct-current test power supply is provided with the two BUCK modules distributed in a staggered mode, the MOS tube is adopted to replace the diode for follow current, the on-resistance of the follow current device is low, the circuit loss can be effectively reduced, and the circuit conversion efficiency is improved.
The terms first, second and the like in the description and in the claims, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged, as appropriate, such that embodiments of the present application may be implemented in sequences other than those illustrated or described herein, and that the objects identified by "first," "second," etc. are generally of a type and not limited to the number of objects, e.g., the first object may be one or more. Furthermore, in the description and claims, "and/or" means at least one of the connected objects, and the character "/", generally means that the associated object is an "or" relationship.
In the description of the present application, it should be understood that the directions or positional relationships indicated by the terms "inner", "outer", etc. are based on the directions or positional relationships shown in the drawings, are merely for convenience of description of the present application and to simplify the description, and do not indicate or imply that the apparatus or element in question must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present application.
In the description of the present application, "a first feature", "a second feature" may include one or more of the features.
In the description of the present application, the meaning of "plurality" is two or more.
In the description of this application, a first feature "above" or "below" a second feature may include both the first and second features being in direct contact, and may also include the first and second features not being in direct contact but being in contact by another feature therebetween.
In the description of this application, a first feature being "above," "over" and "on" a second feature includes the first feature being directly above and obliquely above the second feature, or simply indicating that the first feature is higher in level than the second feature.
In the description of the present specification, reference to the terms "one embodiment," "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
While embodiments of the present application have been shown and described, it will be understood by those of ordinary skill in the art that: many changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the application, the scope of which is defined by the claims and their equivalents.

Claims (10)

1. A buck converter circuit, comprising:
a DC input and a DC output;
the first BUCK module comprises a first MOS tube, a first follow current MOS tube and a first inductor, wherein the drain electrode of the first MOS tube is connected with the positive electrode of the direct current input end, the drain electrode of the first follow current MOS tube is connected with the source electrode of the first MOS tube, the source electrode of the first follow current MOS tube is connected with the negative electrode of the direct current input end, one end of the first inductor is connected with the drain electrode of the first follow current MOS tube, and the other end of the first inductor is connected with the positive electrode of the direct current output end;
the second BUCK module comprises a second MOS tube, a second follow current MOS tube and a second inductor, wherein the drain electrode of the second MOS tube is connected with the positive electrode of the direct current input end, the drain electrode of the second follow current MOS tube is connected with the source electrode of the second MOS tube, the source electrode of the second follow current MOS tube is connected with the negative electrode of the direct current input end, one end of the second inductor is connected with the drain electrode of the second follow current MOS tube, and the other end of the second inductor is connected with the positive electrode of the direct current output end;
the two ends of the input filter module are respectively connected with the positive electrode and the negative electrode of the direct current input end;
and two ends of the output filter module are respectively connected with the positive electrode and the negative electrode of the direct current output end.
2. The buck conversion circuit according to claim 1, wherein the first inductor includes a first winding and the second inductor includes a second winding, the first winding and the second winding being wound on a same magnetic core structure.
3. The buck conversion circuit according to claim 1, wherein a first absorption resistor and a first absorption capacitor are sequentially connected between the drain electrode and the source electrode of the first MOS transistor, and a second absorption resistor and a second absorption capacitor are sequentially connected between the drain electrode and the source electrode of the second MOS transistor;
the drain electrode and the source electrode of the first follow current MOS tube are sequentially connected with a third absorption resistor and a third absorption capacitor, and the drain electrode and the source electrode of the second follow current MOS tube are sequentially connected with a fourth absorption resistor and a fourth absorption capacitor.
4. The buck conversion circuit according to claim 1, further comprising:
and the anode of the diode is connected with the anode of the direct current output end, and the cathode of the diode is connected with the drains of the first MOS tube and the second MOS tube.
5. The buck conversion circuit according to claim 1, further comprising:
the first pin and the third pin of the common mode inductor are respectively connected with two ends of the output filter module, the second pin and the fourth pin of the common mode inductor are respectively connected with two ends of the filter capacitor, and two ends of the filter capacitor are respectively connected with an anode and a cathode of the direct current output end.
6. The buck conversion circuit according to claim 1, wherein a gate of the first freewheeling MOS transistor is configured to receive a first pwm signal, and a duty cycle of the first pwm signal is 0.5; the grid electrode of the second follow current MOS tube is used for receiving a second pulse width modulation signal, and the duty ratio of the second pulse width modulation signal is 0.5.
7. The buck conversion circuit according to claim 1, wherein the withstand voltage of the first and second freewheel MOS transistors is less than 650Vdc, and the on-resistance of the first and second freewheel MOS transistors is less than 20mΩ.
8. The buck conversion circuit according to any one of claims 1-7, wherein the input filter module includes a first capacitor, two ends of the first capacitor being connected to the positive and negative poles of the dc input terminal, respectively.
9. The buck conversion circuit according to any one of claims 1-7, wherein the output filter module includes a second capacitor, and two ends of the second capacitor are connected to the positive pole and the negative pole of the dc output terminal, respectively.
10. A dc test power supply, comprising:
PFC correction circuit, at least one isolated DC/DC conversion circuit and at least one buck conversion circuit according to any of claims 1 to 9, the isolated DC/DC conversion circuit being connected between the buck conversion circuit and the PFC correction circuit, the isolated DC/DC conversion circuit being connected in one-to-one correspondence with the buck conversion circuit.
CN202321994247.0U 2023-07-25 2023-07-25 Step-down conversion circuit and direct-current test power supply Active CN220629188U (en)

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Application Number Priority Date Filing Date Title
CN202321994247.0U CN220629188U (en) 2023-07-25 2023-07-25 Step-down conversion circuit and direct-current test power supply

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202321994247.0U CN220629188U (en) 2023-07-25 2023-07-25 Step-down conversion circuit and direct-current test power supply

Publications (1)

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CN220629188U true CN220629188U (en) 2024-03-19

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202321994247.0U Active CN220629188U (en) 2023-07-25 2023-07-25 Step-down conversion circuit and direct-current test power supply

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CN (1) CN220629188U (en)

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