CN220399766U - Repairable Dual-Gate driving mode array substrate and display - Google Patents

Repairable Dual-Gate driving mode array substrate and display Download PDF

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Publication number
CN220399766U
CN220399766U CN202322243985.8U CN202322243985U CN220399766U CN 220399766 U CN220399766 U CN 220399766U CN 202322243985 U CN202322243985 U CN 202322243985U CN 220399766 U CN220399766 U CN 220399766U
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China
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tft switch
line
scanning line
repair
dual
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CN202322243985.8U
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Chinese (zh)
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张婷
庄崇营
李林
唐雨琪
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Truly Semiconductors Ltd
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Truly Semiconductors Ltd
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Priority to CN202322243985.8U priority Critical patent/CN220399766U/en
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Abstract

The utility model discloses a repairable Dual-Gate driving mode array substrate and a display, wherein the substrate comprises data lines, scanning line groups, repair line groups and TFT switch pairs, the TFT switch pairs are arranged in a display area, each TFT switch pair comprises a first TFT switch and a second TFT switch, each scanning line group comprises a first scanning line and a second scanning line, each TFT switch pair is connected with the same data line, the first scanning line is connected with the first TFT switch, the second scanning line is connected with the second TFT switch, the first repair line is parallel to the data lines and is arranged between two adjacent rows of TFT switch pairs, the second repair line is parallel to the scanning line groups and is arranged at the upper end of the display area, the third repair line is parallel to the scanning line groups and is arranged at the lower end of the display area, and the upper end and the lower end of the first repair line are respectively connected with the second repair line and the third repair line. The added repair line group can replace the broken data line, so that the TFT switch connected with the broken data line can be repaired.

Description

Repairable Dual-Gate driving mode array substrate and display
Technical Field
The utility model relates to the technical field of liquid crystal display, in particular to a repairable Dual-Gate driving mode array substrate and a display.
Background
One of the most widely used displays at present is the liquid crystal display. The liquid crystal display is to realize image display by changing the electric field intensity on the liquid crystal molecules. The main component of the liquid crystal display includes an array substrate for providing an electric field. The array substrate is provided with a plurality of pixel electrodes related to an electric field, and the voltage and the on-off of the pixel electrodes are controlled by a Thin Film Transistor (TFT) connected with the pixel electrodes. TFTs have a function of controlling current conduction, and are thus often used as pixel switches of liquid crystal displays or organic light emitting diode displays. In recent years, in order to improve the current-carrying capability of a TFT, a TFT having a Dual-Gate structure is also receiving attention from the industry.
With the continuous development of the TFT-LCD industry, the market demand for displays is increasing. Economy is a key factor for improving market competitiveness of a display, and advantages of economy include low power consumption, low use cost, low production cost and the like. The product adopting the Dual-Gate driving mode not only can reduce the product cost in the aspect of IC, but also can design an ultra-narrow chin screen, so that the product is more attractive.
The existing Dual-Gate driving mode array substrate and display have many uncontrollable factors in the process, such as the failure of a circuit caused by the breakage of one or more data lines due to static electricity, dust, exposure and the like, which results in defective products.
Disclosure of Invention
The utility model aims at overcoming the defects of the prior art and providing a repairable Dual-Gate driving mode array substrate and a display.
In order to solve the technical problems, the utility model provides the following technical scheme:
the utility model provides a repairable Dual-Gate drive mode array substrate which characterized in that: the display device comprises a data line, a scanning line group, a repair line group and a TFT switch pair, wherein the data line and the scanning line group are crossed to form a plurality of pixel areas, the pixel areas form a display area, the TFT switch pair is arranged in the display area, each TFT switch pair comprises a first TFT switch and a second TFT switch, each TFT switch pair comprises a first scanning line and a second scanning line, each TFT switch pair is connected with the same data line, the first scanning line is connected with the first TFT switch, the second scanning line is connected with the second TFT switch, the repair line group comprises a first repair line, a second repair line and a third repair line, the first repair line is parallel to the data line and is arranged between two adjacent rows of TFT switch pairs, the second repair line is parallel to the scanning line group and is arranged at the upper end of the display area, the third repair line is parallel to the scanning line group and is arranged at the lower end of the display area, and the upper end and the lower end of the first repair line is respectively connected with the second repair line and the third repair line.
Further, the first scanning line is horizontally disposed on an upper side of the TFT switch pair, and the second scanning line is horizontally disposed on a lower side of the TFT switch pair.
Further, the data line is disposed between the first TFT switch and the second TFT switch of each group of TFT switch pairs.
Further, the data line connects the first TFT switch source and the second TFT switch source.
Further, the first scanning line is connected with the first TFT switch grid electrode.
Further, the second scanning line is connected with a second TFT switch grid.
Further, the repair line group is insulated from the data line and the scanning line group before repair.
Further, at least one first repair line is arranged between two adjacent columns of TFT switch pairs.
Further, the data line and the scan line group are connected to the IC.
A display, characterized in that: the Dual-Gate drive mode array substrate comprises any one of the repairable Dual-Gate drive mode array substrate.
Compared with the prior art, the utility model has the beneficial effects that:
1. this patent is through the repairable design of a Dual-Gate drive mode data line, through the repair line group that increases in this design, can replace cracked data line for the TFT switch that links to each other with cracked data line can be repaired, thereby makes the product can normally show, greatly reduced manufacturing cost, increased product market competition, especially to large and medium size display screen.
2. The repair line can shade light, improve the contrast of the display screen and can not occupy the pixel space.
Drawings
FIG. 1 is a schematic diagram of a structure of an embodiment of the present utility model;
FIG. 2 is a schematic diagram of a repair principle according to an embodiment of the present utility model;
wherein: 1-data line, 2-TFT switch pair, 3-display region, 4-first TFT switch, 5-second TFT switch, 6-first scan line, 7-second scan line, 8-first repair line, 9-second repair line, 10-third repair line, 11-IC.
Detailed Description
In order to enhance the understanding of the present utility model, the present utility model will be further described in detail with reference to the drawings, which are provided for the purpose of illustrating the present utility model only and are not to be construed as limiting the scope of the present utility model.
In the description of the present utility model, it should be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like indicate orientations or positional relationships based on the orientation or positional relationships shown in the drawings, merely to facilitate describing the present utility model and simplify the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the present utility model.
Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first", "a second", or a third "may explicitly or implicitly include one or more such feature. In the description of the present utility model, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
In the present utility model, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "secured," "disposed," and the like are to be construed broadly and may be, for example, fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, or can be communicated between two elements or the interaction relationship between the two elements. The specific meaning of the above terms in the present utility model can be understood by those of ordinary skill in the art according to the specific circumstances.
Example 1
As shown in fig. 1, a repairable Dual-Gate driving mode array substrate includes a data line 1, a scan line group, a repair line group, and a TFT switch pair 2, where the data line 1 and the scan line group are disposed to intersect to form a plurality of pixel areas, the plurality of pixel areas form a display area 3, and the TFT switch pair 2 is disposed in the display area 3.
Wherein, each group of TFT switch pairs 2 includes a first TFT switch 4 and a second TFT switch 5, each group of scanning lines includes a first scanning line 6 and a second scanning line 7, the first scanning line 6 is horizontally disposed on the upper side of the TFT switch pairs 2, and the second scanning line 7 is horizontally disposed on the lower side of the TFT switch pairs 2. The first scanning line 6 is connected with the grid electrode of the first TFT switch 4, and the second scanning line 7 is connected with the grid electrode of the second TFT switch 5.
Each group of TFT switch pairs 2 is connected to the same data line 1, the data line 1 being arranged between the first TFT switch 4 and the second TFT switch 5 of each group of TFT switch pairs 2. The data line 1 connects the source of the first TFT switch 4 and the source of the second TFT switch 5.
The repair line group comprises a first repair line 8, a second repair line 9 and a third repair line 10, wherein the first repair line 8 is parallel to the data line 1 and arranged between two adjacent rows of TFT switch pairs 2, and at least one first repair line 8 is arranged between the two adjacent rows of TFT switch pairs 2. The second repair line 9 is parallel to the scan line group and arranged at the upper end of the display area 3, the third repair line 10 is parallel to the scan line group and arranged at the lower end of the display area 3, and the upper and lower ends of the first repair line 8 are respectively connected with the second repair line 9 and the third repair line 10. The repair line group is insulated from the data line 1 and the scanning line group before repair.
The data line 1 and the scan line group are connected to an IC11 (integrated circuit chip).
The data line repairing principle of the first embodiment is shown in fig. 2, and by controlling the laser energy, a single metal line can be fused, and the two metal lines which are overlapped can be fused into one principle. When the point A in se:Sub>A certain datse:Sub>A line 1 is broken, the point B and the point D in the second repair line 9 are fused by laser, the point E and the point G in the third repair line 10 are fused by laser, the point C of the intersection point between the second repair line 9 and the datse:Sub>A line 1 where the point A is positioned is fused by laser, and the point F of the intersection point between the third repair line 10 and the datse:Sub>A line 1 where the point A is positioned is fused by laser, so that se:Sub>A datse:Sub>A line signal transmission path of F-I-H-C-A is formed, the broken point A can be bypassed, signals are provided for the TFT switch pair 2 on the datse:Sub>A line 1 where the point A is positioned, and the effect of equivalently repairing the point A is achieved.
Example two
A display employing a repairable Dual-Gate drive mode array substrate in accordance with the first embodiment.
The foregoing detailed description will set forth only for the purposes of illustrating the general principles and features of the utility model, and is not meant to limit the scope of the utility model in any way, but rather should be construed in view of the appended claims.

Claims (10)

1. The utility model provides a repairable Dual-Gate drive mode array substrate which characterized in that: including data line (1), scanning line group, repair line group, TFT switch pair (2), data line (1) and scanning line group alternately set up and form a plurality of pixel regions, a plurality of pixel regions are constituteed and are shown district (3), TFT switch pair (2) are set up in show district (3), every group TFT switch pair (2) include a first TFT switch (4) and a second TFT switch (5), every group the scanning line group includes a first scanning line (6) and a second scanning line (7), every group TFT switch pair (2) connect same data line (1), first TFT switch (4) are connected to first scanning line (6), second TFT switch (5) are connected to second scanning line (7), repair line group includes first repair line (8), second repair line (9) and third repair line (10), first repair line (8) are on a parallel with data line (1) and are set up between two adjacent TFT switch pairs (2), second repair line (9) are in parallel with one and are in the second and are held in the area (3) and are in the setting up respectively to the second repair line (9) and are in the second end (3) is in parallel with the setting up of second repair line (3).
2. The repairable Dual-Gate drive mode array substrate of claim 1, wherein: the first scanning line (6) is horizontally arranged on the upper side of the TFT switch pair (2), and the second scanning line (7) is horizontally arranged on the lower side of the TFT switch pair (2).
3. The repairable Dual-Gate drive mode array substrate of claim 1, wherein: the data lines (1) are arranged between the first TFT switch (4) and the second TFT switch (5) of each group of TFT switch pairs (2).
4. The repairable Dual-Gate drive mode array substrate of claim 1, wherein: the data line (1) is connected with the source electrode of the first TFT switch (4) and the source electrode of the second TFT switch (5).
5. The repairable Dual-Gate drive mode array substrate of claim 1, wherein: the first scanning line (6) is connected with the grid electrode of the first TFT switch (4).
6. The repairable Dual-Gate drive mode array substrate of claim 1, wherein: the second scanning line (7) is connected with the grid electrode of the second TFT switch (5).
7. The repairable Dual-Gate drive mode array substrate of claim 1, wherein: the repair line group is mutually insulated with the data line (1) and the scanning line group before repair.
8. The repairable Dual-Gate drive mode array substrate of claim 1, wherein: at least one first repair line (8) is arranged between two adjacent columns of TFT switch pairs (2).
9. The repairable Dual-Gate drive mode array substrate of claim 1, wherein: the data line (1) and the scanning line group are connected with the IC (11).
10. A display, characterized in that: a Dual-Gate drive mode array substrate comprising the repairable as set forth in any one of claims 1-9.
CN202322243985.8U 2023-08-18 2023-08-18 Repairable Dual-Gate driving mode array substrate and display Active CN220399766U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202322243985.8U CN220399766U (en) 2023-08-18 2023-08-18 Repairable Dual-Gate driving mode array substrate and display

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202322243985.8U CN220399766U (en) 2023-08-18 2023-08-18 Repairable Dual-Gate driving mode array substrate and display

Publications (1)

Publication Number Publication Date
CN220399766U true CN220399766U (en) 2024-01-26

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