CN220382943U - Power management chip and switching power management system - Google Patents
Power management chip and switching power management system Download PDFInfo
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Abstract
The utility model relates to the technical field of power management, in particular to a power management chip and a switching power management system, wherein the power management chip comprises: the system comprises a power supply voltage sampling module, a load current sampling module and a calculation processing module; the power supply voltage sampling module is used for acquiring the power supply voltage output by the power supply and sending a power supply voltage signal to the calculation processing module; the load current sampling module is used for acquiring the current of the load end and sending a load current signal to the calculation processing module; the calculation processing module is used for respectively calculating the output efficiency in the PSM modulation mode and the output efficiency in the PWM modulation mode according to the power supply voltage signal and the load current signal, and selecting an optimal modulation mode to output to the external switch. Compared with the prior art, the utility model can calculate the modulation mode with the optimal output efficiency through the calculation processing module and output the modulation mode to the external switch, and can flexibly cope with the change of the load.
Description
Technical Field
The present utility model relates to the field of power management technologies, and in particular, to a power management chip and a switching power management system.
Background
At present, two most common modulation modes of the current switching power supply are respectively as follows: pulse Width Modulation (PWM), pulse cross-period modulation (PSM), PWM (frequency is constant, pulse width is continuously adjusted), PSM (frequency and pulse width are both constant, and pulse is sometimes absent). Both modes have advantages and disadvantages, the output efficiency of the PSM is higher under light load, and the PWM modulation mode under medium and heavy load still has advantages, so that the dual-mode modulation mode of the PSM or PWM is popular.
The foregoing is provided merely for the purpose of facilitating understanding of the technical solutions of the present utility model and is not intended to represent an admission that the foregoing is prior art.
Disclosure of Invention
The utility model mainly aims to provide a power management chip and a switching power management system, and aims to solve the technical problems that in the prior art, a PSM or PWM modulation mode is adopted to control the output of a switching power supply, the output efficiency is poor, and the change of the load size cannot be flexibly dealt with.
To achieve the above object, the present utility model provides a power management chip, including: the system comprises a power supply voltage sampling module, a load current sampling module and a calculation processing module;
the power supply voltage sampling module is respectively connected with a power supply and the calculation processing module, the calculation processing module is respectively connected with the load current sampling module and an external switch, and the load current sampling module is connected with a load;
the power supply voltage sampling module is used for acquiring the power supply voltage output by the power supply and sending a power supply voltage signal to the calculation processing module;
the load current sampling module is used for acquiring the current of the load end and sending a load current signal to the calculation processing module;
the calculation processing module is used for calculating the output efficacy under the PSM modulation mode and the output efficacy under the PWM modulation mode according to the power supply voltage signal and the load current signal respectively;
the calculation processing module is further configured to output a PSM control signal to the external switch if the output efficiency in the PSM modulation mode is greater than the output efficiency in the PWM modulation mode, and otherwise output a PWM control signal to the external switch.
Optionally, the power supply voltage sampling module is: a voltage analog-to-digital converter;
the voltage analog-to-digital converter is respectively connected with the power supply and the calculation processing module;
the voltage analog-to-digital converter is used for acquiring the power supply voltage output by the power supply, performing analog-to-digital conversion on the power supply voltage output by the power supply to acquire a power supply voltage digital signal, and sending the power supply voltage digital signal to the calculation processing module, wherein the power supply voltage digital signal is a power supply voltage signal.
Optionally, the load current sampling module includes: a current analog-to-digital converter and a load current sampling circuit;
the load current sampling circuit is respectively connected with the load and the current analog-to-digital converter, and the current analog-to-digital converter is connected with the calculation processing module;
the load current sampling circuit is used for acquiring the current of the load end and sending a load current analog signal to the current analog-to-digital converter;
the current analog-to-digital converter is used for carrying out analog-to-digital conversion on the load current analog signal to obtain a load current digital signal, and sending the load current digital signal to the calculation processing module, wherein the load current digital signal is a load current signal.
Optionally, the computing processing module includes: a processor, a digital interface circuit and a signal transmitting unit;
the processor is connected with the digital interface circuit, the digital interface circuit is respectively connected with the voltage analog-to-digital converter, the signal sending unit and the current analog-to-digital converter, and the signal sending unit is connected with the external switch;
the digital interface circuit is used for transmitting the power supply voltage digital signal and the load current digital signal to the processor;
the processor is used for respectively calculating the output efficacy under the PSM modulation mode and the output efficacy under the PWM modulation mode according to the power supply voltage digital signal and the load current digital signal;
the processor is further configured to output a high-level signal to the signal sending unit through the digital interface circuit if the output efficiency in the PSM modulation mode is greater than the output efficiency in the PWM modulation mode, and otherwise output a low-level signal to the signal sending unit through the digital interface circuit;
the signal transmitting unit is configured to output a PSM control signal to the external switch when the high-level signal is received, and output a PWM control signal to the external switch when the low-level signal is received.
Optionally, the signal transmitting unit includes: a PSM signal transmitter, a PWM signal transmitter, a PSM turn-on subunit and a PWM turn-on subunit;
the PSM conduction subunit is respectively connected with the power supply, the PSM signal transmitter and the digital interface circuit, the PWM conduction subunit is respectively connected with the power supply, the PWM signal transmitter and the digital interface circuit, and the PSM conduction subunit and the PWM conduction subunit are also connected with the external switch;
the PSM conduction subunit is used for conducting a loop between the power supply and the PSM signal transmitter when the high-level signal is received, so that the power supply outputs a power supply voltage to the PSM signal transmitter;
the PSM signal transmitter is used for outputting a PSM control signal to the external switch when receiving the power supply voltage output by the power supply;
the PWM conduction subunit is used for conducting a loop between the power supply and the PWM signal transmitter when the low-level signal is received, so that the power supply outputs a power supply voltage to the PWM signal transmitter;
the PWM signal transmitter is used for outputting a PWM control signal to the external switch when receiving the power supply voltage output by the power supply.
Optionally, the PSM-on subunit includes: the first resistor, the second resistor, the first MOS tube and the first triode are arranged on the first MOS tube;
the source electrode of the first MOS tube is connected with the power supply and one end of the first resistor respectively, the grid electrode of the first MOS tube is connected with the other end of the first resistor and the collector electrode of the first triode through the second resistor respectively, the drain electrode of the first MOS tube is connected with the PSM signal transmitter, the base electrode of the first triode is connected with the digital interface circuit, and the emitter electrode of the first triode is grounded.
Optionally, the PWM on subunit includes: the third resistor and the second MOS tube;
the source electrode of the second MOS tube is connected with one end of the third resistor and the power supply respectively, the grid electrode of the second MOS tube is connected with the other end of the third resistor and the digital interface circuit respectively, and the drain electrode of the second MOS tube is connected with the PWM signal transmitter.
In addition, the utility model also provides a switching power supply management system, which comprises: a power module, a drive module, an output module, and a power management chip as described above;
the power module is respectively connected with 220V alternating current, a power end of the power management chip and the output module, the driving module is connected with the driving end of the power management chip and the output module, and the output module is connected with the load and a load current sampling end of the power management chip.
Optionally, the power module includes: the first diode, the second diode, the third resistor and the fourth resistor are connected with the first capacitor;
the first diode to the fourth diode form a rectifier bridge, the input end of the rectifier bridge is connected with the 220V alternating current, the output end of the rectifier bridge is connected with the output module and grounded through a first capacitor, and the 220V alternating current is positively connected with the fifth diode and the sixth diode and is connected to the power end of the power management chip through a fourth resistor.
Optionally, the driving module includes: the fifth resistor, the sixth resistor, the seventh resistor and the second triode, and the output module comprises: a transformer and a seventh diode;
the power supply management device comprises a power supply management chip, a power supply resistor, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a collector of the second triode, a load current sampling end of the power supply management chip and a load current sampling end of the power supply management chip, wherein one end of the sixth resistor is connected with a base of the second diode, the other end of the sixth resistor is connected with the driving end of the power supply management chip and is grounded through the fifth resistor, the emitter of the second triode is grounded through the seventh resistor, the collector of the second triode is connected with the input end of the transformer, one end of an output end of the transformer is grounded, the other end of the output end of the transformer is connected with the anode of the seventh diode, and the cathode of the seventh diode is connected with the load and the load current sampling end of the power supply management chip respectively.
The utility model provides a power management chip and a switching power management system, wherein the power management chip comprises: the system comprises a power supply voltage sampling module, a load current sampling module and a calculation processing module; the power supply voltage sampling module is respectively connected with a power supply and the calculation processing module, the calculation processing module is respectively connected with the load current sampling module and an external switch, and the load current sampling module is connected with a load; the power supply voltage sampling module is used for acquiring the power supply voltage output by the power supply and sending a power supply voltage signal to the calculation processing module; the load current sampling module is used for acquiring the current of the load end and sending a load current signal to the calculation processing module; the calculation processing module is used for calculating the output efficacy under the PSM modulation mode and the output efficacy under the PWM modulation mode according to the power supply voltage signal and the load current signal respectively; the calculation processing module is further configured to output a PSM control signal to the external switch if the output efficiency in the PSM modulation mode is greater than the output efficiency in the PWM modulation mode, and otherwise output a PWM control signal to the external switch. Compared with the prior art, the PSM modulation mode output power supply device can calculate the output power under the PSM modulation mode and the output power under the PWM modulation mode through the calculation processing module, so that the modulation mode with the best output power is selected to be output to an external switch, and the change of the load size can be flexibly dealt with.
Drawings
In order to more clearly illustrate the embodiments of the present utility model or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, and it is obvious that the drawings in the following description are only some embodiments of the present utility model, and other drawings may be obtained according to the structures shown in these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a first embodiment of a power management chip according to an embodiment of the present utility model;
fig. 2 is a schematic structural diagram of a second embodiment of a power management chip according to an embodiment of the present utility model;
fig. 3 is a schematic structural diagram of a switching power supply management system according to an embodiment of the present utility model.
Reference numerals illustrate:
the achievement of the objects, functional features and advantages of the present utility model will be further described with reference to the accompanying drawings, in conjunction with the embodiments.
Detailed Description
It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the utility model.
The following description of the embodiments of the present utility model will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all embodiments of the utility model. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
It should be noted that all directional indicators (such as up, down, left, right, front, and rear … …) in the embodiments of the present utility model are merely used to explain the relative positional relationship, movement, etc. between the components in a particular posture (as shown in the drawings), and if the particular posture is changed, the directional indicator is changed accordingly.
Furthermore, the description of "first," "second," etc. in this disclosure is for descriptive purposes only and is not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions of the embodiments may be combined with each other, but it is necessary to base that the technical solutions can be realized by those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the technical solutions should be considered that the combination does not exist and is not within the scope of protection claimed by the present utility model.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a first embodiment of a power management chip according to an embodiment of the present utility model.
Based on fig. 1, a first embodiment of the power management chip of the present utility model is presented.
In this embodiment, the power management chip includes: the system comprises a power supply voltage sampling module 1, a load current sampling module 3 and a calculation processing module 2;
the power supply voltage sampling module 1 is respectively connected with a power supply and the calculation processing module 2, the calculation processing module 2 is respectively connected with the load current sampling module 3 and an external switch, and the load current sampling module 3 is connected with a load;
the power supply voltage sampling module 1 is configured to obtain a power supply voltage output by the power supply, and send a power supply voltage signal to the computing processing module 2;
the load current sampling module 3 is configured to obtain a current of the load end, and send a load current signal to the calculation processing module 2;
the calculation processing module 2 is configured to calculate an output efficiency in a PSM modulation mode and an output efficiency in a PWM modulation mode according to the power supply voltage signal and the load current signal, respectively;
the calculation processing module 2 is further configured to output a PSM control signal to the external switch if the output efficiency in the PSM modulation mode is greater than the output efficiency in the PWM modulation mode, or output a PWM control signal to the external switch if the output efficiency in the PSM modulation mode is not greater than the output efficiency in the PWM modulation mode.
The power voltage signal is the power voltage output by the power supply acquired by the power voltage sampling module 1, and the load current signal is the current acquired by the load current sampling module 3 at the load end, which can be understood as the output current. The output power in the PSM modulation mode and the output power in the PWM modulation mode may be calculated according to the following formulas,
wherein eta is the output efficacy in PSM modulation mode or PWM modulation mode, P out For the output effect of the power management chip, P loss The loss effect of the power management chip is achieved.
It should be understood that the output power of the power management chip and the loss power of the power management chip can be calculated according to the power voltage signal, the load current signal and the device parameters of the power management chip input in advance.
In this embodiment, the power management chip includes: the system comprises a power supply voltage sampling module 1, a load current sampling module 3 and a calculation processing module 2; the power supply voltage sampling module 1 is respectively connected with a power supply and the calculation processing module 2, the calculation processing module 2 is respectively connected with the load current sampling module 3 and an external switch, and the load current sampling module 3 is connected with a load; the power supply voltage sampling module 1 is configured to obtain a power supply voltage output by the power supply, and send a power supply voltage signal to the computing processing module 2; the load current sampling module 3 is configured to obtain a current of the load end, and send a load current signal to the calculation processing module 2; the calculation processing module 2 is configured to calculate an output efficiency in a PSM modulation mode and an output efficiency in a PWM modulation mode according to the power supply voltage signal and the load current signal, respectively; the calculation processing module 2 is further configured to output a PSM control signal to the external switch if the output efficiency in the PSM modulation mode is greater than the output efficiency in the PWM modulation mode, or output a PWM control signal to the external switch if the output efficiency in the PSM modulation mode is not greater than the output efficiency in the PWM modulation mode. Compared with the prior art, the utility model can calculate the output efficiency under the PSM modulation mode and the output efficiency under the PWM modulation mode through the calculation processing module 2, so as to select the modulation mode with the best output efficiency to output to an external switch, and can flexibly cope with the change of the load.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a second embodiment of a power management chip according to an embodiment of the present utility model.
Since the current at the load end and the power supply voltage output by the power supply are generally collected as analog signals, which is unfavorable for the calculation processing module 2 to calculate the output efficiency in the PSM modulation mode and the output efficiency in the PWM modulation mode, based on the above embodiment, as shown in fig. 2, in this embodiment, the power supply voltage sampling module 1 is: a voltage analog-to-digital converter 11;
wherein, the voltage analog-to-digital converter 11 is respectively connected with the power supply and the calculation processing module 2;
the voltage analog-to-digital converter 11 is configured to obtain a power supply voltage output by the power supply, perform analog-to-digital conversion on the power supply voltage output by the power supply to obtain a power supply voltage digital signal, and send the power supply voltage digital signal to the calculation processing module 2, where the power supply voltage digital signal is a power supply voltage signal.
The load current sampling module 3 includes: a current analog-to-digital converter 32 and a load current sampling circuit 31;
the load current sampling circuit 31 is respectively connected with the load and the current analog-to-digital converter 32, and the current analog-to-digital converter 32 is connected with the calculation processing module 2;
the load current sampling circuit 31 is configured to obtain a current of the load end, and send a load current analog signal to the current analog-to-digital converter 32;
the current analog-to-digital converter 32 is configured to perform analog-to-digital conversion on a load current analog signal to obtain a load current digital signal, and send the load current digital signal to the calculation processing module 2, where the load current digital signal is a load current signal.
It should be noted that, since the load will change according to the actual situation, the load current sampling circuit 31 can collect the current at the load end in real time and send a load current analog signal to the current analog-to-digital converter 32, and the current analog-to-digital converter 32 can also perform analog-to-digital conversion on the load current analog signal in real time to obtain a load current digital signal, and send the load current digital signal to the calculation processing module 2, and the calculation processing module 2 calculates the output efficiency in the PSM modulation mode and the output efficiency in the PWM modulation mode in real time according to the supply voltage signal and the load current signal, so as to ensure that the optimal modulation mode is output to the external switch at each moment.
Further, the calculation processing module 2 includes: a processor 21, a digital interface circuit 22, and a signal transmission unit 23;
wherein the processor 21 is connected to the digital interface circuit 22, the digital interface circuit 22 is respectively connected to the voltage analog-to-digital converter 11, the signal transmitting unit 23 and the current analog-to-digital converter 32, and the signal transmitting unit 23 is connected to the external switch;
the digital interface circuit 22 is configured to transmit the power supply voltage digital signal and the load current digital signal to the processor 21;
the processor 21 is configured to calculate an output efficiency in the PSM modulation mode and an output efficiency in the PWM modulation mode according to the power supply voltage digital signal and the load current digital signal, respectively;
the processor 21 is further configured to output a high-level signal to the signal transmitting unit 23 through the digital interface circuit 22 if the output power in the PSM modulation mode is greater than the output power in the PWM modulation mode, and otherwise output a low-level signal to the signal transmitting unit 23 through the digital interface circuit 22;
the signal transmitting unit 23 is configured to output a PSM control signal to the external switch when the high level signal is received, and output a PWM control signal to the external switch when the low level signal is received.
The digital interface circuit 22 may receive a digital signal, and may transmit a digital signal, for example, the received power supply voltage digital signal and the load current digital signal, and the transmitted high-level signal and low-level signal. The processor 21 may be a CPU, DSP, MCU, or the like, which is not limited in this embodiment. The high level signal may be a "1" signal, and the low level signal may be a "0" signal.
Further, the signal transmission unit 23 includes: a PSM signal transmitter 231, a PWM signal transmitter 232, a PSM on subunit 234, and a PWM on subunit 233;
wherein, the PSM on subunit 234 is connected to the power supply, the PSM signal transmitter 231, and the digital interface circuit 22, the PWM on subunit 233 is connected to the power supply, the PWM signal transmitter 232, and the digital interface circuit 22, respectively, and the PSM on subunit 234 and the PWM on subunit 233 are also connected to the external switch;
the PSM on subunit 234 is configured to, when receiving the high-level signal, turn on a loop between the power supply and the PSM signal transmitter 231, so that the power supply outputs a power supply voltage to the PSM signal transmitter 231;
the PSM signal transmitter 231 is configured to output a PSM control signal to the external switch when receiving a power supply voltage output from the power supply;
the PWM on subunit 233 is configured to, when receiving the low level signal, turn on a loop between the power supply and the PWM signal transmitter 232, so that the power supply outputs a power supply voltage to the PWM signal transmitter 232;
the PWM signal transmitter 232 is configured to output a PWM control signal to the external switch when receiving the power supply voltage output by the power supply.
The high level signal may control the PSM on subunit 234 to be turned on so that the power supply voltage output by the power supply supplies power to the PSM signal transmitter 231, and the PSM signal transmitter 231 may perform PSM modulation on the power supply voltage output by the power supply, and output the power supply voltage output by the PSM modulation to the external switch to drive the external switch to operate, where the PSM control signal is the power supply voltage output by the PSM modulation. The low-level signal can control the PWM on subunit 233 to be turned on, so that the power supply voltage output by the power supply source is supplied to the PWM signal transmitter 232, and the PWM signal transmitter 232 can perform PWM modulation on the power supply voltage output by the power supply source, and output the power supply voltage output by the PWM modulated power supply source to the external switch to drive the external switch to act, where the PWM control signal is the power supply voltage output by the PWM modulated power supply source.
Further, the PSM-on subunit 234 includes: the first MOS transistor comprises a first resistor R1, a second resistor R2, a first MOS transistor Q1 and a first triode VT1;
the source of the first MOS transistor Q1 is connected to the power supply and one end of the first resistor R1, the gate of the first MOS transistor Q1 is connected to the other end of the first resistor R1 and the collector of the first triode VT1 through the second resistor R2, the drain of the first MOS transistor Q1 is connected to the PSM signal transmitter 231, the base of the first triode VT1 is connected to the digital interface circuit 22, and the emitter of the first triode VT1 is grounded.
It should be noted that, the first resistor R1 is a voltage dividing resistor, the second resistor R2 is a current limiting resistor, when the base of the first triode VT1 receives the high level signal sent by the digital interface circuit 22, the emitter of the first triode VT1 is grounded, the first triode VT1 is turned on, the current output by the power supply flows through the first resistor R1, the first resistor R1 divides the voltage, a certain voltage drop is generated between the source of the first MOS transistor Q1 and the gate of the first MOS transistor Q1, the first MOS transistor Q1 is turned on, and the power supply voltage output by the power supply is delivered to the PSM signal transmitter 231.
Further, the PWM on subunit 233 includes: the third resistor R3 and the second MOS tube Q2;
the source of the second MOS transistor Q2 is connected to one end of the third resistor R3 and the power supply, the gate of the second MOS transistor Q2 is connected to the other end of the third resistor R3 and the digital interface circuit 22, and the drain of the second MOS transistor Q2 is connected to the PWM signal transmitter 232.
The third resistor R3 is a voltage dividing resistor, when the gate of the second MOS transistor Q2 receives the low-level signal sent by the digital interface circuit 22, the current output by the power supply flows through the third resistor R3, the third resistor R3 divides the voltage, a certain voltage drop is generated between the source of the second MOS transistor Q2 and the gate of the second MOS transistor Q2, the second MOS transistor Q2 is turned on, and the power supply voltage output by the power supply is sent to the PWM signal transmitter 232.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a switching power management system according to an embodiment of the present utility model;
as shown in fig. 3, the switching power supply management system includes: a power module 4, an output module 6, an output module 5 and a power management chip as described above;
the power module 4 is respectively connected with 220V alternating current, a power end VCC of the power management chip and the output module 5, the output module 6 is connected with a driving end DRV of the power management chip and the output module 5, and the output module 5 is connected with the load and a load current sampling end CS of the power management chip.
It should be noted that, the power module 4 can convert 220V ac power into power voltage required by the power management chip and the output module 5, the output module 6 can receive the PWM control signal or the PSM control signal, and a loop is connected between the output module 5 and the load current sampling end CS of the power management chip, so that the power management chip can collect the current of the load end in real time.
Further, the power module 4 includes: first to sixth diodes D1 to D6, a fourth resistor R4, and a first capacitor C1;
the first diode D1 to the fourth diode D4 form a rectifier bridge, an input end of the rectifier bridge is connected with the 220V ac, an output end of the rectifier bridge is connected with the output module 5 and grounded through a first capacitor C1, and the 220V ac is connected with the fifth diode D5 and the sixth diode D6 through a fourth resistor R4 to be connected to a power supply end VCC of the power management chip.
It should be noted that, the first capacitor C1 is a filter capacitor, the fourth resistor R4 is a current limiting resistor, the fifth diode D5 and the sixth diode D6 are rectifier diodes, the rectifier bridge can convert 220V ac into dc to power the output module 5, and the fifth diode D5 and the sixth diode D6 convert 220V ac into dc to power the power supply terminal VCC of the power management chip.
Further, the output module 6 includes: a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, and a second triode VT2, the output module 5 comprising: a transformer T1 and a seventh diode D7;
one end of the sixth resistor R6 is connected with the base electrode of the second triode VT2, the other end of the sixth resistor R6 is connected with the driving end DRV of the power management chip and is grounded through the fifth resistor R5, the emitter electrode of the second triode VT2 is grounded through the seventh resistor R7, the collector electrode of the second triode VT2 is connected with the input end of the transformer T1, one end of the output end of the transformer T1 is grounded, the other end of the output end of the transformer T1 is connected with the positive electrode of the seventh diode D7, and the negative electrode of the seventh diode D7 is respectively connected with the load and the load current sampling end CS of the power management chip.
It should be noted that, the fifth resistor R5, the sixth resistor R6, and the seventh resistor R7 are current limiting resistors, the seventh diode D7 is used to maintain unidirectional current flow, and the power management chip outputs a PWM control signal or a PSM control signal to the base of the second triode VT2 through the driving end DRV, so as to control the second triode VT2 to be turned on or off, and further control the output side of the transformer T1 to be turned on or off, thereby achieving the purpose of controlling the power supply voltage output by the power supply.
The foregoing description is only of the preferred embodiments of the present utility model, and is not intended to limit the scope of the utility model, but rather is intended to cover any equivalents of the structures or equivalent processes disclosed herein or in the alternative, which may be employed directly or indirectly in other related arts.
Claims (10)
1. A power management chip, the power management chip comprising: the system comprises a power supply voltage sampling module, a load current sampling module and a calculation processing module;
the power supply voltage sampling module is respectively connected with a power supply and the calculation processing module, the calculation processing module is respectively connected with the load current sampling module and an external switch, and the load current sampling module is connected with a load;
the power supply voltage sampling module is used for acquiring the power supply voltage output by the power supply and sending a power supply voltage signal to the calculation processing module;
the load current sampling module is used for acquiring the current of the load end and sending a load current signal to the calculation processing module;
the calculation processing module is used for calculating the output efficacy under the PSM modulation mode and the output efficacy under the PWM modulation mode according to the power supply voltage signal and the load current signal respectively;
the calculation processing module is further configured to output a PSM control signal to the external switch if the output efficiency in the PSM modulation mode is greater than the output efficiency in the PWM modulation mode, and otherwise output a PWM control signal to the external switch.
2. The power management chip of claim 1, wherein the power supply voltage sampling module is: a voltage analog-to-digital converter;
the voltage analog-to-digital converter is respectively connected with the power supply and the calculation processing module;
the voltage analog-to-digital converter is used for acquiring the power supply voltage output by the power supply, performing analog-to-digital conversion on the power supply voltage output by the power supply to acquire a power supply voltage digital signal, and sending the power supply voltage digital signal to the calculation processing module, wherein the power supply voltage digital signal is a power supply voltage signal.
3. The power management chip of claim 2, wherein the load current sampling module comprises: a current analog-to-digital converter and a load current sampling circuit;
the load current sampling circuit is respectively connected with the load and the current analog-to-digital converter, and the current analog-to-digital converter is connected with the calculation processing module;
the load current sampling circuit is used for acquiring the current of the load end and sending a load current analog signal to the current analog-to-digital converter;
the current analog-to-digital converter is used for carrying out analog-to-digital conversion on the load current analog signal to obtain a load current digital signal, and sending the load current digital signal to the calculation processing module, wherein the load current digital signal is a load current signal.
4. The power management chip of claim 3, wherein the computing processing module comprises: a processor, a digital interface circuit and a signal transmitting unit;
the processor is connected with the digital interface circuit, the digital interface circuit is respectively connected with the voltage analog-to-digital converter, the signal sending unit and the current analog-to-digital converter, and the signal sending unit is connected with the external switch;
the digital interface circuit is used for transmitting the power supply voltage digital signal and the load current digital signal to the processor;
the processor is used for respectively calculating the output efficacy under the PSM modulation mode and the output efficacy under the PWM modulation mode according to the power supply voltage digital signal and the load current digital signal;
the processor is further configured to output a high-level signal to the signal sending unit through the digital interface circuit if the output efficiency in the PSM modulation mode is greater than the output efficiency in the PWM modulation mode, and otherwise output a low-level signal to the signal sending unit through the digital interface circuit;
the signal transmitting unit is configured to output a PSM control signal to the external switch when the high-level signal is received, and output a PWM control signal to the external switch when the low-level signal is received.
5. The power management chip of claim 4, wherein the signal transmitting unit comprises: a PSM signal transmitter, a PWM signal transmitter, a PSM turn-on subunit and a PWM turn-on subunit;
the PSM conduction subunit is respectively connected with the power supply, the PSM signal transmitter and the digital interface circuit, the PWM conduction subunit is respectively connected with the power supply, the PWM signal transmitter and the digital interface circuit, and the PSM conduction subunit and the PWM conduction subunit are also connected with the external switch;
the PSM conduction subunit is used for conducting a loop between the power supply and the PSM signal transmitter when the high-level signal is received, so that the power supply outputs a power supply voltage to the PSM signal transmitter;
the PSM signal transmitter is used for outputting a PSM control signal to the external switch when receiving the power supply voltage output by the power supply;
the PWM conduction subunit is used for conducting a loop between the power supply and the PWM signal transmitter when the low-level signal is received, so that the power supply outputs a power supply voltage to the PWM signal transmitter;
the PWM signal transmitter is used for outputting a PWM control signal to the external switch when receiving the power supply voltage output by the power supply.
6. The power management chip of claim 5, wherein the PSM on subunit comprises: the first resistor, the second resistor, the first MOS tube and the first triode are arranged on the first MOS tube;
the source electrode of the first MOS tube is connected with the power supply and one end of the first resistor respectively, the grid electrode of the first MOS tube is connected with the other end of the first resistor and the collector electrode of the first triode through the second resistor respectively, the drain electrode of the first MOS tube is connected with the PSM signal transmitter, the base electrode of the first triode is connected with the digital interface circuit, and the emitter electrode of the first triode is grounded.
7. The power management chip of claim 6, wherein the PWM on subunit comprises: the third resistor and the second MOS tube;
the source electrode of the second MOS tube is connected with one end of the third resistor and the power supply respectively, the grid electrode of the second MOS tube is connected with the other end of the third resistor and the digital interface circuit respectively, and the drain electrode of the second MOS tube is connected with the PWM signal transmitter.
8. A switching power supply management system, the switching power supply management system comprising: a power supply module, a driving module, an output module, and the power management chip of any one of claims 1 to 7;
the power module is respectively connected with 220V alternating current, a power end of the power management chip and the output module, the driving module is connected with the driving end of the power management chip and the output module, and the output module is connected with the load and a load current sampling end of the power management chip.
9. The switching power management system of claim 8 wherein said power module comprises: the first diode, the second diode, the third resistor and the fourth resistor are connected with the first capacitor;
the first diode to the fourth diode form a rectifier bridge, the input end of the rectifier bridge is connected with the 220V alternating current, the output end of the rectifier bridge is connected with the output module and grounded through a first capacitor, and the 220V alternating current is positively connected with the fifth diode and the sixth diode and is connected to the power end of the power management chip through a fourth resistor.
10. The switching power management system according to claim 9, wherein the driving module includes: the fifth resistor, the sixth resistor, the seventh resistor and the second triode, and the output module comprises: a transformer and a seventh diode;
the power supply management device comprises a power supply management chip, a power supply resistor, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a collector of the second triode, a load current sampling end of the power supply management chip and a load current sampling end of the power supply management chip, wherein one end of the sixth resistor is connected with a base of the second diode, the other end of the sixth resistor is connected with the driving end of the power supply management chip and is grounded through the fifth resistor, the emitter of the second triode is grounded through the seventh resistor, the collector of the second triode is connected with the input end of the transformer, one end of an output end of the transformer is grounded, the other end of the output end of the transformer is connected with the anode of the seventh diode, and the cathode of the seventh diode is connected with the load and the load current sampling end of the power supply management chip respectively.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321748967.9U CN220382943U (en) | 2023-07-05 | 2023-07-05 | Power management chip and switching power management system |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321748967.9U CN220382943U (en) | 2023-07-05 | 2023-07-05 | Power management chip and switching power management system |
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| CN220382943U true CN220382943U (en) | 2024-01-23 |
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