CN220271429U

CN220271429U - STS pulse driving state detection circuit

Info

Publication number: CN220271429U
Application number: CN202321682461.2U
Authority: CN
Inventors: 侯涛; 许强
Original assignee: Midas Electric Shanghai Co ltd
Current assignee: Midas Electric Shanghai Co ltd
Priority date: 2023-06-29
Filing date: 2023-06-29
Publication date: 2023-12-29
Anticipated expiration: 2033-06-29

Abstract

The utility model provides an STS pulse driving state detection circuit, which comprises: the CPU is used for sending out pulse signals and sending the pulse signals to the pulse transformer; the pulse transformer is used for generating a pulse trigger signal after isolating and amplifying the pulse signal and respectively transmitting the pulse trigger signal to a gate stage of the thyristor to be tested and a retriggerable monostable trigger; the retriggerable monostable trigger is used for converting the pulse starting signal into a level signal and transmitting the level signal to the optocoupler; the optocoupler is used for receiving the level signal, performing photoelectric isolation and then sending the level signal to the CPU; and the isolation power supply is used for providing electric energy for the retriggerable monostable trigger and the optocoupler. The utility model provides a thyristor pulse driving signal detection circuit utilizing a retriggerable monostable trigger, which can convert an original pulse driving signal into a level signal and feed the level signal back to a CPU for collection, thereby greatly simplifying the read-back processing of the driving signal by the CPU of an STS and saving the interrupt resource of the CPU.

Description

STS pulse driving state detection circuit

Technical Field

The present utility model relates to STS state detection circuits, and more particularly to STS pulse driving state detection circuits.

Background

The primary conducting device of STS (static change-over switch) is a thyristor, and the gate electrode driving mode of the thyristor is usually a direct current driving mode, a pulse driving mode and an optocoupler driving mode, which are usually applied to STS with small capacity (less than or equal to 32A) because of smaller driving energy; the pulse driving mode can provide high current driving capability (more than 5 times rated trigger current) and is mainly applied to high-capacity STS (more than or equal to 63A), and the average power of a trigger loop can be effectively reduced while the high current trigger effect is obtained by adopting the pulse driving mode, so that the device operation temperature of the trigger loop is reduced, and the working reliability of a high-power thyristor is improved.

In a specific application, in order to ensure the reliability of the overall operation of the STS, various feedback signals are generally adopted to obtain the real-time working state of the current STS, wherein the most important point is to monitor the state of the driving signal of the thyristor, in an actual STS program, the CPU needs to collect the driving signal of the thyristor in real time and compare with the set state of the current program to form a closed loop, and when the driving signal of the thyristor is inconsistent with the running result of the program, an alarm signal needs to be sent in time to remind the manual intervention to eliminate the problem, thereby improving the reliability of power supply.

Compared with the acquisition feedback of the level signal, the acquisition feedback of the pulse signal is a relatively bad problem, and the acquisition of the pulse signal by adopting a conventional external acquisition mode can cause the CPU to enter unnecessary acquisition interruption frequently, so that the interruption resource of the CPU is wasted greatly when the pulse frequency is higher (more than 5 kHz), which is quite unsuitable in STS with the first requirement of switching speed.

Disclosure of Invention

The utility model aims to overcome the defects in the prior art and provide an STS pulse driving state detection circuit.

The utility model solves the technical problems by the following technical scheme:

an STS pulse driving state detection circuit, the circuit comprising:

the CPU is used for sending out pulse signals and sending the pulse signals to the pulse transformer;

the pulse transformer is used for generating a pulse trigger signal after isolating and amplifying the pulse signal and respectively transmitting the pulse trigger signal to a gate stage of the thyristor to be tested and a retriggerable monostable trigger;

the retriggerable monostable trigger is used for converting the pulse starting signal into a level signal and transmitting the level signal to the optocoupler;

the optocoupler is used for receiving the level signal, performing photoelectric isolation and then sending the level signal to the CPU;

and the isolation power supply is used for providing electric energy for the retriggerable monostable trigger and the optocoupler.

Preferably, the retriggerable monostable trigger comprises 2 triggers, which are respectively connected with a common side thyristor and a standby thyristor of the STS.

Preferably, the retriggerable monostable flip-flop comprises a first input terminal, a second input terminal, a reset terminal, a REXT terminal, a CEXT terminal, a VCC terminal and an output terminal;

the REXT end and the CEXT end are used for setting pulse width;

the first input end is connected with one end of a first resistor in series, and the other end of the first resistor is grounded;

the second input end receives the pulse trigger signal;

the output terminal outputs the level signal.

Preferably, the optocoupler includes a first input pin, a second input pin, a first output pin, and a second output pin;

the first input pin is respectively connected with one end of a current-limiting resistor and one end of a first filter capacitor, the other end of the current-limiting resistor is connected with the isolation power supply, and the other end of the first filter capacitor is connected with the second input pin and the output end of the retriggerable monostable trigger;

the first output pin is respectively connected with one end of the second filter capacitor and the ground, the second output pin is respectively connected with one end of the pull-up resistor, the other end of the second filter capacitor and the CPU, and the other end of the pull-up resistor is connected with the isolation power supply.

Preferably, the input side of the isolation power supply is a low-voltage direct current power supply, and the voltage of the isolation power supply is reduced by the output of the isolation power supply.

Preferably, the pulse transformer comprises a control unit, a KCB trigger transformer and a silicon controlled rectifier unit;

the primary coil of the KCB trigger transformer is connected in parallel with a first side resistor and a first diode which are connected in series;

and after the secondary coil of the KCB trigger transformer is connected with a second diode in series, the second side resistor and a third diode are respectively connected in parallel, and the second diode is also connected with the gate electrode of the thyristor.

The utility model has the positive progress effects that: the utility model provides a thyristor pulse driving signal detection circuit utilizing a retriggerable monostable trigger, which can convert an original pulse driving signal into a level signal and feed the level signal back to a CPU for collection, thereby greatly simplifying the read-back processing of the driving signal by the CPU of an STS and saving the interrupt resource of the CPU.

Drawings

Fig. 1 is a circuit block diagram of an STS pulse driving state detection circuit according to a preferred embodiment of the present utility model.

Fig. 2 is a schematic circuit diagram of a retriggerable monostable flip-flop according to a preferred embodiment of the utility model.

Fig. 3 is a schematic circuit structure of an optocoupler according to a preferred embodiment of the utility model.

Fig. 4 is a schematic circuit structure of an isolated power supply according to a preferred embodiment of the utility model.

Fig. 5 is a schematic circuit diagram of a pulse transformer according to a preferred embodiment of the utility model.

Detailed Description

The present utility model will now be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments are shown.

An STS pulse driving state detection circuit, as shown in fig. 1, the circuit comprising:

It should be noted that, the main function of the STS pulse driving state detection circuit according to this embodiment is to form a control loop for the thyristor driving program of the STS, and the CPU of the STS needs to acquire the signal back again to check with the current logic state of the program to form a loop after sending out the thyristor driving signal, which is a reliability verification mechanism of the STS control program.

In fig. 1, the CPU is responsible for controlling functions such as logic operation, voltage calculation, state acquisition, thyristor driving, etc.; the pulse transformer isolates and amplifies the pulse signal sent by the CPU to form a pulse trigger signal of the thyristor, and the signal is connected to the gate electrode of the thyristor to control the on and off of the thyristor; the trigger module converts a pulse trigger signal actually applied to the gate electrode of the thyristor into a level signal and sends the level signal into the optocoupler; the optocoupler performs photoelectric isolation on the level signal formed by the trigger and then returns the level signal to the CPU for identification so as to check whether the current driving pulse is effective; the isolated power supply module converts the 5V dc voltage to an isolated 3.3V voltage, which is the operating power supply for the trigger module.

In this embodiment, since the thyristor driving circuits on the normal side and the standby side of the STS are identical in circuit configuration, only 1 thyristor pulse driving state detection circuit configuration is described in fig. 1, and the other paths are identical thereto.

In this embodiment, the retriggerable monostable trigger includes 2 triggers, which are respectively connected to a common side thyristor and a standby side thyristor of the STS.

In this embodiment, as shown in fig. 2, the retriggerable monostable flip-flop includes a first input terminal, a second input terminal, a reset terminal, a REXT terminal, a CEXT terminal, a VCC terminal, and an output terminal;

the REXT end and the CEXT end are used for setting pulse width;

the second input end receives the pulse trigger signal;

the output terminal outputs the level signal.

In fig. 2, the working power supply of the flip-flop is 3.3v_iso after the isolation power supply is isolated, the REXT and CEXT of the flip-flop are used to set the pulse width, where R312 is selected to be 100k, c310 is selected to be 10nF, the set pulse width is 450us, which indicates that the interval time of the transition edge of the flip-flop cannot be greater than 450us, and the output terminal Q of the flip-flop will remain valid. RD signal is the reset terminal of the trigger, directly pulls up to the power through R320, carries out interference filtering through the C312 electric capacity of 100nf simultaneously, guarantees the job stabilization nature of trigger. The a input of the flip-flop is grounded through a 1000 q resistor. The input end B of the trigger is directly from the output end of the pulse transformer after resistor voltage division, the input end B is the up-jump edge which is effective, at the moment, if the pulse transformer outputs pulses, the signal B always has pulse signal input, the continuous up-jump edge signal always keeps the output end Q of the trigger at high level, and whether the current thyristor trigger signal has pulse output can be obtained by detecting the signal.

In this embodiment, as shown in fig. 3, the optocoupler includes a first input pin, a second input pin, a first output pin, and a second output pin;

The optocoupler isolation circuit of fig. 3 is mainly used for photoelectrically isolating the output Q of the trigger and then returning the output Q to the CPU for collection. The 1 pin at the input side of the optocoupler is connected to the output Q of the 3.3V_ISO 3 pin contact generator of the working power supply through a current limiting resistor R1, and C6 is a filtering function. The 4 pins of the output side of the optocoupler are grounded, the 6 pins are connected to the working power supply VCC3.3V of the low-voltage side through the pull-up resistor R2, the C7 is also a filter capacitor, and the filtered 6-pin signals are directly sent to the CPU. In the circuit, when the input READ_TRIG_N signal of the optocoupler is high level 1, the light emitting diode at the primary side of the optocoupler does not work, so that the triode at the output side of the optocoupler is not conducted, and at the moment, the CPU_READ_TRIG_N signal of the 6 pins is also high level 1, which indicates that the pulse signal of the thyristor is in an effective state; when the READ_TRIG_N signal is low level 0, the light emitting diode of the optocoupler starts to work, the secondary triode of the optocoupler is conducted, and at the moment, the CPU_READ_TRIG_N signal of the 6 pins is low level 0, which indicates that the pulse signal of the thyristor is in an invalid state. In this circuit R1 may be 2000. OMEGA, R2 may be 4700. OMEGA, and C6 and C7 may be 10nf.

In this embodiment, the input side of the isolation power supply is a low-voltage dc power supply, and the voltage of the isolation power supply is reduced by the output of the isolation power supply.

In this case, referring to fig. 4, the side where the trigger is located is the high voltage side, so that a working power supply after physical isolation must be provided for the trigger, where f0503s_1wr3 is selected, the input side is the 5VDC power supply of the low voltage system, and the output side is the 3.3v_iso power supply after isolation, and the working power supply is provided for the trigger and the optocoupler. In fig. 4, C1, C2, C3, and C4 are filter capacitors, and the capacitance values can be respectively selected to be 10uf and 100nf.

In this embodiment, as shown in fig. 5, the pulse transformer includes a control unit, a KCB trigger transformer and a thyristor unit;

The core device of the pulse transformer driving circuit is a KCB pulse transformer, the voltage transformation ratio of the transformer is 1:2, V1 is the primary side power supply of the pulse transformer, 5VDC is adopted, the pulse signal of the CPU controls the on and off of the primary side coil of the KCB transformer by controlling the on and off of the triode, R1 and D1 are freewheel circuits of the primary side coil, and the main function is to absorb the instant reverse electromotive force formed when the primary side of the transformer is turned off, so as to protect the triode. The driving signal of the secondary side of the transformer is connected to the gate electrode of the thyristor after passing through D2, and when the triode of the primary side of the transformer is conducted, the secondary side of the transformer forms a pulse voltage with the same phase, and the voltage can directly drive the thyristor to be conducted after passing through D2. D3 and R2 are used for waveform shaping, the resistance values of R1 and R2 can be usually selected to be 330 Ω, and D1, D2, D3 can be selected to be 1N4007.

In addition, the pulse signal collected in this embodiment is an output signal of a pulse transformer, the reference voltage of the signal is the K pole of the thyristor, and the K pole is a strong current end (AC 380V or AC 220V) when in operation, and the output end of the pulse transformer directly drives the gate pole (G pole) of the thyristor, so that the problem of strong and weak electric signal isolation needs to be considered for the collection of the pulse signal.

Based on the above modules, the STS pulse driving state detection circuit described in this embodiment can convert the pulse signal applied by the gate electrode of the thyristor into a steady-state level signal, and send the steady-state level signal to the CPU for stoping confirmation, thereby improving the reliability of the STS thyristor driver logic.

While specific embodiments of the utility model have been described above, it will be appreciated by those skilled in the art that these are by way of example only, and the scope of the utility model is defined by the appended claims. Various changes and modifications to these embodiments may be made by those skilled in the art without departing from the principles and spirit of the utility model, but such changes and modifications fall within the scope of the utility model.

Claims

1. An STS pulse driving state detection circuit, the circuit comprising:

2. The STS pulse drive state detection circuit of claim 1 wherein the re-triggerable monostable flip-flop comprises 2 flip-flops respectively connected to a common side thyristor and a standby side thyristor of the STS.

3. The STS pulse drive state detection circuit of claim 2, wherein the re-triggerable monostable flip-flop comprises a first input terminal, a second input terminal, a reset terminal, a REXT terminal, a CEXT terminal, a VCC terminal, and an output terminal;

the REXT end and the CEXT end are used for setting pulse width;

the second input end receives the pulse trigger signal;

the output terminal outputs the level signal.

4. The STS pulse driving state detection circuit of claim 1, wherein the optocoupler comprises a first input pin, a second input pin, a first output pin, a second output pin;

5. The STS pulse driving state detection circuit of claim 1, wherein the input side of the isolation power supply is a low voltage dc power supply, and the step-down isolation power supply is output via the isolation power supply.

6. The STS pulse driving state detection circuit of claim 1, wherein the pulse transformer comprises a control unit, a KCB trigger transformer and a thyristor unit;