CN220254530U - Electronic control unit and vehicle - Google Patents
Electronic control unit and vehicle Download PDFInfo
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- CN220254530U CN220254530U CN202321748132.3U CN202321748132U CN220254530U CN 220254530 U CN220254530 U CN 220254530U CN 202321748132 U CN202321748132 U CN 202321748132U CN 220254530 U CN220254530 U CN 220254530U
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- 238000004891 communication Methods 0.000 claims abstract description 27
- 235000015429 Mirabilis expansa Nutrition 0.000 claims description 18
- 244000294411 Mirabilis expansa Species 0.000 claims description 18
- 235000013536 miso Nutrition 0.000 claims description 18
- 230000005540 biological transmission Effects 0.000 claims description 4
- 238000001514 detection method Methods 0.000 abstract description 6
- 238000000034 method Methods 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000012795 verification Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008094 contradictory effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
Abstract
The application discloses electronic control unit and vehicle, wherein, the electronic control unit includes: the controller comprises an SPI main module and a plurality of SPI slave modules, wherein the SPI main module is provided with a first SPI interface, the SPI slave module is provided with a second SPI interface, the first SPI interface is electrically connected with the second SPI interface, and the first SPI interface is electrically connected with the IC chip; and the switch module is respectively in communication connection with the SPI main module and the SPI slave module and is used for determining whether the IC chip is available or not based on the first SPI data received by the SPI main module from the IC chip and the second SPI data received by the SPI slave module. According to the technical scheme, accurate SPI communication detection can be performed on the electronic control unit which does not support parity check or CRC check, the method and the device can be suitable for SPI communication, and safety of the electronic control unit is improved.
Description
Technical Field
The present disclosure relates to the field of communications technologies, and in particular, to an electronic control unit and a vehicle.
Background
In the digital chip SPI (Serial Perripheral Interface, serial peripheral interface) bus communication technology, an SPI serial bus is mainly applied to data communication between off-chip chips, a chip for transmitting data is generally called a master, a chip for receiving data is generally called a slave, and an SPI bus communication includes: the Master and the Slave are respectively provided with four data signal lines, and mainly comprise a serial clock line SCLK, a Master-Slave input signal line MOSI, a Master-Slave output signal line MISO and a chip selection enabling signal line CS, and the four data lines of the Master and the Slave are respectively and correspondingly connected, so that when the chip selection enabling signal line CS enabling signal on the Master is effective, the data communication between chips can be realized.
Most automobile ECUs (Electronic Control Unit, electronic control units) use a single-chip microcomputer to communicate with an integrated circuit through SPI on the same ECU. While some integrated circuits provide CRC or parity functionality for secure communications, it is difficult to verify SPI communications at the ECU implementation.
Disclosure of Invention
The main objective of this application is to provide an electronic control unit and vehicle, aims at solving the technical problem that current vehicle ECU is difficult to carry out SPI communication verification.
To achieve the above object, the present application provides an electronic control unit including:
the controller comprises an SPI main module and a plurality of SPI slave modules, wherein the SPI main module is provided with a first SPI interface, the SPI slave module is provided with a second SPI interface, the first SPI interface is electrically connected with the second SPI interface, and the first SPI interface is electrically connected with the IC chip;
and the switch module is respectively in communication connection with the SPI main module and the SPI slave module and is used for determining whether the IC chip is available or not based on the first SPI data received by the SPI main module from the IC chip and the second SPI data received by the SPI slave module.
Further, the switch module is further configured to determine that the SPI data received by the SPI master module from the IC chip through the first SPI interface is available if the first SPI data is the same as the second SPI data.
Further, the first SPI interface includes a MISO master interface electrically connected to the IC chip.
Further, the first SPI interface comprises a MOSI master interface, and the second SPI interface comprises a MOSI slave interface; the MOSI master interface is electrically connected with the MOSI slave interface.
Further, the switch module is further configured to obtain first SPI data received by the SPI master module from the IC chip through the MISO master interface, and obtain second SPI data received by the SPI slave module from the SPI master module through the MOSI slave interface.
Further, after the initialization of the SPI master module and the SPI slave module is completed, the switch module is further configured to control the IC chip to transmit the first SPI data through the MISO master interface; and when the first SPI data transmission is completed, acquiring second SPI data received by the MOSI from an interface.
Further, the first SPI interface includes an SCLK master interface and a CS master interface; the SCLK master interface is electrically connected with the SCLK slave interface;
further, the second SPI interface includes an SCLK slave interface and a CS slave interface; the CS master interface is electrically connected with the CS slave interface.
Further, the SCLK master interface and the CS master interface are electrically connected to the IC chip, respectively.
The application also proposes a vehicle comprising the aforementioned electronic control unit.
According to the SPI communication detection method and device, the switch module is adopted to detect SPI communication of the electronic control unit according to the first SPI data received by the IC chip and the second SPI data received by the SPI slave module, the electronic control unit which does not support parity check or CRC check can be accurately detected in SPI communication, the SPI communication method and device can be suitable for SPI communication of the electronic control unit, and safety of the electronic control unit is improved.
Drawings
Fig. 1 is a schematic circuit diagram of an embodiment of an electronic control unit.
Reference numerals illustrate:
| reference numerals | Name of the name | Reference numerals | Name of the name |
| 100 | Controller for controlling a power supply | 200 | IC chip |
| 110 | SPI main module | 120 | SPI slave module |
| 111 | CS master interface | 112 | SCLK master interface |
| 113 | MOSI main interface | 114 | MISO master interface |
| 121 | CS slave interface | 122 | SCLK slave interface |
| 123 | MOSI slave interface | 124 | MISO slave interface |
The realization, functional characteristics and advantages of the present application will be further described with reference to the embodiments, referring to the attached drawings.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.
It should be noted that all directional indicators (such as up, down, left, right, front, and rear … …) in the embodiments of the present application are merely used to explain the relative positional relationship, movement, etc. between the components in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indicator is correspondingly changed.
Furthermore, the descriptions of "first," "second," and the like, herein are for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions of the embodiments may be combined with each other, but it is necessary to base that the technical solutions can be realized by those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should be regarded as not exist and not within the protection scope of the present application.
The application proposes an electronic control unit.
Referring to fig. 1, fig. 1 is a schematic circuit diagram of an embodiment of an electronic control unit of the present application.
In the present application, the electronic control unit ECU includes a controller 100 and a switch module;
the controller 100 is a micro controller, and the controller 100 includes an SPI master module 110 and a plurality of SPI slave modules 120.
The SPI master module 110 is provided with a first SPI interface, the SPI slave module 120 is provided with a second SPI interface, the first SPI interface is electrically connected with the second SPI interface to realize a communication link between the SPI master module 110 and the SPI slave module 120, the first SPI interface is electrically connected with the IC chip 200, and the IC chip 200 is an external IC chip 200.
The switch module is respectively in communication connection with the SPI master module 110 and the SPI slave module 120, and is configured to determine whether the IC chip 200 is available based on the first SPI data received by the SPI master module 110 from the IC chip 200 and the second SPI data received by the SPI slave module 120.
Specifically, the switch module may obtain the first SPI data received by the SPI master module 110 from the IC chip 200, and the second SPI data received by the SPI slave module 120, where the second SPI data is the SPI data transmitted by the SPI master module 110 to the SPI slave module 120 through the first SPI interface and the second SPI interface, and the switch module determines whether the IC chip 200 is available based on the first SPI data and the second SPI data, that is, determines whether the SPI data received by the SPI master module 110 from the IC chip 200 through the first SPI interface is available.
Further, in one possible implementation, the switch module is further configured to determine that the SPI data received by the SPI master module 110 from the IC chip 200 through the first SPI interface is available if the first SPI data is the same as the second SPI data.
Specifically, after the first SPI data and the second SPI data are obtained, the switch module determines whether the first SPI data is identical to the second SPI data, and if the first SPI data is identical to the second SPI data, the switch module determines that the SPI data received by the SPI master module 110 from the IC chip 200 through the first SPI interface is available, that is, the IC chip 200 is available.
It should be noted that, if the first SPI data is different from the second SPI data, the switch module determines that the SPI data received by the SPI master module 110 from the IC chip 200 through the first SPI interface is not available, at this time, the switch module may control the IC chip 200 to transmit the SPI data again, and in the process of transmitting the SPI data, the switch module obtains the SPI data received by the SPI master module 110 from the IC chip 200 and the SPI data received by the SPI slave module 120, and further determines whether the SPI data is the same.
The first SPI interface includes a CS master interface 111, an SCLK master interface 112, a MOSI master interface 113, and a MISO master interface 114, and includes a CS slave interface 121, an SCLK slave interface 122, a MOSI slave interface 123, and a MISO slave interface 124.
The MISO master interface 114 is electrically connected to the IC chip 200 to enable an electrical connection between the IC chip 200 and the SPI master module 110 through the MISO master interface 114 of the first SPI interface, and the IC chip 200 may transmit SPI data to the SPI master module 110 through the MISO master interface 114.
The MOSI master interface 113 is electrically connected to the MOSI slave interface 123 to transmit SPI data through the MOSI master interface 113 and the MOSI slave interface 123, and to transmit the SPI data of the SPI master module 110 to the SPI slave module 120.
Further, in yet another possible implementation manner, the switch module is further configured to obtain the first SPI data received by the SPI master module 110 from the IC chip 200 through the MISO master interface 114, and obtain the second SPI data received by the SPI slave module 120 from the SPI master module 110 through the MOSI slave interface 123.
Further, after the initialization of the SPI master module 110 and the SPI slave module 120 is completed, the switch module is further configured to control the IC chip 200 to transmit the first SPI data through the MISO master interface 114; and acquiring second SPI data received by the MOSI from the interface 123 when the first SPI data transmission is completed.
Specifically, the IC chip 200 transmits the first SPI data to the SPI master module 110, the SPI master module 110 receives the first SPI data through the MISO master interface 114, the switch module obtains the first SPI data from the SPI master module 110, the SPI master module 110 transmits the second SPI data to the SPI slave module 120 through the MOSI master interface 113, the SPI slave module 120 receives the second SPI data through the MOSI slave interface 123, and the switch module obtains the second SPI data from the SPI slave module 120.
At the time of SPI communication verification, the ECU sequentially initializes the SPI master module 110 and the SPI slave module 120, and after the SPI master module 110 and the SPI slave module 120 are initialized, the switch module sets an SPI buffer which can receive and buffer SPI data through the MOSI slave interface 123. The switch module requests the IC chip 200 to transmit the SPI data to the SPI master module 110, and in the process of transmitting the SPI data, the switch module checks the SPI communication status of the ECU, and when determining that the SPI data transmission is completed according to the SPI communication status, the switch module determines whether the first SPI data is identical to the second SPI data, and if the first SPI data is identical to the second SPI data, the switch module determines that the SPI data received by the SPI master module 110 from the IC chip 200 through the first SPI interface is available, that is, the IC chip 200 is available. If the first SPI data is different from the second SPI data, the switch module determines that the SPI data received by the SPI main module 110 from the IC chip 200 through the first SPI interface is not available, at this time, the switch module may return to perform the setting of the SPI buffer to perform the SPI communication detection again, and of course, may update the detection number first, return to perform the setting of the SPI buffer when the detection number does not reach the preset number, and output the alarm information when the detection number reaches the preset number.
Wherein SCLK master interface 112 is electrically connected with SCLK slave interface 122. The CS master interface 111 is electrically connected to the CS slave interface 121. The SCLK master interface 112 and the CS master interface 111 are electrically connected to the IC chip 200, respectively.
By adopting the switch module to detect the SPI communication of the electronic control unit according to the first SPI data received by the SPI master module 110 from the IC chip 200 and the second SPI data received by the SPI slave module 120, the electronic control unit that does not support parity check or CRC check can be accurately detected for the SPI communication, which can be suitable for the SPI communication of the electronic control unit, and the security of the electronic control unit is improved.
The application further provides a vehicle, the vehicle includes an electronic control unit, and the specific structure of the electronic control unit refers to the above embodiments, and since the vehicle adopts all the technical solutions of all the above embodiments, the vehicle also has all the beneficial effects brought by the technical solutions of the above embodiments, which are not described in detail herein.
It should be noted that the technical solutions of the embodiments of the present application may be combined with each other, but it is necessary to be based on that the skilled person can realize that when the combination of the technical solutions contradicts or cannot be realized, the person should consider that the combination of the technical solutions does not exist, and is not within the scope of protection claimed in the present application.
The foregoing description is only of the preferred embodiments of the present application and is not intended to limit the scope of the claims, and all equivalent structural changes made by the specification and drawings of the present application, or direct or indirect application in other related technical fields, are included in the scope of the claims of the present application.
Claims (10)
1. An electronic control unit, comprising:
the controller comprises an SPI main module and a plurality of SPI slave modules, wherein the SPI main module is provided with a first SPI interface, the SPI slave module is provided with a second SPI interface, the first SPI interface is electrically connected with the second SPI interface, and the first SPI interface is electrically connected with the IC chip;
and the switch module is respectively in communication connection with the SPI main module and the SPI slave module and is used for determining whether the IC chip is available or not based on the first SPI data received by the SPI main module from the IC chip and the second SPI data received by the SPI slave module.
2. The electronic control unit of claim 1, wherein the switch module is further configured to determine that SPI data received by the SPI master module from the IC chip via the first SPI interface is available if the first SPI data is the same as the second SPI data.
3. The electronic control unit of claim 1, wherein the first SPI interface comprises a MISO master interface, the MISO master interface being electrically connected with the IC chip.
4. The electronic control unit of claim 3, wherein the first SPI interface comprises a MOSI master interface and the second SPI interface comprises a MOSI slave interface; the MOSI master interface is electrically connected with the MOSI slave interface.
5. The electronic control unit of claim 4, wherein the switch module is further configured to obtain first SPI data received by the SPI master module from the IC chip through the MISO master interface, and obtain second SPI data received by the SPI slave module from the SPI master module through the MOSI slave interface.
6. The electronic control unit of claim 5, wherein after initialization of the SPI master module and the SPI slave module is completed, the switch module is further configured to control the IC chip to transmit the first SPI data via the MISO master interface; and when the first SPI data transmission is completed, acquiring second SPI data received by the MOSI from an interface.
7. An electronic control unit according to any one of claims 1 to 6, wherein the first SPI interface comprises an SCLK master interface and a CS master interface; the SCLK master interface is electrically connected with the SCLK slave interface.
8. The electronic control unit of claim 7, wherein the second SPI interface comprises an SCLK slave interface and a CS slave interface; the CS master interface is electrically connected with the CS slave interface.
9. The electronic control unit of claim 8, wherein the SCLK master interface and the CS master interface are electrically connected to the IC chip, respectively.
10. A vehicle, characterized by comprising an electronic control unit according to any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321748132.3U CN220254530U (en) | 2023-07-04 | 2023-07-04 | Electronic control unit and vehicle |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321748132.3U CN220254530U (en) | 2023-07-04 | 2023-07-04 | Electronic control unit and vehicle |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN220254530U true CN220254530U (en) | 2023-12-26 |
Family
ID=89262802
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202321748132.3U Active CN220254530U (en) | 2023-07-04 | 2023-07-04 | Electronic control unit and vehicle |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN220254530U (en) |
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2023
- 2023-07-04 CN CN202321748132.3U patent/CN220254530U/en active Active
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