CN220252732U - Intelligent model car experiment teaching platform - Google Patents

Abstract

The utility model relates to an intelligent model car experiment teaching platform, which is characterized in that: the base plate is integrated with a plurality of peripheral function module circuits and is provided with a socket for connecting a singlechip minimum system core board formed by a NXP K66 microcontroller minimum system, and singlechip pins required by each peripheral function module circuit on the base plate are led out by the core board; the core board is matched with the height of the intelligent model car used in the intelligent model car experiment courses learned by the related professions of the current colleges and universities, the bottom board simplifies the complex structure of the model car into various relatively independent circuit units, the intelligent model car can be used as a front learning platform for the more complex intelligent model car experiment, the intelligent model car is simple in structure and low in implementation cost, a simple experiment platform is provided for a single-chip microcomputer learner, and the intelligent model car is helpful for a beginner to quickly master the principle and programming of each functional module of the single-chip microcomputer.

Description

Intelligent model car experiment teaching platform

Technical Field

The utility model relates to an intelligent model vehicle experiment teaching platform, in particular to a singlechip experiment teaching device; belongs to the technical field of single chip microcomputer, and is applied to an experimental teaching platform of innovative practice.

Background

The intelligent model car course is an important practice course added by various college car related professions along with the development of intelligent network automobiles, and the intelligent model car course mostly adopts an intelligent model car of Enzhi as an experiment teaching aid to teach the basic theory and method of intelligent car control.

The intelligent model vehicle is based on singlechip programming, and the knowledge of the singlechip of most students is found to be weak in the teaching process, and the existing teaching aid, namely the intelligent model vehicle, is easy to damage due to the complex mechanical structure, so that the experimental teaching progress is influenced, and the learning interest of the students is frustrated. Therefore, the relevant training of students is very necessary by using corresponding series of experimental device sub-modules for singlechip teaching before the students perform intelligent model car control.

However, aiming at a 51 single-chip microcomputer or an Arduino single-chip microcomputer widely applied in the market, the existing experimental devices are more. But aiming at the K60 and K66 series single-chip microcomputer of the NXP of the intelligent model car course or the competition of the college students, the related experimental device for teaching is lacking.

Disclosure of Invention

Aiming at the problems, the utility model aims to provide an intelligent model vehicle experiment teaching platform, which takes a singlechip minimum system as a core board and is assisted by a peripheral function module circuit, wherein main function modules of K60 and K66 series singlechips are integrated, so that basic experiment teaching of each function module of the singlechips is realized; the method ensures that a learner can see the program execution effect when programming each functional program of the singlechip, improves learning interest, and deepens understanding of basic theory of the singlechip, thereby leading the learner to quickly master theoretical knowledge and development skills of the singlechip.

The technical scheme of the utility model is realized as follows: the intelligent model vehicle innovation practice experiment teaching platform consists of a peripheral function module circuit serving as a bottom plate and a singlechip minimum system core board, wherein the singlechip minimum system core board consists of a microcontroller, a crystal oscillator circuit, a power supply and reset circuit and a program downloading interface circuit; the peripheral function module circuit comprises a power supply circuit, an independent key input circuit, a buzzer driving circuit, an LED control circuit, a nixie tube display circuit, a USB-TTL communication circuit, a Bluetooth interface circuit, a 2.4G wireless communication circuit, an OLED interface circuit, a serial EEPROM circuit, a DAC output circuit, an ADC input circuit, a CAN bus communication interface circuit, a LIN bus communication interface circuit, an ultrasonic ranging interface circuit, a DC motor driving interface circuit, a DC voltage output interface circuit, a rotary encoder interface circuit, a camera interface circuit, a logic analyzer interface circuit and a singlechip pin leading-out circuit; the method is characterized in that: the micro-controller minimum system of NXP K66 forms a micro-chip microcomputer minimum system core board, the peripheral function module circuit is arranged on the bottom board, a socket is arranged on the bottom board, the micro-chip microcomputer minimum system core board is connected with the bottom board circuit through the socket, and the micro-chip microcomputer pins required by the peripheral function module circuits on the bottom board are led out;

wherein the power supply circuit in the peripheral function module circuit provides 5V, 3.3V and system input power supply voltage signals; the LED control circuit, the independent key input circuit, the nixie tube display circuit, the camera interface circuit, the ultrasonic module interface circuit, the OLED interface circuit and the buzzer driving circuit are connected with GPIO pins LED out of a core board of a minimum system of the singlechip; the direct current motor driving interface circuit is connected with PWM pins led out from a core board of a minimum system of the singlechip; the rotary encoder interface circuit is connected with an FTM pin led out from a minimum system core board of the singlechip; the LIN bus interface circuit is connected with TXD and RXD pins of a UART led out from a minimum system core board of the singlechip; the CAN bus interface circuit is connected with RX and TX pins of a CAN module led out from a singlechip minimum system core board; the USB interface circuit and the Bluetooth interface circuit are connected with TXD and RXD pins of a UART led out of a minimum system core board of the singlechip; the ADC input circuit is connected with an ADC pin led out from a minimum system core board of the singlechip; the DAC output circuit and the 2.4G wireless communication circuit are connected with SCK and SOUT pins of an SPI module led out from a minimum system core board of the singlechip to realize SPI communication control; the EEPROM interface circuit is connected with an SCL pin and an SDA pin of an I2C module led out from a minimum system core board of the singlechip; the singlechip pin leading-out circuit is connected with the other unoccupied pins of the core board; the logic analyzer interface circuit respectively leads out an I2C joint pin from the EEPROM interface circuit, an ultrasonic ranging signal pin from the ultrasonic ranging interface circuit, a rotary encoder signal pin from the rotary encoder interface circuit, a CAN bus signal pin from the CAN communication interface circuit, a LIN bus signal pin from the LIN communication interface circuit, an SPI signal pin from the DAC output circuit, an SPI signal pin from the 2.4G wireless communication circuit, an UART signal pin from the USB_TTL communication circuit and the Bluetooth communication circuit, a signal pin from the camera interface circuit, a signal pin from the OLED interface circuit and a PWM signal pin from the DC motor driving interface circuit; the power supply is powered by a 12V power supply, the 12V voltage is converted into 5V voltage by a BL1117-50CX voltage conversion chip, the 12V power supply is connected to an input 3 pin of BL1117-50CX through a toggle switch, the output 2 pin of BL1117-50CX outputs a 5V voltage signal to supply power, the 12V voltage signal is converted into a 3.3V voltage signal by BL1117-33CX, the 12V power supply is connected to an input 3 pin of BL1117-33CX through a toggle switch, and the output 2 pin of BL1117-33CX outputs a 3.3V voltage signal. The negative electrode of the power supply voltage is connected with an anti-reverse connection circuit formed by N-MOS tubes, so that the circuit is prevented from being damaged by reverse connection of the power supply.

3 GPIO pins are LED out of the minimum system core board of the singlechip and are respectively connected with R, G, B three pins of an RGB type LED, the RGB type LED is a common anode LED, a positive stage is connected with a 3.3V voltage signal, and the GPIO pins are connected to a cathode of the RGB type LED through a 200 omega constant current resistor; leading out1 GPIO pin to connect to another LED, GPIO pin to connect to anode of the LED, cathode of the LED connects to ground through pull-down resistor of 1K; the lead-out 5 GPIO pins are respectively connected to five independent keys, the types of the five independent keys are the same, 4 pins are arranged, wherein the No. 1 pin is connected to the GPIO, the No. 2 pin is connected to a 3.3V voltage signal through a 1K pull-up resistor, the No. 3 pin is grounded, and the No. 4 pin is suspended.

The minimum system core board of the singlechip is led out of 10 GPIO pins, wherein 8 GPIO pins are respectively connected to D0-D7 pins (1 pin-8 pin) of two AIP74HC573TA20.TR latches, the other 2 GPIO pins are respectively connected to LE pins (11 pin) of 2 latches, 1 pins Q0-Q7 pins (19 pin-12 pin) are respectively connected to 11 pins (a), 7 pin (b), 4 pin (c), 2 pin (D), 1 pin (e), 10 pin (f), 5 pin (G) and 3 pin (D2) of 2 4-bit nixie tubes through 200 omega current stabilizing resistors, Q0-Q3 pins of the other latches are respectively connected to 12 pin (G1), 9 pin (G3) and 6 pin (G4) of one 4-bit nixie tube, Q4-Q7 pins are respectively connected to 12 pin (G1), 9 pin (G2), 8 pin (G3) and 6 pin (G4) of the other 4-bit nixie tubes, and two latches are respectively connected to the voltage signals of 20V of the two latches; the leading-out 1 GPIO pin is connected to 1 pin of the Buzzer Buzzer through the current stabilizing resistor and the three-stage tube, and the other pin of the Buzzer Buzzer is grounded.

The minimum system core board of the singlechip leads out a UART TXD pin to be connected to a2 pin (TXD) of a USB serial port chip CH340G, the UART RXD pin led out of the singlechip is connected to a 3 pin (RXD) of the CH340G, a 5 pin (UD+) of the CH340G is connected to a 3 pin (D+) of a USB connector 670688001, and a 6 pin (UD-) of the CH340G is connected to a2 pin (D-) of a USB connector 670688001.

The minimum system core board of the singlechip leads out a UART TXD pin and is connected to a pin 2 of the Bluetooth interface circuit, the UART RXD pin which leads out the singlechip is connected to a pin 3 of the Bluetooth interface, a pin 1 of the Bluetooth interface module is a STATE pin, a pin 4 is grounded, and a pin 5 is connected with a 5V voltage signal.

The I2C_SCL pin led out from the minimum system core board of the singlechip is connected to the 6 pin (SCL) of the EEPROM AT24C02, and the I2C_SDA pin led out from the singlechip is connected to the 5 pin (SDA) of the EEPROMAT24C 02; the SPI SOUT of the singlechip is connected to the 2-pin (SDA) of the digital-analog conversion chip GP8403-TC 50-EW; the 2 GPIO pins of the minimum system core board of the leading-out singlechip are respectively connected to the Echo pin and the Trig pin of the ultrasonic module HCSR04, and the ultrasonic module HCSR04 is powered by a 5V power supply.

The minimum system core board of the singlechip is characterized in that 1 ADC pin is led out and connected to the 2 pin of the toggle switch PCM12SMTR, 15 k resistor and 1 10k variable resistor are connected in series and connected to a 5V power supply, the 3 pin of the toggle switch PCM12SMTR is connected between the 5k resistor and the 10k variable resistor, 15 k resistor and 1 photoresistor are connected in series and connected to the 5V power supply, and the 1 pin of the toggle switch PCM12SMTR is connected between the 5k resistor and the photoresistor; and 2 FTM pins of the singlechip core board are led out to form a rotary encoder interface together with a 5V power supply and ground.

CAN Rx and CAN Tx pins led out by the minimum system core board of the singlechip are respectively connected to 4 pins (RXD) and 1 pin (TXD) of a CAN transceiver TJA1042T/3/1J, 6 pins (CANL) and 7 pins (CANH) of the CAN transceiver TJA1042T/3/1J are respectively connected with CAN low output lines and CAN high output lines of a CAN bus, and 1 120Ω resistor is connected in parallel between the CAN pins; the Rx and Tx pins out of the UART port are connected to the 1-pin (RXD) and 4-pin (TXD) of the LIN transceiver TJA1021T/20/CM,118, respectively, and the 6-pin (LIN) of the LIN transceiver TJA1021T/20/CM,118 is connected to the LIN bus; leading out 5 GPIO pins together with a 3.3V power supply and ground to form an OLED screen interface, wherein the 5 GPIO pins of the singlechip are respectively connected with SCL, SDA, RST, D/C, CS of the OLED screen; and leading out 13 GPIO pins, and forming a camera interface together with a 3.3V power supply and ground, wherein the 13 GPIO pins of the singlechip are respectively connected with pixel data signal pins D0, D1, D2, D3, D4, D5, D6 and D7 of the camera, an SCCB_SCL clock signal pin, an SCCB_SDA data signal pin, a pixel clock signal pin PCLK, a field synchronization signal pin VSYN and a row synchronization signal pin HREF.

The direct-current motor interface circuit leads OUT2 PWM pins of the minimum system core board of the singlechip and is respectively connected to a2 pin (IN 1) and a 3 pin (IN 2) of a motor driving chip DRV8870DDAR, and a 6 pin (OUT 1) and an 8 pin (OUT 2) of the motor driving chip DRV8870DDAR are respectively connected with the anode and the cathode of the direct-current motor.

SPI SCK is led out from the minimum system core board of the singlechip and connected to 3 pins (SCK) of the wireless transceiver chip Si24R1, SPI SOUT led out from the singlechip is connected to 4 pins (MOSI) of the wireless transceiver chip Si24R1, and SPI SIN led out from the singlechip is connected to 5 pins (MISO) of the wireless transceiver chip Si24R 1.

The minimum system core board of the singlechip leads out other unoccupied pins which are connected with pins of the I/O interface circuit for standby.

The logic analyzer interface circuit is provided with an ultrasonic ranging signal, a rotary encoder signal, a CAN bus signal, a LIN bus signal, a 2.4G wireless communication circuit wireless transceiver chip connection signal, a DAC circuit analog-to-digital conversion chip connection signal, a motor driving chip connection signal, an OLED interface circuit communication signal and a camera interface circuit communication signal pin interface.

The utility model has the positive effects that: the microcontroller is a singlechip chip, and peripheral circuits are used for realizing independent functions of the singlechip, and are relatively independent, namely, the circuits of all functional modules are not connected, but are connected with the core board; the intelligent learning system is simple in structure and low in implementation cost, a simple experimental platform can be provided for a single-chip microcomputer learner, a beginner is helped to quickly master the principle and programming of each functional module of the single-chip microcomputer, learning difficulty is reduced, and learning progress of a student course is promoted.

Drawings

Fig. 1 is a block diagram showing the overall structure of the present utility model.

Fig. 2 is a core board socket circuit.

Fig. 3 is a schematic diagram of an external power conversion circuit.

Fig. 4 is a schematic diagram of a 2.4G wireless communication circuit.

Fig. 5 is a schematic diagram of an LED control circuit.

Fig. 6 is a schematic diagram of an independent key input circuit.

Fig. 7 is a schematic diagram of a nixie tube display circuit.

Fig. 8 is a schematic diagram of a usb_ttl communication circuit.

Fig. 9 is a schematic diagram of an OLED interface circuit.

Fig. 10 is a schematic diagram of a serial EEPROM circuit.

Fig. 11 is a schematic diagram of a DAC output circuit.

Fig. 12 is a schematic diagram of an ADC input circuit.

Fig. 13 is a schematic diagram of an interface circuit of an ultrasonic module.

Fig. 14 is a schematic diagram of a buzzer control circuit.

Fig. 15 is a schematic diagram of a dc motor driving circuit.

Fig. 16 is a schematic diagram of a rotary encoder interface circuit.

Fig. 17 is a schematic diagram of a CAN bus interface circuit.

Fig. 18 is a schematic diagram of a LIN bus interface circuit.

Fig. 19 is a schematic diagram of a camera interface circuit.

Fig. 20 is a schematic diagram of a bluetooth interface circuit.

Fig. 21 is a schematic diagram of a logic analyzer interface circuit.

FIG. 22 is a schematic diagram of an I/O interface circuit.

Detailed Description

The present utility model will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present utility model more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the utility model.

The intelligent model vehicle control system based on the NXP K66 microcontroller controls, is composed of a minimum system core board and a peripheral function module circuit of the NXP K66 microcontroller, is used for experimental teaching of a single chip microcomputer, and is particularly suitable for single chip microcomputer basic knowledge teaching for intelligent model vehicle control.

As shown in FIG. 1, the functional module block diagram of the intelligent model vehicle innovation practice experiment teaching platform is that a micro-controller minimum system of NXP K66 forms a micro-chip microcomputer minimum system core board, peripheral functional module circuits are arranged on a bottom plate, a socket is arranged on the bottom plate, the micro-chip microcomputer minimum system core board is connected with the bottom plate circuit through the socket, and single-chip microcomputer pins required by all peripheral functional module circuits on the bottom plate are led out. The peripheral function module circuit comprises a power supply circuit, an independent key input circuit, a buzzer driving circuit, an LED control circuit, a nixie tube display circuit, a USB-TTL communication circuit, a Bluetooth interface circuit, a 2.4G wireless communication circuit, an OLED interface circuit, a serial EEPROM circuit, a DAC output circuit, an ADC input circuit, a CAN bus communication interface circuit, a LIN bus communication interface circuit, an ultrasonic ranging interface circuit, a DC motor driving interface circuit, a DC voltage output interface circuit, a rotary encoder interface circuit, a camera interface circuit, a logic analyzer interface circuit and a singlechip pin leading-out circuit. Wherein the power supply circuit in the peripheral function module circuit provides 5V, 3.3V and system input power supply voltage signals; the LED control circuit, the independent key input circuit, the nixie tube display circuit, the camera interface circuit, the ultrasonic module interface circuit, the OLED interface circuit and the buzzer driving circuit are connected with GPIO pins LED out of a core board of a minimum system of the singlechip; the direct current motor interface circuit is connected with PWM pins led out from a core board of a minimum system of the singlechip; the rotary encoder interface circuit is connected with an FTM pin led out from a minimum system core board of the singlechip; the LIN bus interface circuit is connected with TXD and RXD pins of a UART led out from a minimum system core board of the singlechip; the CAN bus interface circuit is connected with RX and TX pins of a CAN module led out from a singlechip minimum system core board; the USB interface circuit and the Bluetooth interface circuit are connected with TXD and RXD pins of a UART led out of a minimum system core board of the singlechip; the ADC input circuit is connected with an ADC pin led out from a minimum system core board of the singlechip; the DAC output circuit and the 2.4G wireless communication circuit are connected with SCK and SOUT pins of an SPI module led out from a minimum system core board of the singlechip to realize SPI communication control; the EEPROM interface circuit is connected with an SCL pin and an SDA pin of an I2C module led out from a minimum system core board of the singlechip; the singlechip pin leading-out circuit is connected with the other unoccupied pins of the core board; the logic analyzer interface circuit respectively leads out an I2C connector pin from the EEPROM interface circuit, an ultrasonic ranging signal pin from the ultrasonic ranging interface circuit, a rotary encoder signal pin from the rotary encoder interface circuit, a CAN bus signal pin from the CAN communication interface circuit, a LIN bus signal pin from the LIN communication interface circuit, an SPI signal pin from the DAC output circuit, an SPI signal pin from the 2.4G wireless communication circuit, an UART signal pin from the USB_TTL communication circuit and the Bluetooth communication circuit, a signal pin from the camera interface circuit, a signal pin from the OLED interface circuit and a PWM signal pin from the DC motor driving circuit.

As shown in fig. 2, which is a circuit diagram of a bottom plate socket, the experimental device is connected with the core plate and the peripheral circuit through the socket, and leads out the singlechip pins required by the peripheral circuit.

The external power supply is converted into a 5V power supply circuit and a 3.3V power supply circuit as shown in FIG. 3. The power supply is powered by a 12V power supply, the 12V voltage is converted into 5V voltage by a BL1117-50CX voltage conversion chip, the 12V power supply is connected to an input 3 pin of BL1117-50CX through a toggle switch, the output 2 pin of BL1117-50CX outputs a 5V voltage signal to supply power, the 12V voltage signal is converted into a 3.3V voltage signal by BL1117-33CX, the 12V power supply is connected to an input 3 pin of BL1117-33CX through a toggle switch, and the output 2 pin of BL1117-33CX outputs a 3.3V voltage signal. The negative electrode of the power supply voltage is connected with an anti-reverse connection circuit formed by N-MOS tubes, so that the circuit is prevented from being damaged by reverse connection of the power supply. A 2.4G wireless communication circuit is shown in fig. 4. SPI SCK of the leading-out K66 singlechip is connected to 3 feet (SCK) of the wireless transceiver chip Si24R1, SPI SOUT of the leading-out singlechip is connected to 4 feet (MOSI) of the wireless transceiver chip Si24R1, and SPI SIN of the leading-out singlechip is connected to 5 feet (MISO) of the wireless transceiver chip Si24R 1. An LED control circuit is shown in fig. 5. 3 GPIO pins of the lead-out K66 singlechip are respectively connected with R, G, B three pins of an RGB type LED, the RGB type LED is a common anode LED, a positive stage is connected with a 3.3V voltage signal, and the GPIO pins are connected to a cathode of the RGB type LED through a 200 omega constant current resistor; and 1 GPIO pin is LED out to be connected to another LED, the GPIO pin is connected to the anode of the LED, and the cathode of the LED is connected to the ground through a 1K pull-down resistor. An independent key input circuit is shown in fig. 6. The 5 GPIO pins of the lead-out K66 singlechip are respectively connected to five independent keys, the five independent keys have the same model, and are respectively provided with 4 pins, wherein the No. 1 pin is connected to the GPIO, the No. 2 pin is connected to a 3.3V voltage signal through a 1K pull-up resistor, the No. 3 pin is grounded, and the No. 4 pin is suspended.

Fig. 7 shows a nixie tube display circuit. The 10 GPIO pins of the K66 singlechip are led out, wherein 8 GPIO pins are respectively connected to D0-D7 pins (1 pin-8 pin) of two AIP74HC573TA20.TR latches, the other 2 GPIO pins are respectively connected to LE pins (11 pin) of 2 latches, 1 latch Q0-Q7 pins (19 pin-12 pin) are respectively connected to 11 pin (a), 7 pin (b), 4 pin (c), 2 pin (D), 1 pin (e), 10 pin (f), 5 pin (G) and 3 pin (D2) of 24 bit nixie tubes through 200 omega current stabilizing resistors, Q0-Q3 pins of the other latch are respectively connected to 12 pin (G1), 9 pin (G2), 8 pin (G3) and 6 pin (G4) of one 4 bit nixie tube, Q4-Q7 pins are respectively connected to 12 pin (G1), 9 pin (G2), 8 pin (G3) and 6 pin (G4) of the other 4 bit nixie tubes, and 1, 10 pins of the two latches are respectively connected to the ground signals of 20V of the two latches

As shown in fig. 8, a usb_ttl communication circuit. The UART TXD pin of the lead-out K66 singlechip is connected to the 2 pin (TXD) of the USB serial port chip CH340G, the UART RXD pin of the lead-out singlechip is connected to the 3 pin (RXD) of the CH340G, the 5 pin (UD+) of the CH340G is connected to the 3 pin (D+) of the USB connector 670688001, and the 6 pin (UD-) of the CH340G is connected to the 2 pin (D-) of the USB connector 670688001. An OLED interface circuit is shown in fig. 9. And 5 GPIO pins of the K66 singlechip are led out to form an OLED screen interface together with a 3.3V power supply and ground, wherein the 5 GPIO pins of the K66 singlechip are respectively connected with SCL, SDA, RST, D/C, CS of the OLED screen.

A serial EEPROM circuit is shown in fig. 10. The I2C_SCL pin leading out the K66 singlechip is connected to the 6 pin (SCL) of the EEPROM AT24C02, and the I2C_SDA pin leading out the singlechip is connected to the 5 pin (SDA) of the EEPROMAT24C02

The DAC output circuit is shown in fig. 11. SPI SCK of leading out K66 singlechip is connected to 1 foot (SCLK) of digital to analog conversion chip GP8403-TC50-EW, and SPI SOUT of leading out singlechip is connected to 2 feet (SDA) of digital to analog conversion chip GP8403-TC 50-EW.

An ADC input circuit is shown in fig. 12. The 1 ADC pins of the lead-out K66 singlechip are connected to the 2 pins of the toggle switch PCM12SMTR, the 1 pins of the 5K resistor and the 1 pins of the 10K variable resistor are connected in series and connected to a 5V power supply, the 3 pins of the toggle switch PCM12SMTR are connected between the 5K resistor and the 10K variable resistor, the 1 pins of the 5K resistor and the 1 pins of the light sensitive resistor are connected in series and connected to the 5V power supply, and the 1 pins of the toggle switch PCM12SMTR are connected between the 5K resistor and the light sensitive resistor.

An ultrasonic module interface circuit is shown in fig. 13. The 2 GPIO pins of the lead-out K66 singlechip are respectively connected to the Echo pin and the Trig pin of the ultrasonic module HCSR04, and the ultrasonic module HCSR04 is powered by a 5V power supply.

A buzzer control circuit is shown in fig. 14. And 1 GPIO pin of the lead-out K66 singlechip is connected to 1 pin of the Buzzer Buzzer through a current stabilizing resistor and a three-stage tube, and the other pin of the Buzzer Buzzer is grounded.

Fig. 15 shows a dc motor driving circuit. 2 PWM pins of the K66 singlechip are led OUT and respectively connected to a2 pin (IN 1) and a 3 pin (IN 2) of the motor driving chip DRV8870DDAR, and a 6 pin (OUT 1) and an 8 pin (OUT 2) of the motor driving chip DRV8870DDAR are respectively connected with the anode and the cathode of the direct current motor. A rotary encoder interface circuit is shown in fig. 16. And 2 FTM pins of the K66 singlechip are led out to form a rotary encoder interface together with a 5V power supply and ground.

The CAN bus interface circuit is shown in fig. 17. CAN Rx and CAN Tx pins of the lead-out K66 singlechip are respectively connected to 4 pins (RXD) and 1 pin (TXD) of a CAN transceiver TJA1042T/3/1J, 6 pins (CANL) and 7 pins (CANH) of the CAN transceiver TJA1042T/3/1J are respectively connected with CAN low output lines and CAN high output lines of a CAN bus, and 1 120Ω resistor is connected in parallel between the CAN low output lines and the CAN high output lines.

Fig. 18 shows a LIN bus interface circuit. Rx and Tx pins of the UART port of the lead-out K66 singlechip are respectively connected to 1 pin (RXD) and 4 pin (TXD) of the LIN transceiver TJA1021T/20/CM, and 6 pins (LIN) of the LIN transceiver TJA1021T/20/CM,118 are connected with the LIN bus.

As shown in fig. 19, a camera interface circuit. And 13 GPIO pins of the K66 singlechip are led out to form a camera interface together with a 3.3V power supply and ground, wherein the 13 GPIO pins of the singlechip are respectively connected with pixel data signal pins D0, D1, D2, D3, D4, D5, D6, D7, an SCCB_SCL clock signal pin, an SCCB_SDA data signal pin, a pixel clock signal pin PCLK, a field synchronization signal pin VSYN and a row synchronization signal pin HREF of the camera.

A bluetooth interface circuit is shown in fig. 20. The lead-out UART TXD pin is connected to the 2 pins of the Bluetooth interface circuit, the lead-out UART RXD pin of the singlechip is connected to the 3 pins of the Bluetooth interface, the 1 pin of the Bluetooth interface module is a STATE pin, the 4 pin is grounded, and the 5 pin is connected with a 5V voltage signal.

A logic analyzer interface circuit as shown in fig. 21. I2C connector pins are led out of an EEPROM interface circuit, ultrasonic ranging signal pins are led out of an ultrasonic ranging interface circuit, rotary encoder signal pins are led out of a rotary encoder interface circuit, CAN bus signal pins are led out of a CAN communication interface circuit, LIN bus signal pins are led out of a LIN communication interface circuit, SPI signal pins are led out of a DAC output circuit, SPI signal pins are led out of a 2.4G wireless communication circuit, UART signal pins are led out of a USB_TTL communication circuit and a Bluetooth communication circuit, signal pins are led out of a camera interface circuit, signal pins are led out of an OLED interface circuit, and PWM signal pins are led out of a DC motor driving circuit.

An I/O interface circuit is shown in fig. 22. And other unoccupied pins of the K66 singlechip are led out to be connected with pins of the I/O interface circuit for standby.

Claims (10)

1. The intelligent model car experiment teaching platform is composed of a peripheral function module circuit serving as a bottom plate and a singlechip minimum system core board, wherein the singlechip minimum system core board is composed of a NXP K66 microcontroller, a crystal oscillator circuit, a power supply and reset circuit and a program downloading interface circuit; the peripheral function module circuit comprises a power supply circuit, an independent key input circuit, a buzzer driving circuit, an LED control circuit, a nixie tube display circuit, a USB-TTL communication circuit, a Bluetooth interface circuit, a 2.4G wireless communication circuit, an OLED interface circuit, a serial EEPROM circuit, a DAC output circuit, an ADC input circuit, a CAN bus communication interface circuit, a LIN bus communication interface circuit, an ultrasonic ranging interface circuit, a DC motor driving interface circuit, a DC voltage output interface circuit, a rotary encoder interface circuit, a camera interface circuit, a logic analyzer interface circuit and a singlechip pin leading-out circuit; the method is characterized in that: the micro-controller minimum system of NXP K66 forms a micro-chip microcomputer minimum system core board, the peripheral function module circuit is arranged on the bottom board, a socket is arranged on the bottom board, the micro-chip microcomputer minimum system core board is connected with the bottom board circuit through the socket, and the micro-chip microcomputer pins required by the peripheral function module circuits on the bottom board are led out; wherein the power supply circuit in the peripheral function module circuit provides 5V, 3.3V and system input power supply voltage signals; the LED control circuit, the independent key input circuit, the nixie tube display circuit, the camera interface circuit, the ultrasonic module interface circuit, the OLED interface circuit and the buzzer driving circuit are connected with GPIO pins LED out of a core board of a minimum system of the singlechip; the direct current motor driving interface circuit is connected with PWM pins led out from a core board of a minimum system of the singlechip; the rotary encoder interface circuit is connected with an FTM pin led out from a minimum system core board of the singlechip; the LIN bus interface circuit is connected with TXD and RXD pins of a UART led out from a minimum system core board of the singlechip; the CAN bus interface circuit is connected with RX and TX pins of a CAN module led out from a singlechip minimum system core board; the USB interface circuit and the Bluetooth interface circuit are connected with TXD and RXD pins of a UART led out of a minimum system core board of the singlechip; the ADC input circuit is connected with an ADC pin led out from a minimum system core board of the singlechip; the DAC output circuit and the 2.4G wireless communication circuit are connected with SCK and SOUT pins of an SPI module led out from a minimum system core board of the singlechip to realize SPI communication control; the EEPROM interface circuit is connected with an SCL pin and an SDA pin of an I2C module led out from a minimum system core board of the singlechip; the singlechip pin leading-out circuit is connected with the rest unoccupied pins of the core board of the minimum system of the singlechip; the logic analyzer interface circuit respectively leads out an I2C joint pin from the EEPROM interface circuit, an ultrasonic ranging signal pin from the ultrasonic ranging interface circuit, a rotary encoder signal pin from the rotary encoder interface circuit, a CAN bus signal pin from the CAN communication interface circuit, a LIN bus signal pin from the LIN communication interface circuit, an SPI signal pin from the DAC output circuit, an SPI signal pin from the 2.4G wireless communication circuit, an UART signal pin from the USB_TTL communication circuit and the Bluetooth communication circuit, a signal pin from the camera interface circuit, a signal pin from the OLED interface circuit and a PWM signal pin from the DC motor driving circuit; the power supply is powered by a 12V power supply, the 12V voltage is converted into 5V voltage by a BL1117-50CX voltage conversion chip, the 12V power supply is connected to an input 3 pin of the BL1117-50CX through a toggle switch, the output 2 pin of the BL1117-50CX outputs a 5V voltage signal to supply power, the 12V voltage signal is converted into a 3.3V voltage signal by the BL1117-33CX, the 12V power supply is connected to an input 3 pin of the BL1117-33CX through the toggle switch, the output 2 pin of the BL1117-33CX outputs a 3.3V voltage signal, and the negative electrode of the power supply voltage is connected with a reverse connection preventing circuit formed by an N-MOS tube, so that the reverse connection of the power supply is prevented from damaging the circuit.

2. The intelligent model vehicle experiment teaching platform according to claim 1, wherein the minimum system core board of the singlechip leads out 3 GPIO pins which are respectively connected with R, G, B pins of RGB type LEDs, the RGB type LEDs are common anode LEDs, the anode is connected with 3.3V voltage signals, and the GPIO pins are connected to the cathode through 200 omega steady-flow resistors; leading out1 GPIO pin to connect to another LED, GPIO pin to connect to anode of the LED, cathode of the LED connects to ground through pull-down resistor of 1K; the lead-out 5 GPIO pins are respectively connected to five independent keys, the types of the five independent keys are the same, 4 pins are arranged, wherein the No. 1 pin is connected to the GPIO, the No. 2 pin is connected to a 3.3V voltage signal through a 1K pull-up resistor, the No. 3 pin is grounded, and the No. 4 pin is suspended.

3. The intelligent model vehicle experiment teaching platform according to claim 1, wherein the minimum system core board of the singlechip leads out 10 GPIO pins, wherein 8 GPIO pins are respectively connected to pins D0-D7 of two aip74hc573ta20.Tr latches, 2 GPIO pins are respectively connected to pins LE 11 of 2 latches, 1 latch Q0-Q7 pins 19-12 are respectively connected to pins 11 (a), 7 pins (b), 4 pins (c), 2 pins (D), 1 pin (e), 10 pins (f), 5 pins (G), 3 pins (D2), Q0-Q3 pins of the other latch are respectively connected to pins 12 (G1), 9 pins (G2), 8 pins (G3), 6 pins (G4) of the other 4-bit digital tube, Q4-Q7 are respectively connected to pins 12 (G1), 9 pins (G2), 8 pins (G3), and two pins (G1, 2 pins (G3) of the other 4-bit digital tube through 200 Ω steady-flow resistors, and two latches are respectively connected to the ground signals of two latches 20V 1 and 5 pins; the leading-out 1 GPIO pin is connected to 1 pin of the Buzzer Buzzer through the current stabilizing resistor and the three-stage tube, and the other pin of the Buzzer Buzzer is grounded.

4. The intelligent model vehicle experiment teaching platform according to claim 1, wherein the minimum system core board of the single chip microcomputer leads out a UART TXD pin to be connected to a2 pin (TXD) of a USB serial port chip CH340G, the UART RXD pin led out of the single chip microcomputer is connected to a 3 pin (RXD) of a CH340G, a 5 pin (UD+) of the CH340G is connected to a 3 pin (D+) of a USB connector 670688001, and a 6 pin (UD-) of the CH340G is connected to a2 pin (D-) of a USB connector 670688001.

5. The intelligent model car experiment teaching platform according to claim 1, wherein the minimum system core board of the single chip microcomputer leads out a UART TXD pin to be connected to a2 pin of a Bluetooth interface circuit, the UART RXD pin led out of the single chip microcomputer is connected to a 3 pin of the Bluetooth interface, a1 pin of the Bluetooth interface module is a STATE pin, a 4 pin is grounded, and a 5 pin is connected with a 5V voltage signal.

6. The intelligent model vehicle experiment teaching platform according to claim 1, wherein the i2c_scl pin led out from the minimum system core board of the single-chip microcomputer is connected to the 6 pin (SCL) of the EEPROM AT24C02, and the i2c_sda pin led out from the single-chip microcomputer is connected to the 5 pin (SDA) of the EEPROMAT24C 02; the SPI SOUT of the singlechip is connected to the 2-pin (SDA) of the digital-analog conversion chip GP8403-TC 50-EW; the 2 GPIO pins of the minimum system core board of the leading-out singlechip are respectively connected to the Echo pin and the Trig pin of the ultrasonic module HCSR04, and the ultrasonic module HCSR04 is powered by a 5V power supply.

7. The intelligent model vehicle experiment teaching platform according to claim 1, wherein the 1 ADC pins led out of the minimum system core board of the singlechip are connected to the 2 pins of the toggle switch PCM12SMTR, the 1 pins are connected in series by using 15 k resistor and 1 10k variable resistor and are connected to a 5V power supply, the 3 pins of the toggle switch PCM12SMTR are connected between the 5k resistor and 10k variable resistor, the 1 pins are connected in series by using 15 k resistor and 1 photoresistor and are connected to a 5V power supply, and the 1 pins of the toggle switch PCM12SMTR are connected between the 5k resistor and the photoresistor; and 2 FTM pins of the singlechip core board are led out to form a rotary encoder interface together with a 5V power supply and ground.

8. The intelligent model vehicle experiment teaching platform according to claim 1, characterized in that CAN Rx and CAN Tx pins led out by the minimum system core board of the singlechip are respectively connected to 4 pins (RXD) and 1 pin (TXD) of a CAN transceiver TJA1042T/3/1J, 6 pins (CANL) and 7 pins (CANH) of the CAN transceiver TJA1042T/3/1J are respectively connected with CAN low output lines and CAN high output lines of a CAN bus, and 1 120Ω resistor is connected in parallel therebetween; the Rx and Tx pins out of the UART port are connected to the 1-pin (RXD) and 4-pin (TXD) of the LIN transceiver TJA1021T/20/CM,118, respectively, and the 6-pin (LIN) of the LIN transceiver TJA1021T/20/CM,118 is connected to the LIN bus; leading out 5 GPIO pins together with a 3.3V power supply and ground to form an OLED screen interface, wherein the 5 GPIO pins of the singlechip are respectively connected with SCL, SDA, RST, D/C, CS of the OLED screen; and leading out 13 GPIO pins, and forming a camera interface together with a 3.3V power supply and ground, wherein the 13 GPIO pins of the singlechip are respectively connected with pixel data signal pins D0, D1, D2, D3, D4, D5, D6 and D7 of the camera, an SCCB_SCL clock signal pin, an SCCB_SDA data signal pin, a pixel clock signal pin PCLK, a field synchronization signal pin VSYN and a row synchronization signal pin HREF.

9. The intelligent model vehicle experiment teaching platform according to claim 1, wherein the direct current motor driving interface circuit leads OUT2 PWM pins of a minimum system core board of the single chip microcomputer, the PWM pins are respectively connected to a2 pin (IN 1) and a 3 pin (IN 2) of a motor driving chip DRV8870DDAR, and a 6 pin (OUT 1) and an 8 pin (OUT 2) of the motor driving chip DRV8870DDAR are respectively connected with the anode and the cathode of the direct current motor.

10. The intelligent model vehicle experiment teaching platform according to claim 1, wherein the minimum system core board of the singlechip leads out SPI SCK to be connected to 3 feet (SCK) of the wireless transceiver chip Si24R1, SPI SOUT leading out the singlechip is connected to 4 feet (MOSI) of the wireless transceiver chip Si24R1, and SPI SIN leading out the singlechip is connected to 5 feet (MISO) of the wireless transceiver chip Si24R 1.