CN220172102U - Chip packaging box and chip packaging system - Google Patents

Chip packaging box and chip packaging system Download PDF

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Publication number
CN220172102U
CN220172102U CN202321709726.3U CN202321709726U CN220172102U CN 220172102 U CN220172102 U CN 220172102U CN 202321709726 U CN202321709726 U CN 202321709726U CN 220172102 U CN220172102 U CN 220172102U
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China
Prior art keywords
chip
conductive
mounting groove
chip packaging
chip package
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CN202321709726.3U
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Chinese (zh)
Inventor
请求不公布姓名
张辉
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Benyuan Quantum Computing Technology Hefei Co ltd
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Benyuan Quantum Computing Technology Hefei Co ltd
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Priority to CN202321709726.3U priority Critical patent/CN220172102U/en
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Abstract

The utility model discloses a chip packaging box and a chip packaging system. The chip packaging box comprises a box body, wherein a mounting groove for placing a chip and at least one fixing pad adjacent to the mounting groove are formed in the box body, a plurality of conductive components which are spaced from each other and insulated are distributed in the mounting groove, at least two conductive components are respectively adjacent to the edge and the center of the mounting groove, and at least one other conductive component exists in a preset distance range of any conductive component. When the packaging box packages chips with the size smaller than that of the mounting groove, the chips are connected with the fixed bonding pads through the conductive parts instead of being directly connected with the fixed bonding pads in a bonding mode, so that the length of the bonding wires is controlled, and when other chips are packaged, the bonding wires can be cut off to realize recycling, so that chips with different sizes can be adapted, recycling is realized, and resource waste is avoided.

Description

Chip packaging box and chip packaging system
Technical Field
The present utility model relates to the field of chip packaging technologies, and in particular, to a chip packaging box and a chip packaging system.
Background
In some cases, the chip needs to be packaged in a package for use or testing. The chip is mounted in the package and is connected to the bond pads on the package by wire bonding.
The package is generally designed according to the chip size, and one package can only be adapted to a chip of one size, so that the chip and the bonding pad can be bonded and connected through a bonding wire of a proper length. If the size of the packaging box is large, the size of the chip is small, the distance between the chip and the bonding pad is increased, the length of the bonding wire is correspondingly increased, and the overlong bonding wire is unstable and is easy to break. Therefore, the chips with different sizes need to be provided with packaging boxes with different sizes, so that the packaging boxes cannot be used commonly, and resource waste is caused.
Disclosure of Invention
The utility model aims to provide a chip packaging box and a chip packaging system, which are used for solving the problem that the packaging box cannot be commonly used in the prior art, adapting to chips with different sizes, realizing recycling and avoiding resource waste.
In order to solve the technical problems, the utility model provides a chip packaging box, which comprises a box body, wherein a mounting groove for placing a chip and at least one fixing pad adjacent to the mounting groove are arranged on the box body, a plurality of conductive components which are spaced from each other and are insulated are distributed in the mounting groove, at least two of the conductive components are respectively adjacent to the edge and the center of the mounting groove, and at least one other conductive component exists in any preset distance range of the conductive components.
Preferably, the conductive member is a metal wire or a metal pad.
Preferably, when the conductive component is a metal pad, a metal layer is laid in the mounting groove, and an insulating tape is arranged between the metal pad and the metal layer.
Preferably, the conductive member is a printed circuit board.
Preferably, a plurality of grooves are formed in the mounting groove at intervals, and the plurality of printed circuit boards are respectively embedded in the plurality of grooves.
Preferably, the surface of the printed circuit board is provided with a metal shielding tape for shielding signals.
Preferably, the cross-sectional shape of the metal shielding tape is arched.
Preferably, the plurality of conductive members are arranged in an array, and the intervals between the conductive members in the row direction and the column direction are equal.
Preferably, the fixing pads are multiple and distributed around the mounting groove.
In order to solve the technical problems, the utility model also provides a chip packaging system, which comprises a chip and any one of the chip packaging boxes, wherein the chip is arranged in the mounting groove, when the conductive parts are exposed between the chip and the edge of the mounting groove, the signal contacts of the chip are connected with the fixed pads through preset conductive paths, the preset conductive paths are formed by connecting all or part of the exposed conductive parts through bonding wires in sequence, and the signal contacts and the fixed pads are respectively connected with the conductive parts at two ends of the preset conductive paths through bonding wires.
Compared with the prior art, the chip packaging box has the advantages that the mounting groove for placing chips and at least one fixing pad adjacent to the mounting groove are formed in the box body, a plurality of conductive components which are spaced from each other and are insulated are distributed in the mounting groove, when the packaging size of the packaging box is smaller than that of the chips in the mounting groove, the chips are connected with the fixing pad through bonding through the conductive components instead of being directly connected with the fixing pad in a bonding mode, so that the length of bonding wires is controlled, and when other chips are packaged, the bonding wires can be cut off to realize recycling, so that chips with different sizes can be matched, recycling is realized, and resource waste is avoided.
The chip packaging system provided by the utility model comprises the chip packaging box, and the chip packaging box belong to the same utility model conception and have the same technical effects, and are not repeated here.
Drawings
Fig. 1 is a schematic top view of a chip package according to an embodiment of the utility model.
Fig. 2 is a schematic top view of a chip package according to another embodiment of the utility model.
Fig. 3 is a schematic top view of a chip package according to another embodiment of the utility model.
Fig. 4 is a schematic cross-sectional view in the direction A-A of fig. 3.
Fig. 5 is a schematic top view of a chip package system according to an embodiment of the utility model.
Detailed Description
Specific embodiments of the present utility model will be described in more detail below with reference to the drawings. Advantages and features of the utility model will become more apparent from the following description and claims. It should be noted that the drawings are in a very simplified form and are all to a non-precise scale, merely for convenience and clarity in aiding in the description of embodiments of the utility model.
In the description of the present utility model, it should be understood that the directions or positional relationships indicated by the terms "center", "upper", "lower", "left", "right", etc., are based on the directions or positional relationships shown in the drawings, are merely for convenience in describing the present utility model and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the present utility model.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present utility model, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise.
Referring to fig. 1, an embodiment of the present utility model provides a chip package. The chip packaging box comprises a box body 1, wherein a mounting groove 11 for placing a chip and at least one fixing pad 12 adjacent to the mounting groove 11 are arranged on the box body 1, a plurality of conductive parts 13 which are spaced from each other and insulated are distributed in the mounting groove 11, at least two of the conductive parts 13 are respectively adjacent to the edge and the center of the mounting groove 11, and at least one other conductive part 13 exists in a preset distance range of any conductive part 13.
The plurality of conductive members 13 may be regularly distributed or irregularly distributed, and in this embodiment, they are preferably regularly distributed. Specifically, as shown in fig. 1, the plurality of conductive members 13 are arranged in an array, and the intervals between the conductive members 13 in the row direction and the column direction are equal. The spacing between the conductive members 13 needs to be less than or equal to a predetermined distance so as to ensure that at least one other conductive member 13 is present within the predetermined distance of any one conductive member 13.
Since many anchor pads 12 are generally required for a chip, the anchor pads 12 may be plural and distributed around the mounting groove 11. The spacing between the anchor pads 12 distributed at each edge of the mounting groove 11 may also be equal.
When the chip size of the chip package is smaller than the size of the mounting groove 11 and reaches a certain degree, there is a gap between the chip and the edge of the mounting groove 11, at least one conductive member 13 is exposed in the gap, the chip can be bonded to the fixing pad 12 through the conductive member 13 instead of being directly bonded to the fixing pad 12, that is, the chip is connected to the conductive member 13 through a bonding wire, the conductive member 13 is further connected to the fixing pad 12 through a bonding wire, if there are a plurality of conductive members 13 exposed in the gap from the chip to the fixing pad 12, the plurality of conductive members 13 are also sequentially connected through bonding wires, the fixing pad 12 is directly connected through a longer bonding wire with respect to the chip, and the length of the bonding wire is controlled. And when the chip packaging box is used for packaging other chips, the original chips can be removed, bonding wires are cut off, and new chips are bonded again, so that the chip packaging box can be reused. Therefore, the chip packaging box of the embodiment can be adapted to chips with different sizes, so that the repeated utilization is realized, and the resource waste is avoided.
The conductive members 13 may be of various types, and specifically, as shown in fig. 1, the conductive members 13 are metal pads which are arranged in an array, and the pitches between the metal pads in the row direction and the column direction are equal. Further, when the conductive member 13 is a metal pad, a metal layer 14 is laid in the mounting groove 11, and an insulating tape 15 is provided between the metal pad and the metal layer 14. The metal pads may be cut from the metal layer 14 that fills the mounting groove 11, and the cut-out metal layer 14 becomes an insulating tape.
As shown in fig. 2, the conductive members 13 are metal wires which can be arranged at intervals in the same direction in a plurality of directions from the center to the edge in the mounting groove 11, and after the metal wires are connected by bonding wires, the distance from the signal contact on the chip to the fixing pad 12 is the shortest.
As shown in fig. 3, the conductive member 13 is a printed circuit board, and the printed circuit board has signal lines thereon, and after the signal lines are bonded with bonding wires, connection between the printed circuit boards is achieved. Further, a plurality of grooves 16 are formed in the mounting groove 11 at intervals, and a plurality of printed circuit boards are respectively embedded in the plurality of grooves 16. Since the printed circuit board is liable to generate noise and loss, in order to reduce noise and loss, as shown in fig. 4, the surface of the printed circuit board is provided with a metal shielding tape 17 for shielding signals. The cross-sectional shape of the metal shielding tape is arched.
Referring to fig. 5, the embodiment of the utility model further provides a chip packaging system. The chip packaging system comprises a chip 2 and the chip packaging box of the previous embodiment, wherein the chip 2 is arranged in a mounting groove 11, when a conductive part 13 is exposed between the chip 2 and the edge of the mounting groove 11, a signal contact of the chip 2 is connected with a fixed pad 12 through a preset conductive path, the preset conductive path is formed by connecting all or part of the exposed conductive parts 13 sequentially through bonding wires 18, and the signal contact and the fixed pad 12 are respectively connected with the conductive parts 13 at two ends of the preset conductive path through the bonding wires 18. As shown in fig. 5, 12 signal contacts of the chip 2 are connected to 12 fixing pads 12 through 12 preset conductive paths, each preset conductive path is formed by connecting 2 conductive components 13 sequentially through bonding wires 18.
The chip 2 is usually fixed in the mounting groove 11 by means of gluing, and when other chips are replaced, the bonding wires 18 need to be cut off, and the chip packaging box is reused by removing glue by means of a glue remover and the like.
In the description of the present specification, a description of the terms "one embodiment," "some embodiments," "examples," or "particular examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the utility model. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments. Further, one skilled in the art can engage and combine the different embodiments or examples described in this specification.
The foregoing is merely a preferred embodiment of the present utility model and is not intended to limit the present utility model in any way. Any person skilled in the art will make any equivalent substitution or modification to the technical solution and technical content disclosed in the utility model without departing from the scope of the technical solution of the utility model, and the technical solution of the utility model is not departing from the scope of the utility model.

Claims (10)

1. The chip packaging box is characterized by comprising a box body, wherein a mounting groove for placing a chip and at least one fixing pad adjacent to the mounting groove are formed in the box body, a plurality of conductive components which are spaced from each other and are insulated are distributed in the mounting groove, at least two of the conductive components are respectively adjacent to the edge and the center of the mounting groove, and at least one other conductive component exists in a preset distance range of any conductive component.
2. The chip package of claim 1, wherein the conductive member is a metal wire or a metal pad.
3. The chip package according to claim 2, wherein when the conductive member is a metal pad, a metal layer is laid in the mounting groove, and an insulating tape is provided between the metal pad and the metal layer.
4. The chip package of claim 1, wherein the conductive member is a printed circuit board.
5. The chip package of claim 4, wherein a plurality of spaced apart channels are provided in the mounting slot, the plurality of printed circuit boards being respectively embedded in the plurality of channels.
6. The chip package of claim 4, wherein the printed circuit board surface is provided with a metallic shielding tape for shielding signals.
7. The chip package of claim 6, wherein the metallic shielding tape has an arcuate cross-sectional shape.
8. The chip package of claim 1, wherein the plurality of conductive members are arranged in an array, and the spacing between the conductive members in the row direction and the column direction are equal.
9. The chip package of claim 1, wherein the plurality of anchor pads are distributed around the mounting slot.
10. A chip packaging system, comprising a chip and a chip packaging box according to any one of claims 1 to 9, wherein the chip is mounted in the mounting groove, when a conductive part is exposed between the chip and the edge of the mounting groove, a signal contact of the chip is connected with a fixed pad through a preset conductive path, the preset conductive path is formed by connecting all or part of exposed conductive parts sequentially through bonding wires, and the signal contact and the fixed pad are respectively connected with the conductive parts at two ends of the preset conductive path through bonding wires.
CN202321709726.3U 2023-06-30 2023-06-30 Chip packaging box and chip packaging system Active CN220172102U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202321709726.3U CN220172102U (en) 2023-06-30 2023-06-30 Chip packaging box and chip packaging system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202321709726.3U CN220172102U (en) 2023-06-30 2023-06-30 Chip packaging box and chip packaging system

Publications (1)

Publication Number Publication Date
CN220172102U true CN220172102U (en) 2023-12-12

Family

ID=89061963

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202321709726.3U Active CN220172102U (en) 2023-06-30 2023-06-30 Chip packaging box and chip packaging system

Country Status (1)

Country Link
CN (1) CN220172102U (en)

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