CN220084922U - Multi-protocol frequency hopping filter measurement control circuit and test system - Google Patents
Multi-protocol frequency hopping filter measurement control circuit and test system Download PDFInfo
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- CN220084922U CN220084922U CN202321525406.2U CN202321525406U CN220084922U CN 220084922 U CN220084922 U CN 220084922U CN 202321525406 U CN202321525406 U CN 202321525406U CN 220084922 U CN220084922 U CN 220084922U
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Abstract
A multi-protocol frequency hopping filter measurement control circuit and a test system belong to the technical field of filter test and solve the problem that a serial interface filter cannot be measured due to the traditional filter measurement control circuit; the control unit, the interaction unit and the multi-protocol interface unit are designed; the multi-protocol interface unit includes: the RS232, RS485, RS422, CAN and direct drive interface circuits are respectively connected with the control unit; the interaction unit includes: the LED display device comprises an I/O port expander chip U5, an LED display circuit, a key input circuit and an LCD display circuit, wherein the I/O port expander chip U5 is connected with a control unit, the LED display circuit is connected with the I/O port expander chip U5, the key input circuit is connected with the I/O port expander chip U5, and the LCD display circuit is connected with the control unit; and meanwhile, a plurality of serial interfaces are added while the parallel interfaces are compatible, and the newly added serial interfaces enable the filter measurement control circuit to have wider measurement flexibility.
Description
Technical Field
The utility model belongs to the technical field of filter testing, and relates to a multi-protocol frequency hopping filter measurement control circuit and a test system.
Background
With the rapid development of communication technology, various forms and indexes of electric tuning/frequency hopping/multi-section filters are designed, and in order to adapt to flexible and diversified connection of communication system equipment, the filters adopt different interface control protocols according to different control requirements of a system, and in the development stage of the electric tuning/frequency hopping/multi-section filters, the electric tuning/frequency hopping/multi-section filters are required to be correspondingly controlled in the stages of filter production debugging, index testing and the like, and in order to shorten the product development period during mass production, automatic control is also indispensable.
The traditional electric tuning/frequency hopping/multi-section filter adopts a parallel port control mode, and a measurement control circuit of the traditional electric tuning/frequency hopping/multi-section filter also adopts a parallel port mode, so that on one hand, more system pin control resources are occupied, on the other hand, the traditional electric tuning/frequency hopping/multi-section filter lacks flexibility, cannot cope with the requirements of a serial port protocol and a high-speed control protocol, and has limitations.
Disclosure of Invention
The technical scheme of the utility model is used for solving the problem that the serial interface filter cannot be measured because the traditional filter measurement control circuit adopts a parallel interface mode.
The utility model solves the technical problems through the following technical scheme:
a multiprotocol frequency hopping filter measurement control circuit, comprising: the device comprises a control unit, an interaction unit and a multi-protocol interface unit; the multi-protocol interface unit includes: the RS232 interface circuit, the RS485 interface circuit, the RS422 interface circuit, the CAN interface circuit and the direct drive interface circuit are respectively connected with the control unit; the interaction unit includes: the LED display device comprises an I/O port expander chip U5, an LED display circuit, a key input circuit and an LCD display circuit, wherein the I/O port expander chip U5 is connected with a control unit, the LED display circuit is connected with the I/O port expander chip U5, the key input circuit is connected with the I/O port expander chip U5, and the LCD display circuit is connected with the control unit.
Further, the control unit includes: the control chip U1, the resistor R3, the resistor R19, the SWD interface P2, the capacitor C1 and the reset key S7; one end of the resistor R3 is connected with 28 of the control chip U1 # The other end of the resistor R3 is grounded; one end of the resistor R19 is connected with the VCC power supply, and the other end of the resistor R19 is connected with 7 of the control chip U1 # The pins are connected; one end of the capacitor C1 and 7 of the control chip U1 # The pins are connected, the other end of the capacitor C1 is grounded, and the reset key S7 is connected in parallel with the two ends of the capacitor C1; 3 of SWD interface P2 # Pins, 4 # 45 pins are respectively connected with the control chip U1 # Pins, 44 # Pin connection, 1 of SWD interface P2 # Pin connected with VCC power supply and SWD interface P2 # The pins are grounded.
Further, the number of the control chip U1 is STM32F103R8T6.
Further, the type of the I/O port expander chip U5 is PCA9535; 1 of I/O Port expander chip U5 # Pins, 22 # Pins, 23 # Pins are respectively connected with 51 of the control chip U1 # Pin, 53 # Pins, 52 # The pins are connected; the LED display circuit includes: 11 LED display diodes DS1 to DS11, the LED display diodes DS1 to DS11 respectively correspond to 4 of the I/O port expander chip U5 # Pin to 11 # Pins, 13 # Pin to 15 # The pins are connected; the key input circuit comprises 5 self-resetting keys S1 to S5, wherein the self-resetting keys S1 to S5 respectively correspond to 16 of the I/O port expander chip U5 # Pin to 20 # The pins are connected; the LCD display circuit adopts an LCD interface P4, and the LCD interface P4 is 1 # Pin is connected with VCC power supply, and LCD interface P4 2 # Pin ground, 3 of LCD interface P4 # Pins, 4 # Pin, 5 # Pins, 6 # Pins are respectively connected with 20 of the control chip U1 # Pins, 21 # Pins, 22 # Pins, 23 # Pin connection, liquid with LCD interface P4 connected with SPI protocolA crystal display.
Further, the level conversion chip U2 adopted by the RS232 interface circuit is MAX232 in model number, and the level conversion chip U2 is 11 # Pins, 12 # Pins are respectively connected with 42 of the control chip U1 # Pins, 43 # And the pins are connected.
Further, the model of the transceiver chip U3 adopted by the RS485 interface circuit is MAX3485, and 1 of the transceiver chip U3 # Pins, 4 # 17 of pins and control chip U1 respectively # Pins, 16 # Pin connection, 2 of transceiver chip U3 # Pin, 3 # Pins are all connected with 15 of the control chip U1 # And the pins are connected.
Further, the model of the transceiver chip U6 adopted by the RS422 interface circuit is MAX3490, and the model of the transceiver chip U6 is 2 # Pin, 3 # Pin and 59 of control chip U1 respectively # Pins, 58 # And the pins are connected.
Further, the model of the CAN bus driver chip U4 adopted by the CAN interface circuit is TJA1050T, and 1 of the CAN bus driver chip U4 # Pins, 4 # 29 of pins and control chip U1 respectively # Pins, 30 # And the pins are connected.
Further, the direct drive interface circuit includes: SPI interface P5, IIC interface P6, TTL interface P7 and 10bit parallel port P1; the SPI interface P5, the IIC interface P6, the TTL interface P7 and the 10bit parallel port P1 are directly connected with the control chip U1.
A test system employing the multi-protocol frequency hopping filter measurement control circuit, comprising: the system comprises a controller, a vector network analyzer and a multi-path output power supply; the vector network analyzer is connected with the filter to be measured, a control port of the filter to be measured is connected with a control port of the multi-protocol frequency hopping filter measurement control circuit, the multipath output power supply is respectively connected with the filter to be measured and the multi-protocol frequency hopping filter measurement control circuit, and the controller is connected with the vector network analyzer through a LAN interface and connected with the multi-protocol frequency hopping filter measurement control circuit through an RS232 interface.
The utility model has the advantages that:
the technical scheme of the utility model is that a control unit, an interaction unit and a multi-protocol interface unit are designed; the multi-protocol interface unit includes: the RS232 interface circuit, the RS485 interface circuit, the RS422 interface circuit, the CAN interface circuit and the direct drive interface circuit are respectively connected with the control unit; the interaction unit includes: the LED display device comprises an I/O port expander chip U5, an LED display circuit, a key input circuit and an LCD display circuit, wherein the I/O port expander chip U5 is connected with a control unit, the LED display circuit is connected with the I/O port expander chip U5, the key input circuit is connected with the I/O port expander chip U5, and the LCD display circuit is connected with the control unit; and meanwhile, a plurality of serial interfaces are added while the parallel interfaces are compatible, and the newly added serial interfaces enable the filter measurement control circuit to have wider measurement flexibility, so that the problem that the traditional filter measurement control circuit cannot measure the filter of the serial interfaces is solved.
Drawings
Fig. 1 is a block diagram of a configuration of a multi-protocol frequency hopping filter measurement control circuit of the first embodiment;
fig. 2 is a circuit diagram of a control unit of a multiprotocol hopping filter measurement control circuit of the first embodiment;
fig. 3 is a circuit diagram of an interaction unit of the multi-protocol frequency hopping filter measurement control circuit of the first embodiment;
fig. 4 is a circuit diagram of an RS232 interface of a multi-protocol frequency hopping filter measurement control circuit according to the first embodiment;
fig. 5 is a circuit diagram of an RS485 interface of a multi-protocol frequency hopping filter measurement control circuit according to the first embodiment;
fig. 6 is a circuit diagram of the RS422 interface of the multi-protocol frequency hopping filter measurement control circuit of the first embodiment;
FIG. 7 is a CAN interface circuit diagram of a multi-protocol frequency hopping filter measurement control circuit of embodiment one;
fig. 8 is a circuit diagram of a direct drive interface of a multi-protocol frequency hopping filter measurement control circuit of the first embodiment;
fig. 9 is a block diagram of a test system employing a multi-protocol frequency hopping filter measurement control circuit according to the second embodiment.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present utility model more apparent, the technical solutions in the embodiments of the present utility model will be clearly and completely described in the following in conjunction with the embodiments of the present utility model, and it is apparent that the described embodiments are some embodiments of the present utility model, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
The technical scheme of the utility model is further described below with reference to the attached drawings and specific embodiments:
example 1
As shown in fig. 1, the multiprotocol hopping filter measurement control circuit of the present embodiment includes: the system comprises a control unit, an interaction unit and a multi-protocol interface unit, wherein the control unit is respectively connected with the interaction unit and the multi-protocol interface unit. The multi-protocol interface unit includes: an RS232 interface circuit, an RS485 interface circuit, an RS422 interface circuit, a CAN interface circuit and a direct drive interface circuit; the RS232 interface circuit, the RS485 interface circuit, the RS422 interface circuit, the CAN interface circuit and the direct drive interface circuit are respectively connected with the control unit; the interaction unit includes: an I/O port expander chip U5, an LED display circuit, a key input circuit and an LCD display circuit; the I/O port expander chip U5 is connected with the control chip U1, the LED display circuit is connected with the I/O port expander chip U5, the key input circuit is connected with the I/O port expander chip U5, and the LCD display circuit is connected with the control chip U1.
As shown in fig. 2, the control unit includes: the control chip U1, the resistor R3, the resistor R19, the SWD interface P2, the capacitor C1 and the reset key S7; the number of the control chip U1 is STM32F103R8T6; one end of the resistor R3 is connected with 28 of the control chip U1 # The other end of the resistor R3 is grounded; electric powerOne end of the resistor R19 is connected with the VCC power supply, and the other end of the resistor R19 is connected with 7 of the control chip U1 # The pins are connected; one end of the capacitor C1 and 7 of the control chip U1 # The pins are connected, the other end of the capacitor C1 is grounded, and the reset key S7 is connected in parallel with the two ends of the capacitor C1; 3 of SWD interface P2 # Pins, 4 # 45 pins are respectively connected with the control chip U1 # Pins, 44 # Pin connection, 1 of SWD interface P2 # Pin connected with VCC power supply and SWD interface P2 # The pins are grounded. The resistor R3 is used for configuring a downloading mode of the control chip U1, the SWD interface P2 is used for downloading firmware of the control chip U1, the resistor R19, the capacitor C1 and the reset key S7 form a reset circuit and are used for controlling hardware reset of the control chip U1, and when the reset key S7 is pressed, the control chip U1 is triggered to reset.
As shown in fig. 3, the type of the I/O port expander chip U5 is PCA9535; 1 of I/O Port expander chip U5 # Pins, 22 # Pins, 23 # Pins are respectively connected with 51 of the control chip U1 # Pin, 53 # Pins, 52 # The pins are connected; the LED display circuit includes: 11 LED display diodes DS1 to DS11, the LED display diodes DS1 to DS11 respectively correspond to 4 of the I/O port expander chip U5 # Pin to 11 # Pins, 13 # Pin to 15 # The pins are connected; the key input circuit comprises 5 self-resetting keys S1 to S5, wherein the self-resetting keys S1 to S5 respectively correspond to 16 of the I/O port expander chip U5 # Pin to 20 # The pins are connected; the LCD display circuit adopts an LCD interface P4, and the LCD interface P4 is 1 # Pin is connected with VCC power supply, and LCD interface P4 2 # Pin ground, 3 of LCD interface P4 # Pins, 4 # Pin, 5 # Pins, 6 # Pins are respectively connected with 20 of the control chip U1 # Pins, 21 # Pins, 22 # Pins, 23 # The pin is connected, and the LCD interface P4 is connected with a liquid crystal display of SPI protocol. The I/O port expander chip U5 converts the 5bit key parallel port signal into IIC serial data and sends the IIC serial data to the control chip U1 for processing the event, and simultaneously, the serial LED display event sent by the control chip U1 passes through the I/O port expander chipU5 is converted into 11bit parallel signals and transmitted to the LED display circuit to control the LED display.
As shown in FIG. 4, the level shift chip U2 used in the RS232 interface circuit has a model number of MAX232 and 11 of level shift chip U2 # Pins, 12 # Pins are respectively connected with 42 of the control chip U1 # Pins, 43 # And the pins are connected.
As shown in FIG. 5, the transceiver chip U3 used in the RS485 interface circuit is MAX3485, and 1 of the transceiver chip U3 # Pins, 4 # 17 of pins and control chip U1 respectively # Pins, 16 # Pin connection, 2 of transceiver chip U3 # Pin, 3 # Pins are all connected with 15 of the control chip U1 # And the pins are connected.
As shown in FIG. 6, the transceiver chip U6 used by the RS422 interface circuit is MAX3490, and the transceiver chip U6 is 2 # Pin, 3 # Pin and 59 of control chip U1 respectively # Pins, 58 # And the pins are connected.
As shown in fig. 7, the model of the CAN bus driver chip U4 adopted by the CAN interface circuit is TJA1050T, and 1 of the CAN bus driver chip U4 # Pins, 4 # 29 of pins and control chip U1 respectively # Pins, 30 # And the pins are connected.
Fig. 8 is a direct drive interface circuit, comprising: SPI interface P5, IIC interface P6, TTL interface P7 and 10bit parallel port P1; the SPI interface P5, the IIC interface P6, the TTL interface P7 and the 10bit parallel port P1 are directly connected with the control chip U1.
Example two
This embodiment describes a test system using the multi-protocol frequency hopping filter measurement control circuit of the first embodiment, as shown in fig. 9, the test system includes: the device comprises a controller, a vector network analyzer, a multi-path output power supply and a filter to be tested; the method comprises the steps of connecting radio frequency ports 1 and 2 of a filter to be tested with a vector network analyzer, connecting a control port of the filter to be tested with a control port of a multi-protocol frequency hopping filter measurement control circuit, connecting the control port of the filter to be tested with a10 bit parallel port P1 of the multi-protocol frequency hopping filter measurement control circuit if the filter to be tested is parallel port, connecting the control port of the filter to be tested with an SPI interface P5 of the multi-protocol frequency hopping filter measurement control circuit if the filter to be tested is SPI interface, connecting a multi-protocol frequency hopping filter measurement control circuit with P3 in an RS485 interface circuit of the multi-protocol frequency hopping filter measurement control circuit if the filter to be tested is RS485 interface, connecting a multi-path output power supply with the filter to be tested and the multi-protocol frequency hopping filter measurement control circuit respectively, simultaneously supplying power to the filter to be tested and the multi-protocol frequency hopping filter measurement control circuit by a multi-path output power supply, connecting the controller with the vector network analyzer through an LAN interface, selecting an interface protocol of the filter to be tested with the multi-protocol frequency hopping filter measurement control circuit through keys of the multi-protocol frequency hopping filter measurement control circuit when testing, and automatically setting the filter to complete the test of the vector network analyzer through the multi-protocol frequency hopping filter measurement control circuit.
The above embodiments are only for illustrating the technical solution of the present utility model, and are not limiting; although the utility model has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present utility model.
Claims (10)
1. A multi-protocol frequency hopping filter measurement control circuit, comprising: the device comprises a control unit, an interaction unit and a multi-protocol interface unit; the multi-protocol interface unit includes: the RS232 interface circuit, the RS485 interface circuit, the RS422 interface circuit, the CAN interface circuit and the direct drive interface circuit are respectively connected with the control unit; the interaction unit includes: the LED display device comprises an I/O port expander chip U5, an LED display circuit, a key input circuit and an LCD display circuit, wherein the I/O port expander chip U5 is connected with a control unit, the LED display circuit is connected with the I/O port expander chip U5, the key input circuit is connected with the I/O port expander chip U5, and the LCD display circuit is connected with the control unit.
2. The multiprotocol hopping filter measurement control circuit of claim 1, wherein the control unit comprises: the control chip U1, the resistor R3, the resistor R19, the SWD interface P2, the capacitor C1 and the reset key S7; one end of the resistor R3 is connected with 28 of the control chip U1 # The other end of the resistor R3 is grounded; one end of the resistor R19 is connected with the VCC power supply, and the other end of the resistor R19 is connected with 7 of the control chip U1 # The pins are connected; one end of the capacitor C1 and 7 of the control chip U1 # The pins are connected, the other end of the capacitor C1 is grounded, and the reset key S7 is connected in parallel with the two ends of the capacitor C1; 3 of SWD interface P2 # Pins, 4 # 45 pins are respectively connected with the control chip U1 # Pins, 44 # Pin connection, 1 of SWD interface P2 # Pin connected with VCC power supply and SWD interface P2 # The pins are grounded.
3. The multi-protocol frequency hopping filter measurement control circuit of claim 1, wherein the control chip U1 is numbered STM32F103R8T6.
4. The multi-protocol frequency hopping filter measurement control circuit as claimed in claim 2, wherein the I/O port extender chip U5 is model number PCA9535; 1 of I/O Port expander chip U5 # Pins, 22 # Pins, 23 # Pins are respectively connected with 51 of the control chip U1 # Pin, 53 # Pins, 52 # The pins are connected; the LED display circuit includes: 11 LED display diodes DS1 to DS11, the LED display diodes DS1 to DS11 respectively correspond to 4 of the I/O port expander chip U5 # Pin to 11 # Pins, 13 # Pin to 15 # The pins are connected; the key input circuit comprises 5 self-resetting keys S1 to S5, wherein the self-resetting keys S1 to S5 respectively correspond to 16 of the I/O port expander chip U5 # Pin to 20 # The pins are connected; the LCD display circuit adopts an LCD interface P4, and the LCD interface P4 is 1 # Pin is connected with VCC power supply, and LCD interface P4 2 # Pin ground, 3 of LCD interface P4 # Pins, 4 # Pin, 5 # Pins, 6 # Pins are respectively connected with 20 of the control chip U1 # Pins, 21 # Pins, 22 # Pins, 23 # The pin is connected, and the LCD interface P4 is connected with a liquid crystal display of SPI protocol.
5. The measurement control circuit of the multi-protocol frequency hopping filter according to claim 2, wherein the level conversion chip U2 used in the RS232 interface circuit has a model number of MAX232 and 11 of the level conversion chip U2 # Pins, 12 # Pins are respectively connected with 42 of the control chip U1 # Pins, 43 # And the pins are connected.
6. The multi-protocol frequency hopping filter measurement control circuit according to claim 2, wherein the transceiver chip U3 used in the RS485 interface circuit is MAX3485, and 1 of the transceiver chip U3 # Pins, 4 # 17 of pins and control chip U1 respectively # Pins, 16 # Pin connection, 2 of transceiver chip U3 # Pin, 3 # Pins are all connected with 15 of the control chip U1 # And the pins are connected.
7. The multi-protocol frequency hopping filter measurement control circuit according to claim 2, wherein the transceiver chip U6 used in the RS422 interface circuit is MAX3490, 2 of the transceiver chip U6 # Pin, 3 # Pin and 59 of control chip U1 respectively # Pins, 58 # And the pins are connected.
8. The multi-protocol frequency hopping filter measurement control circuit according to claim 2, wherein the CAN bus driver chip U4 used for the CAN interface circuit is model TJA1050T, 1 of CAN bus driver chip U4 # Pins, 4 # 29 of pins and control chip U1 respectively # Pins, 30 # And the pins are connected.
9. The multi-protocol frequency hopping filter measurement control circuit of claim 2, wherein the direct drive interface circuit comprises: SPI interface P5, IIC interface P6, TTL interface P7 and 10bit parallel port P1; the SPI interface P5, the IIC interface P6, the TTL interface P7 and the 10bit parallel port P1 are directly connected with the control chip U1.
10. A test system employing the multiprotocol hopping filter measurement control circuit of any one of claims 1 to 9, comprising: the system comprises a controller, a vector network analyzer and a multi-path output power supply; the vector network analyzer is connected with the filter to be measured, a control port of the filter to be measured is connected with a control port of the multi-protocol frequency hopping filter measurement control circuit, the multipath output power supply is respectively connected with the filter to be measured and the multi-protocol frequency hopping filter measurement control circuit, and the controller is connected with the vector network analyzer through a LAN interface and connected with the multi-protocol frequency hopping filter measurement control circuit through an RS232 interface.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202321525406.2U CN220084922U (en) | 2023-06-14 | 2023-06-14 | Multi-protocol frequency hopping filter measurement control circuit and test system |
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| CN202321525406.2U CN220084922U (en) | 2023-06-14 | 2023-06-14 | Multi-protocol frequency hopping filter measurement control circuit and test system |
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| CN220084922U true CN220084922U (en) | 2023-11-24 |
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