CN220043050U

CN220043050U - Power supply switching circuit and electronic equipment

Info

Publication number: CN220043050U
Application number: CN202321200074.0U
Authority: CN
Inventors: 刘德滨; 陈志彬
Original assignee: Xiamen Del Micro Technology Co ltd
Current assignee: Xiamen Del Micro Technology Co ltd
Priority date: 2023-05-18
Filing date: 2023-05-18
Publication date: 2023-11-17
Anticipated expiration: 2033-05-18

Abstract

The utility model provides a power supply switching circuit and electronic equipment, which comprise a first MOS tube, a second MOS tube, a third MOS tube, a first triode, a second triode and a third triode; the control end of the first MOS tube is connected with the collector electrode of the first triode, the first end of the first MOS tube is connected with an external power socket, and the second end of the first MOS tube is connected with the power output end; the control end of the second MOS tube is connected with the collector electrode of the third triode, the first end of the second MOS tube is connected with an internal power interface, and the second end of the second MOS tube is connected with the power output end; the base electrode of the first triode is connected with an external power socket, and the emitter electrode is grounded; the base electrode of the second triode is connected with an external power supply jack, the collector electrode of the second triode is connected with the base electrode of the third triode, and the emitter electrode of the second triode is grounded; the emitter electrode of the third triode is grounded; the first MOS tube is turned off in response to disconnection of the external power socket and the external power supply and turned on in response to connection of the external power socket to the external power supply; the second MOS tube is connected in response to disconnection of the external power socket and the external power supply and is disconnected in response to connection of the external power socket and the external power supply.

Description

Power supply switching circuit and electronic equipment

Technical Field

The utility model relates to the technical field of electronic circuits. And more particularly, to a power supply switching circuit and an electronic apparatus.

Background

A simple isolation mode in the prior art is to switch the power supply through a mechanical switch, such as a toggle switch, an electromagnetic relay, etc. However, the mode has a great disadvantage that the toggle switch needs manual operation by a user, which is inconvenient; electromagnetic relays have the disadvantages of large size, static leakage current, noise in operation and the like.

In addition to the above-mentioned manner of switching power through a mechanical switch, the following two manners exist in the prior art:

first, a large number of portable electronic devices utilize schottky diodes to achieve isolation between power sources from a cost reduction perspective. However, portable electronic devices have limited power consumption, some Xu Yajiang are provided by using schottky diodes, and the whole machine can work, but the power supply efficiency is not high. Under individual conditions, for example, the instant high-power operation of the whole machine can cause the power supply voltage of the whole machine to drop sharply, and even cause the abnormal shutdown of the whole machine under extreme conditions.

And the second, individual electronic equipment adopts a mode that a PMOS tube and an NMOS tube are combined to form two groups of change-over switches, and one group of power supply corresponds to one group of switch. The PMOS tube is used as a power switch and is driven and controlled by the NMOS tube, and the driving state of the NMOS tube depends on whether an external power supply is connected or not. If the external power supply is connected, the NMOS tube conducts the PMOS tube corresponding to the external power supply, and meanwhile the PMOS tube corresponding to the battery is cut off, and vice versa. Compared with the mode of utilizing the Schottky diode, the mode has improved performance, and the voltage drop of the PMOS tube in the complete conduction state is generally smaller than that of the Schottky diode, so that the power supply efficiency of the whole machine is improved. However, the disadvantage is that the NMOS transistor needs to be driven with Vgs greater than the turn-on threshold Vgs (th), which requires that the NMOS transistor must be driven by a high voltage source higher than the supply voltage, for example, the battery voltage is 4.2V and the external power supply voltage is 5.0V, and in order to ensure that the NMOS transistor can operate normally, a stable voltage of 7V or more needs to be provided. Obviously, this necessitates the addition of a high voltage power supply or a system power supply to generate the high voltage and introduce it into the control circuit, increasing circuit cost and circuit complexity.

In addition, the design schemes such as a comparator and a microcontroller MCU are adopted, the basic ideas of the design schemes are that a logic device switches a power switch tube according to certain conditions, such as whether the condition of inserting an external power supply, the magnitude of a power supply voltage and the like is detected, but the circuit implementation of the design schemes is complex.

Accordingly, it is desirable to provide a new power switching circuit and electronic device.

Disclosure of Invention

The utility model aims to provide a power supply switching circuit and electronic equipment, which are used for solving at least one of the problems existing in the prior art.

In order to achieve the above purpose, the utility model adopts the following technical scheme:

the first aspect of the utility model provides a power supply switching circuit, which comprises a first MOS tube, a second MOS tube, a third MOS tube, a first triode, a second triode and a third triode; the control end of the first MOS tube is connected with the collector electrode of the first triode, the first end of the first MOS tube is connected with an external power socket, and the second end of the first MOS tube is connected with the power output end; the control end of the second MOS tube is connected with the collector electrode of the third triode, the first end of the second MOS tube is connected with an internal power interface, and the second end of the second MOS tube is connected with the power output end; the base electrode of the first triode is connected with an external power socket, and the emitter electrode is grounded; the base electrode of the second triode is connected with an external power supply jack, the collector electrode of the second triode is connected with the base electrode of the third triode, and the emitter electrode of the second triode is grounded; the emitter of the third triode is grounded;

the first MOS tube is turned off in response to disconnection of the external power socket and the external power supply and turned on in response to connection of the external power socket to the external power supply; the second MOS tube is connected in response to disconnection of the external power socket and the external power supply and is disconnected in response to connection of the external power socket and the external power supply.

Through the technical scheme, under the condition that the external power supply supplies power, the internal power supply does not output; when the external power supply stops supplying power, the internal power supply can directly replace the external power supply to supply power.

Preferably, the first MOS transistor and the second MOS transistor are PMOS transistors respectively.

Preferably, the first end of the first MOS tube and the first end of the second MOS tube are drain electrodes respectively, and the second end of the first MOS tube and the second end of the second MOS tube are source electrodes respectively.

Preferably, the power supply switching circuit further includes a first resistor, a first end of the first resistor is connected to a source electrode of the first MOS transistor, and a second end of the first resistor is connected to a base electrode of the first triode.

Preferably, the first triode, the second triode and the third triode are NPN type triodes respectively.

Preferably, the MOS transistor further comprises a third resistor, wherein the first end of the third resistor is connected with the drain electrode of the second MOS transistor, and the second end of the third resistor is connected with the control end of the second MOS transistor.

Preferably, the MOS transistor further comprises a second resistor, wherein the first end of the second resistor is connected with the source electrode of the first MOS transistor, and the second end of the second resistor is connected with the control end of the first MOS transistor.

Preferably, the circuit comprises a third resistor, a fourth resistor and a fifth resistor, wherein the first end of the third resistor is connected with the source electrode of the second MOS tube, and the second end of the third resistor is connected with the collector electrode of the third triode; the first end of the fourth resistor is connected with the source electrode of the first MOS tube, and the second end of the fourth resistor is connected with the base electrode of the third triode; the first end of the fifth resistor is connected with an external power socket, and the second end of the fifth resistor is connected with the base electrode of the second triode.

Preferably, the resistance value of the third resistor is equal to or smaller than the resistance value of the fourth resistor.

Preferably, the portable electronic device further comprises a first diode and a second diode, wherein the first end of the first diode is connected with the external power socket, the second end of the first diode is connected with the power output end, the first end of the second diode is connected with the internal power interface, and the second end of the second diode is connected with the power output end.

Preferably, schottky diodes are integrated on the first MOS transistor and the second MOS transistor.

In a second aspect of the utility model there is provided an electronic device comprising the power switching circuit provided in the first aspect of the utility model.

The beneficial effects of the utility model are as follows:

according to the technical scheme, the on/off of the MOS tube is controlled through the level state change after the external power supply is connected, so that the automatic switching and isolation between the internal power supply and the external power supply are realized by a pure hardware circuit, manual operation and software programming are not needed, the power supply switching efficiency is high, the reliability is high, the circuit is simple, and the circuit cost is low.

Drawings

The accompanying drawings are included to provide a further understanding of the embodiments and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments and together with the description serve to explain the principles of the utility model. Many of the intended advantages of other embodiments and embodiments will be readily appreciated as they become better understood by reference to the following detailed description. The elements of the drawings are not necessarily to scale relative to each other. Like reference numerals designate corresponding similar parts.

Fig. 1 is a circuit diagram of a power supply switching circuit according to an embodiment of the present utility model.

Meaning of each number in the figure:

VCC1, external power socket; VCC2, internal power supply; vout, power supply output; d1, a first diode; d2, a second diode; d3, schottky diode; m1, a first MOS tube; m2, a second MOS tube; q1, a first triode; q2, a second triode; q3, a third triode; r1, a first resistor; r2, a second resistor; r3, a third resistor; r4, fourth resistor; r5, fifth resistor.

Detailed Description

In the following detailed description, reference is made to the accompanying drawings, which form a part hereof, and in which is shown by way of illustration specific embodiments in which the utility model may be practiced. For this, directional terms, such as "top", "bottom", "left", "right", "upper", "lower", and the like, are used with reference to the orientation of the described figures. Because components of embodiments can be positioned in a number of different orientations, the directional terminology is used for purposes of illustration and is in no way limiting. It is to be understood that other embodiments may be utilized or logical changes may be made without departing from the scope of the present utility model. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the present utility model is defined by the appended claims.

The utility model provides a power supply switching circuit, fig. 1 shows a circuit diagram of the power supply switching circuit according to an embodiment of the utility model, as shown in fig. 1, including: the first MOS transistor M1, the second MOS transistor M2, the first triode Q1, the second triode Q2 and the third triode Q3.

The control end of the first MOS tube M1 is connected with the collector electrode of the first triode Q1, the first end is connected with an external power socket VCC1, and the second end is connected with the power output end Vout. As shown in fig. 1, the control end of the first MOS transistor M1 is a gate thereof, the first end connected to the external power socket VCC1 is a drain thereof, and the second end connected to the power output end Vout is a source thereof.

The control end of the second MOS tube M2 is connected with the collector electrode of the third triode Q3, the first end is connected with an internal power VCC2 interface, and the second end is connected with a power output end Vout. As shown in fig. 1, the control end of the second MOS transistor M2 is a gate thereof, the first end connected to the internal power VCC2 is a drain thereof, and the second end connected to the power output terminal Vout is a source thereof.

The base electrode of the first triode Q1 is connected with an external power socket VCC1, and the emitter electrode is grounded; the base electrode of the second triode Q2 is connected with an external power supply jack, the collector electrode is connected with the base electrode of the third triode Q3, and the emitter electrode is grounded; the emitter of the third transistor Q3 is grounded.

The first MOS tube M1 is turned off in response to disconnection of the external power socket VCC1 and an external power supply, and turned on in response to connection of the external power socket VCC1 to the external power supply; the second MOS tube M2 is turned on in response to disconnection of the external power socket VCC1 from an external power supply and turned off in response to connection of the external power socket VCC1 to the external power supply.

The power supply switching circuit provided by the embodiment skillfully utilizes the MOS tube and the triode matched with the MOS tube, and effectively realizes automatic switching and isolation of the power supply, wherein the isolation is to prevent the internal power supply VCC2 from being conducted with the power supply output end Vout to be output outwards under the condition of power supply of an external power supply.

In this embodiment, the first MOS transistor M1 and the second MOS transistor M2 are PMOS transistors respectively. It can be understood that the two MOS transistors in this embodiment may also be NMOS transistors by making corresponding adjustments to the circuit shown in fig. 1. However, if the NMOS is adopted, there is a problem that high voltage driving needs to be applied, the resistance of the bias resistor of the NMOS needs to be accurately calculated, the NMOS is accurately matched through the resistance setting of the peripheral resistor, and once the resistance, the power supply voltage or the parameters of the NMOS change (such as temperature change, MOS type change, etc.), the risk of circuit abnormality is caused. Therefore, the first MOS transistor M1 and the second MOS transistor M2 in this embodiment are PMOS transistors.

In a preferred embodiment, the power supply switching circuit further includes a first resistor R1, a first end of the first resistor R1 is connected to the drain of the first MOS transistor M1, and a second end of the first resistor R1 is connected to the base of the first transistor Q1.

In a preferred embodiment, the first transistor Q1, the second transistor Q2, and the third transistor Q3 of the power supply switching circuit all adopt NPN transistors.

In a preferred embodiment, the first end of the second resistor R2 is connected to the source of the first MOS transistor M1, and the second end is connected to the gate of the first MOS transistor M1; the first end of the third rheostat is connected with the source electrode of the second MOS tube M2, and the second end of the third rheostat is connected with the grid electrode of the second MOS tube M2. By adopting the implementation mode, the resistor is connected between the source electrode and the grid electrode of the MOS tube, the voltage difference between the source electrode and the grid electrode of the MOS tube is reduced by using the resistor, the anti-interference capability of the MOS tube can be improved, the misoperation of the MOS tube is reduced, and the MOS tube is protected.

In a preferred embodiment, the power supply switching circuit comprises a fourth resistor R4, a fifth resistor; the first end of the fourth resistor R4 is connected with the source electrode of the first MOS tube M1, and the second end of the fourth resistor R4 is connected with the base electrode of the third triode Q3; the first end of the fifth resistor is connected with the external power socket VCC1, and the second end of the fifth resistor is connected with the base electrode of the second triode Q2.

In a preferred embodiment, the resistance of the third resistor R3 is equal to or less than the resistance of the fourth resistor R4.

In a preferred embodiment, the schottky diode D3 is integrated on the first MOS transistor M1 and the second MOS transistor M2. By adopting the implementation mode, the characteristics of voltage stabilization and follow current of the Schottky diode D3 are utilized, when a large instant reverse current is generated in the circuit, the current can be led out through the diode, and the source electrode and the drain electrode of the MOS tube are protected, so that the MOS tube is prevented from being burnt out.

It will be appreciated that in actual use the present utility model has three cases:

(1) When only the external power supply socket VCC1 supplies power, the external power supply socket VCC1 is at a high level, the first resistor R1, the fifth resistor, and the first diode D1 are turned on, and as shown in fig. 1, the points P3 and P5 are at a high level, and the base voltage of the first triode Q1 is higher than the emitter voltage, so that the first triode Q1 is turned on; at this time, the P1 point is known to be at low level, and because the power output terminal Vout is at high level, vgs > (th) in the first MOS transistor M1, the first MOS transistor M1 is turned on; the base voltage of the same second triode Q2 is higher than the emitter voltage, so that the second triode Q2 is conducted; it can be also known that the point P4 is at a low level, so that the third triode Q3 is turned off, the point P2 is at a high level, vgs=0 in the second MOS transistor M2 is turned off, and the internal power VCC2 is not supplied.

(2) When only the internal power VCC2 supplies power, the second resistor R2 is turned on, the power output terminal Vout is at a high level, and as shown in fig. 1, points P1, P2, and P4 are at a high level, where vgs=0 in the first MOS transistor M1, and the first MOS transistor M1 is turned off; because the resistance value of the third resistor R3 is smaller than or equal to the resistance value of the fourth resistor R4, the third triode Q3 is conducted, the P2 point level is pulled down, so that Vgs > (th) in the second MOS tube M2 is conducted, and the internal power supply VCC2 supplies power.

(3) When the external power supply socket VCC1 and the internal power supply VCC2 supply power simultaneously, the external power supply socket VCC1 and the internal power supply VCC2 are at high level, the first resistor R1, the second resistor R2, the first diode D1 and the second diode D2 are turned on, and the points P3 and P5 and the power supply output terminal Vout are at high level as shown in fig. 1, at this time, the base voltage of the first triode Q1 is greater than the emitter voltage, the first triode Q1 is turned on, the point P1 is at low level, so that Vgs > (th) in the first MOS tube M1 are enabled, the first MOS tube M1 is turned on, and the external power supply socket VCC1 outputs voltage through the first MOS tube M1; because the point P5 is high level, the base voltage of the second triode Q2 is larger than the emitter voltage, the second triode Q2 is conducted, the point P4 is low level, further, the base voltage of the third triode Q3 is smaller than the emitter voltage, and the third triode Q3 is cut off; because the power output terminal Vout is at a high level, the P2 point is also at a high level, and vgs=0 in the second MOS transistor M2 is turned off. According to the utility model, the second triode is arranged, and the characteristics of the triode and the MOS tube are utilized, so that the internal power supply does not supply power under the condition that an external power supply supplies power; when the external power supply stops supplying power, the internal power supply can directly replace the external power supply for supplying power.

It will be apparent to those skilled in the art that various modifications and variations can be made to the embodiments of the present utility model without departing from the spirit and scope of the utility model. In this manner, the utility model is also intended to cover such modifications and variations as come within the scope of the appended claims and their equivalents. The word "comprising" does not exclude the presence of other elements or steps than those listed in a claim. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage. Any reference signs in the claims shall not be construed as limiting the scope.

Claims

1. The power supply switching circuit is characterized by comprising a first MOS tube, a second MOS tube, a third MOS tube, a first triode, a second triode and a third triode; the control end of the first MOS tube is connected with the collector electrode of the first triode, the first end of the first MOS tube is connected with an external power socket, and the second end of the first MOS tube is connected with the power output end; the control end of the second MOS tube is connected with the collector electrode of the third triode, the first end of the second MOS tube is connected with an internal power interface, and the second end of the second MOS tube is connected with the power output end; the base electrode of the first triode is connected with an external power socket, and the emitter electrode is grounded; the base electrode of the second triode is connected with an external power supply jack, the collector electrode of the second triode is connected with the base electrode of the third triode, and the emitter electrode of the second triode is grounded; the emitter electrode of the third triode is grounded;

2. The power supply switching circuit according to claim 1, wherein the first MOS transistor and the second MOS transistor are PMOS transistors, respectively.

3. The power supply switching circuit according to claim 2, wherein the first end of the first MOS transistor and the first end of the second MOS transistor are drain electrodes, respectively, and the second end of the first MOS transistor and the second end of the second MOS transistor are source electrodes, respectively.

4. The power supply switching circuit according to claim 2, further comprising a first resistor, wherein a first end of the first resistor is connected to the drain of the first MOS transistor, and a second end of the first resistor is connected to the base of the first transistor.

5. The power switching circuit of claim 2, wherein the first transistor, the second transistor, and the third transistor are NPN transistors, respectively.

6. The power supply switching circuit according to claim 2, further comprising a second resistor, a third resistor, a fourth resistor, and a fifth resistor; the first end of the second resistor is connected with the source electrode of the first MOS tube, and the second end of the second resistor is connected with the control end of the first MOS tube; the first end of the third resistor is connected with the source electrode of the second MOS tube, and the second end of the third resistor is connected with the control end of the second MOS tube; the first end of the fourth resistor is connected with the source electrode of the first MOS transistor, and the second end of the fourth resistor is connected with the base electrode of the third triode; and the first end of the fifth resistor is connected with an external power socket, and the second end of the fifth resistor is connected with the base electrode of the second triode.

7. The power switching circuit according to claim 6, wherein the third resistor has a resistance value equal to or less than a resistance value of the fourth resistor.

8. The power supply switching circuit according to claim 2, further comprising a first diode and a second diode, wherein a first end of the first diode is connected to the external power socket, a second end of the first diode is connected to the power output terminal, a first end of the second diode is connected to the internal power interface, and a second end of the second diode is connected to the power output terminal.

9. The power supply switching circuit according to claim 2, wherein schottky diodes are integrated on the first and second MOS transistors.

10. An electronic device comprising the power supply switching circuit of any one of claims 1-9.