CN220042575U

CN220042575U - VCSEL with double oxide layers

Info

Publication number: CN220042575U
Application number: CN202321002140.3U
Authority: CN
Inventors: 侯继同; 马德正; 陈柏翰
Original assignee: Quanzhou San'an Optical Communication Technology Co ltd
Current assignee: Quanzhou San'an Optical Communication Technology Co ltd
Priority date: 2023-04-28
Filing date: 2023-04-28
Publication date: 2023-11-17
Anticipated expiration: 2033-04-28

Abstract

The utility model discloses a double-oxide-layer VCSEL, which comprises a substrate, a bottom DBR, an active layer, a first oxide layer, a transition layer, a second oxide layer and a top DBR which are sequentially stacked, wherein the first oxide layer is provided with a first limiting hole, the second oxide layer is provided with a second limiting hole, and the first limiting hole and the second limiting hole are provided with the same aperture and correspond to each other in the stacking direction; the transition layer is 3-15 pairs of DBR layers with alternating high and low refractive indexes. The capacitance is reduced through the arrangement of the double-layer oxide layers, the working speed of the VCSEL is improved, a transition layer with a certain range is arranged between the double-layer oxide layers, effective optical limitation is realized while effective current limitation is realized, a high-order mode is reduced, and the spectrum width is reduced.

Description

VCSEL with double oxide layers

Technical Field

The utility model belongs to the technical field of lasers, and particularly relates to a double-oxide-layer VCSEL.

Background

With the increasing demand for rapid acquisition of massive amounts of information, vertical Cavity Surface Emitting Lasers (VCSELs) have become important semiconductor devices for short-range optical interconnects and high-performance computers. VCSEL products have been developed from 14G to 28G and other higher speed devices. As the transmission rate increases, VCSELs are required to have extremely low junction capacitance and additional capacitance. Junction capacitance is achieved primarily by reducing the area of the PN junction. The additional capacitance mainly comes from the contribution of the capacitance of the oxide layer and the capacitance of the electrode, and the current effective method for reducing the contribution of the capacitance of the electrode is to insert a thick dielectric film insulating layer or an organic polymer layer below the electrode, so as to reduce the capacitance by increasing the thickness of the insulating medium. A single oxide layer is typically provided in the existing VCSEL device to limit the current, but this approach generates a large capacitance, which limits the improvement of the transmission rate.

Disclosure of Invention

Aiming at the defects existing in the prior art, the utility model provides a double-oxide-layer VCSEL.

In order to achieve the above object, the technical scheme of the present utility model is as follows:

the VCSEL comprises a substrate, a bottom DBR, an active layer, a first oxide layer, a transition layer, a second oxide layer and a top DBR which are sequentially overlapped from bottom to top, wherein the first oxide layer is provided with a first limiting hole, the second oxide layer is provided with a second limiting hole, and the first limiting hole and the second limiting hole are provided with the same aperture and correspond to each other in the overlapping direction; the transition layer is 3-15 pairs of DBR layers with alternating high and low refractive indexes.

Optionally, the first oxide layer and the second oxide layer are located at node positions of the optical standing wave field.

Optionally, the optical fiber array further comprises a contact layer arranged on the top DBR, wherein a first electrode is arranged on the contact layer, the first electrode is an annular electrode, and the annular inner ring forms a light outlet.

Optionally, the aperture of the light outlet is larger than the apertures of the first limiting hole and the second limiting hole.

Optionally, the semiconductor device further comprises a second electrode, wherein the second electrode is arranged on the back surface of the substrate; or the bottom DBR and the front surface of the substrate form a step structure, and the second electrode is arranged on the table top of the front surface of the substrate.

Optionally, the first electrode is a P-type electrode, and the second electrode is an N-type electrode.

Alternatively, the transition layer is a P-type DBR layer in which AlGaAs material layers of high Al composition and low Al composition alternate.

Optionally, the first oxide layer and the second oxide layer are AlGaAs material layers obtained through oxidation treatment, and the content of an Al component in the AlGaAs material layers is higher than that in the DBR layer.

Optionally, the thickness of the first oxide layer ranges from 10 nm to 60nm, and the thickness of the second oxide layer ranges from 10 nm to 60nm.

Optionally, the thickness of the first oxide layer is the same as the thickness of the second oxide layer.

Optionally, the active layer includes a first cladding layer, an MQW layer and a second cladding layer from bottom to top, and the first oxide layer is disposed on a surface of the second cladding layer.

The beneficial effects of the utility model are as follows:

the double oxide layer structure reduces the capacitance and improves the working speed of the VCSEL; the first oxide layer in the double-layer oxide layer is arranged close to the active layer, the second active layer and the first active layer are separated through 3-15 pairs of transition layers of the DBR layers, so that on one hand, the double-layer oxide layer has effective current limit, and threshold current is reduced; on the other hand, the optical limitation is realized effectively, the high-order mode is reduced, and the spectrum width is reduced.

Drawings

Fig. 1 is a schematic structural diagram of a double oxide VCSEL of example 1;

FIG. 2 is a schematic diagram of the conduction band energy profile and corresponding optical field profile of a double oxide VCSEL of example 1;

fig. 3 is a schematic structural diagram of a double oxide VCSEL of example 2.

Detailed Description

The utility model is further explained below with reference to the drawings and specific embodiments. The drawings of the present utility model are merely schematic to facilitate understanding of the present utility model, and specific proportions thereof may be adjusted according to design requirements. The definition of the context of the relative elements and the front/back of the figures described herein should be understood by those skilled in the art to refer to the relative positions of the elements and thus all the elements may be reversed to represent the same elements, which are all within the scope of the present disclosure.

Example 1

Referring to fig. 1, the double oxide VCSEL of embodiment 1 includes a substrate 1, and a bottom DBR 2, an active layer 3, a first oxide layer 4, a transition layer 5, a second oxide layer 6, a top DBR 7, and a contact layer 8 sequentially provided on the substrate, a first electrode 9 is provided on the contact layer 8, and a second electrode 10 is provided on the back surface of the substrate. The second electrode 10 is an N-type electrode, the bottom DBR 2 is an N-type DBR, the top DBR 7 is a P-type DBR, the first electrode 9 is a P-type electrode, the first electrode 9 is an annular structure, and an annular inner ring thereof forms a light outlet a. The active layer 3 comprises a first cladding layer 31, a multiple quantum well MQW layer 32 and a second cladding layer 33 from bottom to top, and the first oxide layer 4 is arranged on the surface of the second cladding layer 33.

The N-type DBR is an N-type distributed Bragg reflector, the P-type DBR is a P-type distributed Bragg reflector, and AlGaAs-based DBR is adopted. The AlGaAs-based DBR described herein means a DBR comprising AlGaAs materials, and it is known that a DBR formed by alternately disposing AlGaAs of high and low Al components, or a DBR formed of AlGaAs with other materials, such as GaAs/AlGaAs DBR, alGaAs/AlAs DBR, etc., may be applied according to practical design choice. The contact layer 8 is a highly P-doped AlGaAs material to form a good ohmic contact with the first electrode 9. Known multiple quantum well stack structures, such as GaAs/AlGaAs, inGaAs/AlGaAs, may be applied to the active layer.

The first oxide layer 4 and the second oxide layer 6 are formed by partial oxidation of AlGaAs material, the oxidized portion is an oxide of Al to realize insulation, and the unoxidized portion forms a central hole for defining the range of the active region to form an injection hole through which current passes. The first oxide layer 4 has a first limiting aperture 4a and the second oxide layer 6 has a second limiting aperture 6a. The first limiting hole 4a and the second limiting hole 6a have smaller apertures than the light outlet a. The oxide layer is used for limiting current, so that the current can be concentrated and injected into the active layer through the limiting hole of the oxide layer to improve the light emitting quality.

The first oxide layer 4 and the second oxide layer 6 adopt Al with high Al content _x Ga _1-x As material, al content x is more than 0.90, more preferably x is more than 0.95, thickness ranges from 10 nm to 60nm, preferably the same thickness is adopted, the same limiting hole is easier to obtain in production, the same limiting hole has better current limiting effect, threshold current is reduced, capacitance effect is reduced, and response speed is improved. The first restriction hole 4a and the second restriction hole 6a have a pore diameter in the range of 4 to 13 μm. The first oxide layer 4 is placed close to the active layer 3, the second oxide layer 6 and the first oxide layer 4 are provided with a gap of the transition layer 5, after the device is conducted, current is limited by the second limiting hole 6a firstly, then limited by the first limiting hole 4a, and then the current is injected into the active layer 3, so that threshold current can be reduced through effective current limitation, and the active layer 3 can obtain higher internal quantum efficiency. The capacitance can be effectively reduced through the arrangement of the double oxide layers, and the working speed of the VCSEL is improved. The first restriction hole 4a and the second restriction hole 6a have the same aperture and are positively opposed in the stacking direction, and the response speed can be further increased.

The DBR layer used for the transition layer 5 is preferably arranged in the same structure as the top DBR, with the difference only in the logarithm of the reflective units. The number of pairs of reflection units of the transition layer 5 is 3 to 15, for example 5, 7, 10, 13 pairs, or a point value between the two. Each pair of reflecting units is exemplified by Al of high Al composition _0.9 Ga _0.1 As material and Al of low Al composition _0.12 Ga _0.88 As-composed DBR structure with alternating high and low refractive indexes. In the optical design, the first oxide layer 4 and the second oxide layer 6 are placed at the node position of the optical standing wave field so as to realize stronger optical confinement and inhibit a higher-order mode. Referring to fig. 2, the optical field intensity is strongest at the MQW layer 32 and becomes progressively weaker with increasing distance into the DBR structure. The transition layer 5 adopts 3-15 pairs of DBR layers, so that the two oxide layers are positioned at a better light field intensity and have proper optical confinement effect. When the two oxide layers are separated by less than 3 pairs of DBRsThe optical confinement will be too strong when placed close to the MQW layer, which will result in more higher order modes, so that the VCSEL can only operate in multimode; and when the interval between the two oxide layers is larger than 15 pairs of DBR structures, the current limiting effect is weakened, the optical limitation is insufficient, and the working speed of the device cannot be effectively improved.

The first oxide layer 4 and the second oxide layer 6 are separated by 3-15 pairs of transition layers 5 of the DBR layers, so that the capacitance is reduced, the current limit and the optical limit are increased, and the working speed can be effectively improved; also has the functions of reducing the higher order mode and the spectrum width.

Example 2

Referring to fig. 3, the double oxide VCSEL of embodiment 2 is different from embodiment 1 in that it is a structure in which electrodes are coplanar. The substrate 1, the bottom DBR 2 and the epitaxial structure above the bottom DBR 2 form a step surface by a mesa process, and the second electrode 10' is disposed on the mesa, so that the electrodes are led out from the same side. The rest of reference example 1 is not repeated.

The above embodiments are only used to further illustrate a double oxide layer VCSEL of the present utility model, but the present utility model is not limited to the embodiments, and any simple modification, equivalent variation and modification made to the above embodiments according to the technical substance of the present utility model falls within the scope of the technical solution of the present utility model.

Claims

1. A double oxide VCSEL, characterized by: the semiconductor device comprises a substrate, a bottom DBR, an active layer, a first oxide layer, a transition layer, a second oxide layer and a top DBR which are sequentially overlapped from bottom to top, wherein the first oxide layer is provided with a first limiting hole, the second oxide layer is provided with a second limiting hole, and the first limiting hole and the second limiting hole have the same aperture and correspond to each other in the overlapping direction; the transition layer is 3-15 pairs of DBR layers with alternating high and low refractive indexes.

2. The double oxide VCSEL of claim 1, wherein: the first oxide layer and the second oxide layer are positioned at the node position of the optical standing wave field.

3. The double oxide VCSEL of claim 1, wherein: the LED lamp further comprises a contact layer arranged on the top DBR, a first electrode is arranged on the contact layer, the first electrode is an annular electrode, and an annular inner ring forms a light outlet.

4. A double oxide VCSEL as claimed in claim 3, characterized in that: the aperture of the light outlet is larger than the apertures of the first limiting hole and the second limiting hole.

5. A double oxide VCSEL as claimed in claim 3, characterized in that: the second electrode is arranged on the back surface of the substrate; or the bottom DBR and the front surface of the substrate form a step structure, and the second electrode is arranged on the table top of the front surface of the substrate.

6. A double oxide VCSEL as claimed in claim 5, wherein: the first electrode is a P-type electrode, and the second electrode is an N-type electrode.

7. The double oxide VCSEL of claim 1, wherein: the transition layer is a P-type DBR layer with alternating AlGaAs material layers with high Al components and low Al components.

8. The double oxide VCSEL of claim 1, wherein: the thickness of the first oxide layer ranges from 10 nm to 60nm, and the thickness of the second oxide layer ranges from 10 nm to 60nm.

9. The double oxide VCSEL of claim 1, wherein: the thickness of the first oxide layer is the same as the thickness of the second oxide layer.

10. The double oxide VCSEL of claim 1, wherein: the active layer comprises a first cladding layer, an MQW layer and a second cladding layer from bottom to top, and the first oxide layer is arranged on the surface of the second cladding layer.