CN219979777U - Vehicle and power battery system thereof - Google Patents

Vehicle and power battery system thereof Download PDF

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Publication number
CN219979777U
CN219979777U CN202321673224.XU CN202321673224U CN219979777U CN 219979777 U CN219979777 U CN 219979777U CN 202321673224 U CN202321673224 U CN 202321673224U CN 219979777 U CN219979777 U CN 219979777U
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China
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slave control
circuit board
control circuit
signal output
sampling
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CN202321673224.XU
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王祎帆
王杨
吴茜
王心月
娄立新
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FAW Group Corp
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FAW Group Corp
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Abstract

The utility model discloses a vehicle and a power battery system thereof. The power battery system in a vehicle includes: the device comprises a main control circuit board, a plurality of battery cell groups and a plurality of slave control circuit boards; each battery cell group is arranged along the first direction and/or the second direction, and each slave control circuit board is respectively arranged at a gap between every two adjacent battery cell groups; each cell group comprises a plurality of cells and an acquisition signal output interface which is respectively and electrically connected with each cell; each slave control circuit board comprises two sampling chips, two sampling signal input interfaces, a first slave control signal receiving end, a first slave control signal output end, a second slave control signal receiving end and a second slave control signal output end; each slave control circuit board is cascaded in turn. According to the technical scheme, the slave control circuit boards are arranged in the gaps of the battery cell groups, so that the distance of a sampling line can be shortened, cross connection is avoided, the accuracy of a battery cell sampling signal is improved, and meanwhile, the overall size of a battery pack formed by the battery cell groups can be reduced.

Description

Vehicle and power battery system thereof
Technical Field
The utility model relates to the technical field of automobile batteries, in particular to a vehicle and a power battery system thereof.
Background
Currently, a battery management system in a vehicle is generally provided with a battery management chip, and the battery management chip can manage 6 to 12 battery packs at the same time, which requires complex winding, so that the battery management system has complex connection structures, for example, a plurality of connection wires exist in the battery management system, the distance between two ends of some connection wires is very long, and some connection wires are mutually intersected, so that the battery management system has communication problems such as noise interference, poor stability and the like when performing signal acquisition and processing; meanwhile, as more battery packs are managed by the battery management chip, the voltage at two ends of the battery management chip can reach more than 100V, so that the battery management chip has great potential safety hazard in the use process.
Disclosure of Invention
The utility model provides a vehicle and a power battery system thereof, which are used for shortening the distance of a sampling line, improving the precision of a sampling signal and reducing the overall size of a battery pack formed by a battery cell group.
In a first aspect, the present utility model provides a power battery system in a vehicle, comprising: the device comprises a main control circuit board, a plurality of battery cell groups and a plurality of slave control circuit boards;
each secondary control circuit board is respectively arranged at a gap between every two adjacent battery cell groups; the first direction intersects the second direction;
each cell group comprises a plurality of cells and an acquisition signal output interface which is respectively and electrically connected with each cell;
the main control circuit board comprises a main control signal output end and a main control signal receiving end;
each slave control circuit board comprises two sampling chips, two sampling signal input interfaces, a first slave control signal receiving end, a first slave control signal output end, a second slave control signal receiving end and a second slave control signal output end; in the same slave control circuit board, each signal input interface is respectively and electrically connected with each sampling chip in a one-to-one correspondence manner, and each sampling chip is also respectively and electrically connected with the first slave control signal receiving end, the first slave control signal output end, the second slave control signal receiving end and the second slave control signal output end;
each slave control circuit board is sequentially cascaded; the first slave control signal output end of the slave control circuit board of the previous stage is connected with the first slave control signal receiving end of the slave control circuit board of the next stage through daisy chain communication, and the second slave control signal output end of the slave control circuit board of the next stage is connected with the second slave control signal receiving end of the slave control circuit board of the previous stage through daisy chain communication; a first slave control signal receiving end of the slave control circuit board of a first stage is connected with the master control signal output end through daisy chain communication, a second slave control signal output end of the slave control circuit board of the first stage is connected with the master control signal receiving end through daisy chain communication, and a second slave control signal output end of the slave control circuit board of a last stage is connected with a second slave control signal receiving end of the slave control circuit board of the last stage through daisy chain communication;
and the acquisition signal output interfaces of the two adjacent cell groups are respectively and electrically connected with the sampling signal input interfaces of the slave control circuit board between the two adjacent cell groups.
Optionally, the slave control circuit board further comprises two signal acquisition circuits; the signal acquisition circuit is electrically connected between the sampling signal input interfaces of the sampling chip;
each signal acquisition circuit comprises a plurality of voltage acquisition circuits; the sampling signal input interface comprises a plurality of sampling signal input terminals; each voltage acquisition circuit is respectively and electrically connected with each sampling chip and each sampling signal input terminal in a one-to-one correspondence manner;
the acquisition signal output interface comprises a plurality of acquisition signal output terminals; and each sampling signal input terminal is respectively and electrically connected with each sampling chip and each acquisition signal output terminal in a one-to-one correspondence manner.
Optionally, the signal acquisition circuit further includes a plurality of equalization circuits;
each equalization circuit is electrically connected between the sampling chip and each sampling signal input terminal.
Optionally, the equalization circuit includes at least one equalization resistor.
Optionally, the battery cell group further comprises at least one thermistor; the acquisition signal output interface further comprises at least one temperature signal output terminal electrically connected with each thermistor in a one-to-one correspondence manner;
the sampling signal input interface also comprises at least one temperature acquisition input terminal; and each temperature acquisition input terminal is respectively and electrically connected with the sampling chip and each temperature acquisition output terminal.
Optionally, the slave control circuit board includes a first transceiver port and a second transceiver port;
the first slave control signal receiving end and the second slave control signal output end are integrated in the first receiving-transmitting port; the second slave control signal receiving end and the first slave control signal output end are integrated in the second receiving and transmitting port.
Optionally, the first receiving and transmitting ports in the adjacent two-stage slave control circuit boards are connected in a pluggable manner; in the adjacent two stages of slave control circuit boards, the second receiving and transmitting port of the slave control circuit board of the previous stage is connected with the first receiving and transmitting port of the slave control circuit board of the next stage in a pluggable manner.
Optionally, the first transceiver port, each sampling signal input interface, and the second transceiver port in the same slave control circuit board are sequentially arranged along the first direction.
Optionally, the acquisition signal output interface is connected with the sampling signal input interface in a pluggable manner.
In a second aspect, the present utility model provides a vehicle comprising at least the power cell system of the vehicle according to the first aspect.
According to the technical scheme, the slave control circuit boards are arranged in the gaps of the battery cell groups, each slave control circuit board comprises two sampling chips, each sampling chip acquires information such as electric signals of each battery cell group through each signal input interface and each acquisition signal output, each slave control circuit board sequentially transmits the sampling signals to the slave control circuit board of the last stage through daisy chain communication and then sequentially transmits the sampling signals to the slave control circuit board of the previous stage until the sampling signals are transmitted to the master control circuit board, after the master control circuit board analyzes and processes the information, control signals are transmitted to the slave control circuit boards, and the slave control circuit boards can control signals such as voltage or current of the battery cells in each battery cell group according to the control signals. Therefore, the slave control circuit boards are arranged in the gaps of the battery cell groups, so that the distance of a sampling line can be shortened, cross connection is avoided, the accuracy of a battery cell sampling signal is improved, and the overall size of a battery pack formed by the battery cell groups can be reduced; in addition, each circuit board is communicated through the daisy chain, so that the advantage of the daisy chain communication can be utilized, the communication quality among the circuit boards is improved, and the accuracy of signal transmission is improved.
Drawings
In order to more clearly illustrate the embodiments of the present utility model or the technical solutions of the prior art, a brief description will be given below of the drawings required for the embodiments or the description of the prior art, and it is obvious that although the drawings in the following description are specific embodiments of the present utility model, it is obvious to those skilled in the art that the basic concepts of the device structure, the driving method and the manufacturing method, which are disclosed and suggested according to the various embodiments of the present utility model, are extended and extended to other structures and drawings, and it is needless to say that these should be within the scope of the claims of the present utility model.
Fig. 1 is a schematic structural diagram of a power battery system in a vehicle according to an embodiment of the present utility model;
fig. 2 is a schematic structural diagram of a battery cell set according to an embodiment of the present utility model;
fig. 3 is a schematic structural diagram of a daisy chain communication structure of a master control circuit board and a slave control circuit board according to an embodiment of the present utility model;
fig. 4 is a schematic top view of another slave circuit board according to an embodiment of the present utility model;
fig. 5 is a schematic circuit diagram of a slave circuit board connected to a battery core according to an embodiment of the present utility model;
fig. 6 is a schematic structural diagram of a power battery system in another vehicle according to an embodiment of the present utility model.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present utility model more apparent, the technical solutions of the present utility model will be clearly and completely described by means of implementation examples with reference to the accompanying drawings in the embodiments of the present utility model, and it is apparent that the described embodiments are some embodiments of the present utility model, not all embodiments. All other embodiments obtained by those skilled in the art based on the basic concepts disclosed and suggested by the embodiments of the present utility model are within the scope of the present utility model.
Fig. 1 is a schematic structural diagram of a power battery system in a vehicle according to an embodiment of the present utility model, and fig. 2 is a schematic structural diagram of a battery pack according to an embodiment of the present utility model, with reference to fig. 1 and fig. 2, the power battery system in a vehicle includes: a plurality of battery cell groups 20 and a plurality of slave control circuit boards 30; each battery cell group 20 is arranged along the first direction X and/or the second direction Y, and each slave control circuit board 30 is respectively arranged at a gap between every two adjacent battery cell groups 20; the first direction X intersects the second direction Y. Each cell group 20 comprises a plurality of cells 21 and an acquisition signal output interface A which is electrically connected with each cell 21 respectively; each slave control circuit board 30 comprises two sampling signal input interfaces B; the acquisition signal output interfaces a of the adjacent two cell groups 20 are respectively electrically connected with the sampling signal input interface B of the slave control circuit board 30 between the adjacent two cell groups 20.
The cells 21 in the cell group 20 are connected in series or parallel, and may be set according to actual needs, which is not specifically limited herein. Taking the serial connection of the cells 21 in the cell group 20 as an example, the cell group 20 may further include a positive electrode aluminum bar 22, a negative electrode aluminum bar 23, and a connection aluminum bar 24, where the positive electrode aluminum bar 22 may be electrically connected with the positive electrode of the cell 21 arranged first, the negative electrode aluminum bar 23 is electrically connected with the negative electrode of the cell 21 arranged last, and the connection aluminum bar 24 is used to connect the cells 21 between the first and the last cells with each other, and the serial connection of the cells 21 is achieved through the aluminum bar. The acquisition signal output interface a is electrically connected with each aluminum bar through the acquisition wire harness 25, and can acquire the voltage, current, and other parameter information of each electric core 21, and then the parameter information of each electric core 21 is transmitted to the slave control circuit board 20 through the sampling signal input interface B. Each slave control circuit board 30 is respectively arranged at the gap between every two adjacent cell groups 20, so that the space is saved, and the two adjacent cell groups 20 are electrically connected with the slave control circuit board 30 which is arranged at the gap between the two adjacent cell groups 20, so that the sampling line distance between the sampling signal output interface A and the sampling signal input interface B can be shortened.
It is to be understood that each of the battery cell groups 20 may be arranged along the first direction X, or may be arranged along the second direction Y, or may be arranged along the first direction X and the second direction Y in an array, and the specific arrangement manner of each of the battery cells 20 may be set according to actual needs, which is not limited herein. The foregoing description has been given by taking the arrangement of the respective cell groups 20 along the first direction X as an example, and for convenience of description, the following technical solutions are described based on the arrangement of the respective cell groups 20 along the first direction X.
Fig. 3 is a schematic structural diagram of a daisy chain communication structure of a master control circuit board and a slave control circuit board according to an embodiment of the present utility model, and referring to fig. 1 to 3, each slave control circuit board 30 further includes two sampling chips 31, a first slave control signal receiving end R1, a first slave control signal output end T1, a second slave control signal receiving end R2 and a second slave control signal output end T2. In the same slave control circuit board 30, each signal input interface B is electrically connected to each sampling chip 31 in a one-to-one correspondence manner, and each sampling chip 31 is also electrically connected to the first slave control signal receiving end R1, the first slave control signal output end T1, the second slave control signal receiving end R2, and the second slave control signal output end T2, respectively. The main control circuit board 10 further includes a main control signal output terminal OUT and a main control signal receiving terminal IN. Each slave control circuit board 30 is cascaded in turn; the first slave control signal output end T1 of the slave control circuit board 30 of the previous stage is connected with the first slave control signal receiving end R1 of the slave control circuit board 30 of the next stage through daisy chain communication, and the second slave control signal output end T2 of the slave control circuit board 30 of the next stage is connected with the second slave control signal receiving end R2 of the slave control circuit board 30 of the previous stage through daisy chain communication; the first slave control signal receiving end R1 of the first slave control circuit board 30 is connected with the master control signal output end OUT through a daisy chain, the second slave control signal output end T2 of the first slave control circuit board 30 is connected with the master control signal receiving end IN through a daisy chain, and the second slave control signal output end T2 of the last slave control circuit board 30 is connected with the second slave control signal receiving end R2 of the last slave control circuit board 30 through a daisy chain.
The sampling input interface B transmits the received electrical signal to the sampling chips 31 electrically connected thereto, and each sampling chip 31 may output the received sampled signal through the first slave control signal output terminal T1 and the second slave control signal output terminal T2, or may receive the signal through the first slave control signal receiving terminal R1 and the second slave control signal receiving terminal R2, so as to control the charge and discharge states of the cells in the cell group 20 according to the received signal. In this way, the sampling signal of the single cell group 20 is acquired through the single sampling chip 31, the acquisition accuracy of the sampling signal is improved, and the cell state in the single cell group 20 is controlled through the single sampling chip 30, so that the control accuracy is improved.
For example, the battery in the vehicle may include 14 battery cell groups, each battery cell group 20 may include 8 battery cells, and since each slave control circuit board 30 includes two sampling chips 31, each sampling chip 31 may obtain an electrical signal of each battery cell in one battery cell group 20, where 7 slave control circuit boards 30 are required to perform signal acquisition and state control on each battery cell in each battery cell group 20.
It will be appreciated that the above description is given by taking the power battery system in the vehicle as an example, and the number of the slave circuit boards may be set according to the actual situation, which is not particularly limited herein.
Specifically, the master circuit board 10 outputs signals such as an instruction for acquiring a sampling signal to the first-stage slave circuit board 30 through the master signal output end OUT and the first slave signal receiving end R2, the first-stage slave circuit board 30 sequentially transmits information such as the sampling signal and the signal sampled by the first slave signal output end T1 to the next-stage slave circuit board 30, the output information of the second-stage slave signal output end T2 of the last-stage slave circuit board 30 is transmitted to the second-stage slave signal receiving end R2 of the last-stage slave circuit board 30, the last-stage slave circuit board 30 forms a self-loop, the transmitted information is transmitted to the second slave input end of the last-stage slave circuit board 30 through the second slave signal receiving end T2 of the last-stage slave circuit board 30, and is sequentially transmitted to the slave circuit board 30 of the previous-stage until the information is transmitted to the first-stage slave circuit board 30, the second slave output end T2 of the first-stage slave circuit board 30 transmits the transmission information to the master circuit board 10 through the master signal receiving end IN, and the slave circuit board 30 can process the control signals to the slave circuit board 30 according to the voltage cores, and the voltage of the slave circuit boards can be controlled by the slave circuit boards 20. The communication modes are all through daisy chain communication, the daisy chain communication has higher reliability and safety, can effectively transmit data, avoid delay, ensure that the daisy chain communication wiring distance is short, avoid cross connection and long-distance connection, and effectively reduce the influence of external environment on the daisy chain communication quality.
According to the technical scheme provided by the embodiment of the utility model, the slave control circuit boards are arranged in the gaps of the battery cell groups, each slave control circuit board comprises two sampling chips, each sampling chip acquires information such as electric signals of each battery cell group through each signal input interface and each acquisition signal output, each slave control circuit board sequentially transmits the sampling signals to the slave control circuit board of the last stage through daisy chain communication and then sequentially transmits the sampling signals to the slave control circuit board of the previous stage until the sampling signals are transmitted to the master control circuit board, after the master control circuit board analyzes and processes the information, control signals are transmitted to the slave control circuit boards, and the slave control circuit boards can control signals such as voltage or current of the battery cells in each battery cell group according to the control signals. Therefore, the slave control circuit boards are arranged in the gaps of the battery cell groups, so that the distance of a sampling line can be shortened, cross connection is avoided, the accuracy of a battery cell sampling signal is improved, and the overall size of a battery pack formed by the battery cell groups can be reduced; in addition, each circuit board is communicated through the daisy chain, so that the advantage of the daisy chain communication can be utilized, the communication quality among the circuit boards is improved, and the accuracy of signal transmission is improved.
In an alternative embodiment, fig. 4 is a schematic top view of another slave circuit board according to an embodiment of the present utility model, fig. 5 is a schematic circuit diagram of a slave circuit board connected to a battery core according to an embodiment of the present utility model, and referring to fig. 4 and fig. 5, the slave circuit board 30 further includes two signal acquisition circuits 33; the signal acquisition circuit 33 is electrically connected between the sampling chip 31 and the sampling signal input interface B; each signal acquisition circuit 33 includes a plurality of voltage acquisition circuits 331; the sampling signal input interface B includes a plurality of sampling signal input terminals (not shown in the drawing); each voltage acquisition circuit 331 is electrically connected with each sampling chip 31 and each sampling signal input terminal in a one-to-one correspondence manner; the acquisition signal output interface A comprises a plurality of acquisition signal output terminals; the sampling signal input terminals are electrically connected to the sampling chips 31 and the sampling signal output terminals in a one-to-one correspondence.
The specific connection mode of each sampling chip or each circuit in the slave control circuit board 30 may be connected through devices and signal lines inside the slave control circuit board, and the electrically connected devices and signal lines are not shown.
Specifically, the signal collecting circuit 33 is configured to collect voltage signals of each electrical core in the electrical core set 20, where the signal collecting circuit 33 may include a plurality of voltage collecting circuits 331, each voltage collecting circuit 331 may include electrical elements such as a capacitor and/or a resistor, and the specific structure of the voltage collecting circuit may be designed according to actual needs, which is not limited herein. The same signal acquisition circuit 33 includes a plurality of voltage acquisition circuits 331, each voltage acquisition circuit 331 is electrically connected with a sampling signal input terminal in a one-to-one correspondence manner, the same cell group 20 includes a plurality of cells 21, each cell 21 is electrically connected with each sampling signal output terminal of the acquisition signal output interface a in a one-to-one correspondence manner, each sampling signal input terminal is electrically connected with each sampling signal output terminal in a one-to-one correspondence manner, so that each voltage acquisition circuit 33 in the same signal acquisition circuit 33 is electrically connected with each cell 21 in the same cell group 20 in a corresponding manner, and signals such as voltage and current of each cell 21 are acquired through each voltage acquisition circuit 33.
It is understood that the number of the voltage acquisition circuits is related to the number of the battery cells in the battery cell group, and may be the same as the number of the battery cells, or may be other, and may be designed according to actual needs, which is not specifically limited herein.
Optionally, referring to fig. 4 and 5, the signal acquisition circuit 33 further includes a plurality of equalization circuits 332; each equalization circuit 332 is electrically connected between the sampling chip 31 and each sampling signal input terminal.
The electric quantity of the battery cells 21 is related to the voltages at two ends of the battery cells 21, the current electric quantity of the battery cells 21 can be determined according to the voltage values at two ends of the battery cells 21, and when the electric quantity of each battery cell 21 is different, the electric quantity of each battery cell 21 needs to be balanced, so that each battery cell 21 is ensured to keep the same state during normal use, and the condition of overcharge or overdischarge is avoided. For example, when the voltage sampling circuit 331 determines that the electric quantity of a part of the battery cells 21 is high, the equalization circuit 332 may be used to equalize signals such as the voltage of the part of the battery cells 21, so as to improve the voltage consistency of each battery cell in the battery cell group 20 and improve the use safety.
Specifically, the same signal acquisition circuit 33 includes a plurality of equalization circuits 332, each equalization circuit 332 is electrically connected to a sampling signal input terminal in a one-to-one correspondence manner, the same cell group 20 includes a plurality of cells 21, each cell 21 is electrically connected to each sampling signal output terminal of the acquisition signal output interface a in a one-to-one correspondence manner, and each sampling signal input terminal is electrically connected to each sampling signal output terminal in a one-to-one correspondence manner, so that each equalization circuit 332 in the same signal acquisition circuit 33 is electrically connected to each cell 21 in the same cell group 20 in a corresponding manner, and signals such as electric quantity of each cell 21 are equalized through each equalization circuit 332.
It can be understood that the sampling chip 31 can control the working state of the equalization circuit 332 connected to the battery cell, and the specific control manner can be designed according to actual needs, which is not limited herein. In an exemplary embodiment, the equalization circuit 332 is electrically connected to the sampling chip 31 through a MOS transistor, and the sampling chip 31 controls the on and off states of the MOS transistor, thereby controlling the operation state of the equalization circuit 332.
Optionally, with continued reference to fig. 4 and 5, the equalization circuit 332 includes at least one equalization resistor R. Therefore, after the equalization resistor R is connected with the battery core in series, the charge in the battery core can be consumed, so that the electric quantity of the battery core is reduced, and the electric quantity of the battery core is kept consistent with the electric quantity of other battery cores. Illustratively, the equalizing circuit 332 includes two equalizing resistors R1 and R2, and when the equalizing circuit 332 works, heat is generated while current flows through the equalizing resistors R1 and R2, and the two equalizing resistors R enable heat to be dispersed, so that a good heat dissipation effect is achieved.
It should be understood that the number of equalizing resistors may be designed according to practical needs, and the above description is given by taking only the equalizing circuit 332 including two equalizing resistors as an example, and the number of equalizing resistors may be other, which is not limited herein specifically.
In an alternative embodiment, fig. 6 is a schematic structural diagram of another power battery system in a vehicle according to an embodiment of the present utility model, and referring to fig. 6, the battery cell group 20 further includes at least one thermistor (not shown), and at least one temperature signal output terminal W1 electrically connected to each thermistor; the slave control circuit board 30 further includes at least one temperature acquisition input terminal W2; the temperature signal output terminal W1 is electrically connected to the temperature acquisition input terminal W2.
Wherein, the resistance value of the thermistor changes along with the change of temperature, and the thermistor comprises a positive temperature coefficient thermistor, a negative temperature coefficient thermistor and the like. The number of the thermistors can be set according to actual needs, for example, the number of the thermistors is consistent with the number of the battery cells, and the thermistors can be arranged at each battery cell; the number of the thermistors can be smaller than that of the battery cells, and the thermistors can be uniformly arranged at the battery cells at intervals.
Specifically, the temperature in the battery cell group 20 may be indirectly obtained through the resistance value of the thermistor. After the temperature signal output terminal W1 is electrically connected with the temperature acquisition input terminal W2, an electrical signal of the thermistor can be transmitted to the slave control circuit board 30, and the slave control circuit board 30 obtains a temperature signal of the battery cell group 20 according to a resistance value of the thermistor.
In an alternative embodiment, the slave circuit board 30 may further include a temperature measurement circuit, where the temperature measurement circuit includes a measurement resistor, a measurement power source, and other devices, and the measurement resistor, the thermistor, and the measurement power source are connected in series, and the resistance of the thermistor, and thus the temperature of the battery cell group 20, is determined by a current signal flowing through the series-connected circuit structures.
Optionally, the slave control circuit board may further include a power supply filter circuit, where the power supply filter circuit includes devices such as a ceramic capacitor and a transient suppression diode, and the power supply filter circuit is configured to provide a required power supply signal to the voltage acquisition circuit, the temperature measurement circuit, the equalization circuit, and the like.
Optionally, referring to fig. 1, the slave control circuit board 30 includes a first transceiving port S1 and a second transceiving port S2; the first slave control signal receiving end R1 and the second slave control signal output end T2 are integrated in the first receiving and transmitting port S1; the second slave control signal receiving terminal R2 and the first slave control signal output terminal T1 are integrated in the second transceiver port S2. In this way, when the first slave control signal output end T1 of the slave control circuit board 30 of the previous stage is electrically connected to the first slave control signal receiving end R1 of the slave control circuit board 30 of the next stage, and the second slave control signal output end T2 of the slave control circuit board 30 of the next stage is electrically connected to the second slave control signal receiving end R2 of the slave control circuit board 20 of the previous stage, only the second transceiving port S2 of the slave control circuit board 20 of the previous stage is electrically connected to the first transceiving port S1, so that the number of wires can be reduced, the steps can be simplified, and the operation is simple.
Optionally, referring to fig. 1, in the two adjacent slave control circuit boards 30, the second transceiver port S2 of the slave control circuit board 30 of the previous stage is connected to the first transceiver port S1 of the slave control circuit board 30 of the next stage in a pluggable manner. In this way, when other situations such as the need of replacing the slave control circuit board occur, the first transceiving port S1 in the slave control circuit board 30 to be replaced and the second transceiving port S2 in the slave control circuit board 30 at the previous stage thereof can be pulled out, the second transceiving port S2 in the slave control circuit board 30 to be replaced and the first transceiving port S1 in the slave control circuit board 30 at the next stage thereof can be pulled out, and the electric connection path between the slave control circuit board 30 to be replaced and other slave control circuit boards 30 is disconnected, so that the operation is convenient.
Optionally, referring to fig. 1, the first transceiver port S1, each sampling signal input interface B, and the second transceiver port S2 in the same slave circuit board 30 are sequentially arranged along the first direction X. In this way, in the first direction X, since the two battery cell groups 20 are respectively located at two sides of the slave control circuit board 30, when the acquisition signal output interface a and the sampling signal input interface B are electrically connected, the length of the wiring can be shortened, in addition, the first transceiver port S1 and the second transceiver port S2 are placed at the same side as the sampling signal input interface B, and the wiring harness electrically connected with each port or each interface can be neatly arranged at one side of the slave control circuit board 30, so that the space is saved.
Optionally, referring to fig. 1, the acquisition signal output interface a is connected to the sampling signal input interface B in a pluggable manner. Therefore, when other conditions such as battery cell group replacement or slave control circuit board replacement occur, the acquisition signal output interface A of the battery cell group and the sampling signal input interface B of the slave control circuit board can be pulled out, and the operation is convenient.
Based on the same inventive concept, the embodiment of the utility model also provides a vehicle, which at least comprises the power battery system in the vehicle provided by any embodiment of the utility model. Therefore, the vehicle has the technical characteristics and beneficial effects of the power battery system in the vehicle, which are the same as those described above, and the description thereof is omitted.
Note that the above is only a preferred embodiment of the present utility model and the technical principle applied. It will be understood by those skilled in the art that the present utility model is not limited to the particular embodiments described herein, and that various obvious changes, rearrangements, combinations, and substitutions can be made by those skilled in the art without departing from the scope of the utility model. Therefore, while the utility model has been described in connection with the above embodiments, the utility model is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the utility model, which is set forth in the following claims.

Claims (10)

1. A power battery system in a vehicle, comprising: the device comprises a main control circuit board, a plurality of battery cell groups and a plurality of slave control circuit boards;
each secondary control circuit board is respectively arranged at a gap between every two adjacent battery cell groups; the first direction intersects the second direction;
each cell group comprises a plurality of cells and an acquisition signal output interface which is respectively and electrically connected with each cell;
the main control circuit board comprises a main control signal output end and a main control signal receiving end;
each slave control circuit board comprises two sampling chips, two sampling signal input interfaces, a first slave control signal receiving end, a first slave control signal output end, a second slave control signal receiving end and a second slave control signal output end; in the same slave control circuit board, each signal input interface is respectively and electrically connected with each sampling chip in a one-to-one correspondence manner, and each sampling chip is also respectively and electrically connected with the first slave control signal receiving end, the first slave control signal output end, the second slave control signal receiving end and the second slave control signal output end;
each slave control circuit board is sequentially cascaded; the first slave control signal output end of the slave control circuit board of the previous stage is connected with the first slave control signal receiving end of the slave control circuit board of the next stage through daisy chain communication, and the second slave control signal output end of the slave control circuit board of the next stage is connected with the second slave control signal receiving end of the slave control circuit board of the previous stage through daisy chain communication; a first slave control signal receiving end of the slave control circuit board of a first stage is connected with the master control signal output end through daisy chain communication, a second slave control signal output end of the slave control circuit board of the first stage is connected with the master control signal receiving end through daisy chain communication, and a second slave control signal output end of the slave control circuit board of a last stage is connected with a second slave control signal receiving end of the slave control circuit board of the last stage through daisy chain communication;
and the acquisition signal output interfaces of the two adjacent cell groups are respectively and electrically connected with the sampling signal input interfaces of the slave control circuit board between the two adjacent cell groups.
2. The in-vehicle power cell system of claim 1, wherein the slave circuit board further comprises two signal acquisition circuits; the signal acquisition circuit is electrically connected between the sampling chip and the sampling signal input interface;
each signal acquisition circuit comprises a plurality of voltage acquisition circuits; the sampling signal input interface comprises a plurality of sampling signal input terminals; each voltage acquisition circuit is respectively and electrically connected with each sampling chip and each sampling signal input terminal in a one-to-one correspondence manner;
the acquisition signal output interface comprises a plurality of acquisition signal output terminals; and each sampling signal input terminal is respectively and electrically connected with each sampling chip and each acquisition signal output terminal in a one-to-one correspondence manner.
3. The in-vehicle power cell system of claim 2, wherein the signal acquisition circuit further comprises a plurality of equalization circuits;
each equalization circuit is electrically connected between the sampling chip and each sampling signal input terminal.
4. A power cell system in a vehicle according to claim 3, wherein said balancing circuit comprises at least one balancing resistor.
5. The in-vehicle power cell system of claim 1, wherein the battery cell stack further comprises at least one thermistor; the acquisition signal output interface further comprises at least one temperature signal output terminal electrically connected with each thermistor in a one-to-one correspondence manner;
the sampling signal input interface also comprises at least one temperature acquisition input terminal; and each temperature acquisition input terminal is respectively and electrically connected with the sampling chip and each temperature signal output terminal.
6. The in-vehicle power cell system of claim 1, wherein the slave circuit board comprises a first transceiver port and a second transceiver port;
the first slave control signal receiving end and the second slave control signal output end are integrated in the first receiving-transmitting port; the second slave control signal receiving end and the first slave control signal output end are integrated in the second receiving and transmitting port.
7. The vehicle power battery system according to claim 6, wherein the second transmitting/receiving port of the slave circuit board of the previous stage is connected to the first transmitting/receiving port of the slave circuit board of the next stage in the slave circuit boards of the adjacent two stages.
8. The in-vehicle power battery system according to claim 6, wherein the first transceiving port, each of the sampling signal input interfaces, and the second transceiving port in the same slave circuit board are arranged in order along the first direction.
9. The in-vehicle power cell system of claim 1, wherein the acquisition signal output interface is removably connected to the sampling signal input interface.
10. A vehicle comprising at least a power cell system as claimed in any one of claims 1-9.
CN202321673224.XU 2023-06-28 2023-06-28 Vehicle and power battery system thereof Active CN219979777U (en)

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Application Number Priority Date Filing Date Title
CN202321673224.XU CN219979777U (en) 2023-06-28 2023-06-28 Vehicle and power battery system thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202321673224.XU CN219979777U (en) 2023-06-28 2023-06-28 Vehicle and power battery system thereof

Publications (1)

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CN219979777U true CN219979777U (en) 2023-11-07

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