CN219917206U - Semiconductor structure and packaging system - Google Patents
Semiconductor structure and packaging system Download PDFInfo
- Publication number
- CN219917206U CN219917206U CN202321387444.6U CN202321387444U CN219917206U CN 219917206 U CN219917206 U CN 219917206U CN 202321387444 U CN202321387444 U CN 202321387444U CN 219917206 U CN219917206 U CN 219917206U
- Authority
- CN
- China
- Prior art keywords
- metal part
- metal
- metal portion
- substrate
- semiconductor structure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 58
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 11
- 229910052751 metal Inorganic materials 0.000 claims abstract description 365
- 239000002184 metal Substances 0.000 claims abstract description 365
- 239000000758 substrate Substances 0.000 claims abstract description 75
- 239000000463 material Substances 0.000 claims description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 239000010949 copper Substances 0.000 claims description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 8
- 238000005476 soldering Methods 0.000 description 7
- 238000003466 welding Methods 0.000 description 6
- 238000012795 verification Methods 0.000 description 5
- 238000012546 transfer Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000013461 design Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- XGCDBGRZEKYHNV-UHFFFAOYSA-N 1,1-bis(diphenylphosphino)methane Chemical compound C=1C=CC=CC=1P(C=1C=CC=CC=1)CP(C=1C=CC=CC=1)C1=CC=CC=C1 XGCDBGRZEKYHNV-UHFFFAOYSA-N 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000002310 reflectometry Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Abstract
The utility model provides a semiconductor structure and a packaging system. The semiconductor structure comprises a substrate, a first metal part, a second metal part and a light emitting device, wherein the first metal part is positioned on part of the surface of the substrate, the surface of the first metal part, which is far away from the substrate, is provided with a step area, the step area comprises a first step area and a second step area, and the thickness of the first metal part corresponding to the first step area is smaller than that of the first metal part corresponding to the second step area; the second metal part is positioned on one side of the first metal part far away from the substrate, and the second metal part is contacted with the first step region of the first metal part; the light emitting device is located at one side of the second metal part far away from the first metal part, and the light emitting device is in contact with the second metal part. The first metal part of the semiconductor structure is of a step structure, and the problems of poor yield loss and poor reliability caused by poor contact between the PCB bonding pad and the chip bonding pad in the prior art are solved.
Description
Technical Field
The present utility model relates to the field of semiconductors, and more particularly, to a semiconductor structure and packaging system.
Background
As Mini LED chips get smaller, the pitch of the positive and negative electrode pads is too small, thus inducing the following problems: the pads of the PCB (Printed Circuit Board ) are also becoming smaller and smaller, resulting in reduced yields; the insufficient longitude of the chip transfer causes that the chip transfer cannot be welded with a PCB bonding pad in a sufficient area; an additional underfill (underfill) is needed to strengthen the chip bond. Therefore, there is a need to solve the problems of yield loss and poor reliability caused by mismatch between the chip and the PCB pads in the prior art.
Disclosure of Invention
The utility model mainly aims to provide a semiconductor structure and a packaging system, which are used for solving the problems of poor yield loss and poor reliability caused by poor contact between a PCB bonding pad and a chip bonding pad in the prior art.
In order to achieve the above object, according to one aspect of the present utility model, there is provided a semiconductor structure including a substrate, a first metal portion, a second metal portion, and a light emitting device, wherein the first metal portion is located on a part of a surface of the substrate, a surface of the first metal portion remote from the substrate has a step region including a first step region and a second step region, and a thickness of the first metal portion corresponding to the first step region is smaller than a thickness of the first metal portion corresponding to the second step region; the second metal part is positioned on one side of the first metal part far away from the substrate, and the second metal part is in contact with the first step region of the first metal part; the light emitting device is located at a side of the second metal part away from the first metal part, and the light emitting device is in contact with the second metal part.
Further, the surface of the light emitting device, which is close to the second metal part, is a first surface, the surface of the second metal part, which is far away from the light emitting device, is a second surface, and the ratio of the area of the second surface to the area of the first surface is 17.5% -22.5%.
Further, the difference between the thickness of the first metal portion corresponding to the second step region and the thickness of the first metal portion corresponding to the first step region is in the range of 2.5 μm to 3.5 μm.
Further, the semiconductor structure further includes a third metal portion located on a part of the surface of the substrate on one side of the first metal portion, the surface of the third metal portion remote from the substrate having the step region, one side of the first step region of the first metal portion and one side of the first step region of the third metal portion being disposed opposite to each other.
Further, the semiconductor structure further includes a fourth metal portion located between the third metal portion and the light emitting device, and the fourth metal portion is in contact with the first step region of the third metal portion.
Further, a distance between the first metal portion and the third metal portion is a first distance, and a distance between the second metal portion and the fourth metal portion is a second distance, the second distance being not greater than the first distance.
Further, the semiconductor structure further includes a fifth metal portion and a sixth metal portion, the fifth metal portion being located on a part of the surface of the substrate, and the fifth metal portion being located on a side of the first metal portion away from the third metal portion, the fifth metal portion being in contact with the first metal portion; the sixth metal portion is located on a part of the surface of the substrate, and is located on a side of the third metal portion away from the first metal portion, and is in contact with the third metal portion.
Further, the width of each of the fifth metal portion and the sixth metal portion in a predetermined direction is 20 μm to 30 μm, the predetermined direction is perpendicular to the arrangement direction of the first metal portion and the third metal portion, and the predetermined direction is perpendicular to the thickness direction of the substrate.
Further, the first metal portion and the second metal portion are made of one of copper and aluminum.
According to another aspect of the present utility model, there is provided a packaging system including: any of the semiconductor structures described.
By applying the technical scheme of the utility model, the semiconductor structure comprises a substrate, a first metal part, a second metal part and a light emitting device, wherein the first metal part is positioned on part of the surface of the substrate, the surface of the first metal part far away from the substrate is provided with a step area, the step area comprises a first step area and a second step area, and the thickness of the first metal part corresponding to the first step area is smaller than that of the first metal part corresponding to the second step area; the second metal part is positioned on one side of the first metal part far away from the substrate, and the second metal part is in contact with the first step region of the first metal part; the light emitting device is located at a side of the second metal part far from the first metal part and is in contact with the second metal part. The first metal part of the semiconductor structure is of a step structure, the step structure can enable the accuracy of transferring the light-emitting device to the first metal part to be improved, good welding can be conducted on the side edge of the second metal part through soldering tin combination of different heights, the first metal part can be a PCB bonding pad, the second metal part can be a chip bonding pad, and further the problems of poor yield loss and poor reliability caused by poor contact between the PCB bonding pad and the chip bonding pad in the prior art are solved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the utility model and are incorporated in and constitute a part of this specification, illustrate embodiments of the utility model and together with the description serve to explain the utility model. In the drawings:
FIG. 1 illustrates a schematic side-view structure of a semiconductor structure in accordance with one embodiment of the present utility model;
FIG. 2 illustrates a schematic top-down structure of a semiconductor structure in accordance with one embodiment of the present utility model;
fig. 3 shows a schematic side view of a semiconductor structure according to another embodiment of the utility model;
fig. 4 shows a schematic top-down structure of a semiconductor structure according to another embodiment of the utility model.
Wherein the above figures include the following reference numerals:
101. a substrate; 201. a first metal part; 202. a second metal part; 203. a third metal part; 204. a fourth metal part; 205. a fifth metal part; 206. a sixth metal part; 301. a light emitting device.
Detailed Description
It should be noted that the following detailed description is illustrative and is intended to provide further explanation of the utility model. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this utility model belongs.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of exemplary embodiments according to the present utility model. As used herein, the singular is also intended to include the plural unless the context clearly indicates otherwise, and furthermore, it is to be understood that the terms "comprises" and/or "comprising" when used in this specification are taken to specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof.
It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present. Furthermore, in the description and in the claims, when an element is described as being "connected" to another element, the element may be "directly connected" to the other element or "connected" to the other element through a third element.
As described in the background art, the present utility model provides a semiconductor structure and a packaging system for solving the above problems, wherein the yield loss and the reliability are poor due to the poor contact between the first metal portion and the second metal portion.
According to an exemplary embodiment of the present utility model, as shown in fig. 1 and 2, there is provided a semiconductor structure including a substrate 101, a first metal portion 201, a second metal portion 202, and a light emitting device 301, wherein the first metal portion 201 is located on a part of a surface of the substrate 101, a surface of the first metal portion 201 remote from the substrate 101 has a step region, the step region includes a first step region and a second step region, and a thickness of the first metal portion 201 corresponding to the first step region is smaller than a thickness of the first metal portion 201 corresponding to the second step region; the second metal part 202 is located at a side of the first metal part 201 away from the substrate, and the second metal part 202 contacts the first step region of the first metal part 201; the light emitting device 301 is located at a side of the second metal part 202 away from the first metal part 201, and the light emitting device 301 is in contact with the second metal part 202.
The semiconductor structure comprises a substrate, a first metal part, a second metal part and a light emitting device, wherein the first metal part is positioned on part of the surface of the substrate, the surface of the first metal part, which is far away from the substrate, is provided with a step area, the step area comprises a first step area and a second step area, and the thickness of the first metal part corresponding to the first step area is smaller than that of the first metal part corresponding to the second step area; the second metal part is positioned on one side of the first metal part away from the substrate, and the second metal part is contacted with the first step region of the first metal part; the light emitting device is located on a side of the second metal part away from the first metal part and is in contact with the second metal part. The first metal part of the semiconductor structure is of a step structure, the step structure can enable the accuracy of transferring the light-emitting device to the first metal part to be improved, good welding can be conducted on the side edge of the second metal part through soldering tin combination of different heights, the first metal part can be a PCB bonding pad, the second metal part can be a chip bonding pad, and further the problems of poor yield loss and poor reliability caused by poor contact between the PCB bonding pad and the chip bonding pad in the prior art are solved.
In practical application, the substrate may be a PCB, the first metal portion may be a PCB pad, the light emitting device includes a Mini LED or a Micro LED, and of course, other devices capable of emitting light may also be used, and the second metal portion may be an LED pad.
In order to make the second metal portion and the first metal portion have a larger area for soldering during the manufacturing process of the semiconductor, in one embodiment of the present utility model, a surface of the light emitting device close to the second metal portion is a first surface, a surface of the second metal portion far from the light emitting device is a second surface, and a ratio of an area of the second surface to an area of the first surface ranges from 17.5% to 22.5%. The second metal portion and the first metal portion are soldered with a larger area, i.e., the chip pad and the PCB pad are soldered with a larger area.
In another embodiment of the present utility model, a difference between a thickness of the first metal portion corresponding to the second step region and a thickness of the first metal portion corresponding to the first step region is in a range of 2.5 μm to 3.5 μm. Through the step design of the first metal part, the second metal part is contacted with the first step region of the first metal part, that is, the second step region of the first metal part is positioned at the outer side of the second metal part, in the manufacturing process of the semiconductor structure, the precision and the accuracy of transferring the second metal part onto the first metal part can be effectively assisted, and the side edges of the chip bonding pads can be well welded through the soldering tin combination of different heights.
In order to ensure better performance of the semiconductor device, in still another embodiment of the present utility model, as shown in fig. 1 and 2, the semiconductor structure further includes a third metal portion 203, where the third metal portion 203 is located on a portion of the surface of the substrate 101 on the side of the first metal portion 201, and a surface of the third metal portion 203 remote from the substrate 101 has the step region, and one side of the first step region of the first metal portion 201 and one side of the first step region of the third metal portion 203 are disposed opposite to each other. One side of the first step region of the first metal portion and one side of the first step region of the third metal portion are disposed opposite to each other, that is, the second step regions of the first metal portion and the third metal portion are located on both sides of the first step regions of the first metal portion and the third metal portion, that is, on both sides of the first step regions, that is, on both sides of the first step region, that is, on both sides of the second step region. The third metal part may also be a PCB pad.
In still another embodiment of the present utility model, as shown in fig. 1 and 2, the semiconductor structure further includes a fourth metal portion 204, the fourth metal portion 204 is located between the third metal portion 203 and the light emitting device 301, and the fourth metal portion 204 is in contact with the first step region of the third metal portion 203. The connection area between the fourth metal part and the third metal part is larger, so that the connection between the light emitting device and the substrate is better, and the performance of the semiconductor device is better. In addition, the third metal part and the first metal part are axisymmetric, and the second metal part and the fourth metal part are axisymmetric at the middle parts of the first step areas of the first metal part and the third metal part. The fourth metal portion may also be a chip pad.
Specifically, the second metal portion and the fourth metal portion are located on a portion of the surface of the light emitting device, which is close to the substrate, and the area ratio of the surface of the second metal portion and the fourth metal portion, which is away from the light emitting device, to the surface of the light emitting device, which is close to the substrate, ranges from 35% to 45%, that is, the ratio of the sum of the surface areas of the bottoms of the two chip pads to the surface area of the bottom of the light emitting device ranges from 35% to 45%. The area of the chip after optimization is increased by more than 10% compared with that of a common chip due to the P/N fanout (namely a chip bonding pad), the reflectivity can be improved to be more than 99.8% through the DBR laminated design, the light can be reduced to be absorbed by the P/N fanout, and the light is reflected back to the light emitting surface as much as possible, so that the light emitting efficiency of the LED is maintained.
In order to further enable the second metal portion to be soldered to the first metal portion over a larger area during the fabrication of the semiconductor structure, and to maintain good package assembly even when errors occur in the chip transfer process, in another embodiment of the present utility model, the distance between the first metal portion and the third metal portion is a first distance, and the distance between the second metal portion and the fourth metal portion is a second distance, and the second distance is not greater than the first distance.
In practical application, the etching mode of the first metal portions makes the distance between the first metal portions larger, and the distance between the second metal portions smaller, so that the second metal portions and the first metal portions can be welded in a larger area, and the second distance is not larger than the first distance. Specifically, the second distance is not greater than the first distance, and the difference between the first distance and the second distance is not greater than 15 μm, so that the obtained welding yield is better.
In yet another embodiment of the present utility model, as shown in fig. 3 and 4, the semiconductor structure further includes a fifth metal portion 205 and a sixth metal portion 206, wherein the fifth metal portion 205 is located on a part of the surface of the substrate 101, and the fifth metal portion 205 is located on a side of the first metal portion 201 away from the third metal portion 203, and the fifth metal portion 205 is in contact with the first metal portion 201; the sixth metal portion 206 is located on a part of the surface of the substrate 101, the sixth metal portion 206 is located on a side of the third metal portion 203 away from the first metal portion 201, and the sixth metal portion 206 is in contact with the third metal portion 203. The fifth metal part and the sixth metal part enable the PCB to be in a bar-shaped circuit, the tin material flows along the PCB circuit in the heating process, and the bar-shaped circuit can control the tin material on the PCB bonding pad area.
In order to further control the solder on the PCB pad region, in still another embodiment of the present utility model, the width of each of the fifth metal portion and the sixth metal portion in a predetermined direction is 20 μm to 30 μm, the predetermined direction is perpendicular to the arrangement direction of the first metal portion and the third metal portion, and the predetermined direction is perpendicular to the thickness direction of the substrate.
In practical application, the light emitting device may be a chip, the second metal portion and the fourth metal portion form a chip pad, the total area of the second metal portion and the fourth metal portion is the total area of the pad, the second distance is the chip pad distance, the first metal portion and the third metal portion form a PCB pad, as shown in table 1, the reject ratio of the a-quantity product is about 50dppm to 100dppm, the a-proof product 1, the chip pad distance is adjusted to be smaller than the PCB pad distance, the chip pad distance is 3 μm smaller than the PCB pad distance, the chip pad-to-chip area ratio is increased from 29.19% to 38.39%, the reject ratio is reduced to 30dppm to 50dppm, the a-proof product 2 further reduces the chip pad distance, the chip pad distance is 10 μm smaller than the PCB pad distance, the chip pad-to-chip area ratio is increased to 41.25%, and the reject ratio of the a-proof product 2 can be controlled within <20 dppm. And the original chip transfer yield of the B-quantity product is about 99.995%, the B-verification product 1 adjusts the chip pad distance to be smaller than the PCB pad distance by 25 mu m to be smaller than the PCB pad distance by 15 mu m, the chip pad-to-chip area ratio is increased from 32.38% to 35.52%, and the yield of the B-verification product 1 is increased to more than 99.9993%. Therefore, the product yield and reliability can be effectively improved by improving the area of the chip bonding pad and optimizing the distance between the chip and the PCB.
TABLE 1
| Product(s) | A quantity of product | A verification product 1 | A verification product 2 | B amount of product | B verification product 1 |
| Chip area (μm) 2 ) | 13616 | 13616 | 10920 | 20756.25 | 17340 |
| Chip bonding pad distance (μm) | 40 | 37 | 30 | 50 | 50 |
| Total area of chip bonding pads (μm) 2 ) | 3975 | 5227.5 | 4505 | 6720 | 6160 |
| Chip pad to chip area ratio | 29.19％ | 38.39％ | 41.25％ | 32.38％ | 35.52％ |
| PCB pad distance (mum) | 40 | 40 | 40 | 75 | 65 |
In another embodiment of the present utility model, the material of the first metal portion and the second metal portion is one of copper and aluminum.
Of course, the material of the first metal portion and the second metal portion may be other metal conductive materials.
In order to further ensure that the performance of the semiconductor device is better, according to another embodiment of the present utility model, the material of the substrate is resin, and the color of the substrate is black. The substrate is made of resin, the color of the substrate is black, the substrate is led out only through the first metal part and the third metal part, and after the semiconductor device is formed, the first metal part and the third metal part are both positioned on the substrate, the second metal part is contacted with the first metal part, the fourth metal part is contacted with the second metal part, the contact surface of the substrate and the light emitting device is ensured, the substrate which is black except the light emitting device is avoided, the blackness and uniformity of the semiconductor device are ensured, and the better performance of the semiconductor device is further ensured.
Specifically, the substrate is black epoxy resin, and of course, other materials with the same performance may be selected.
According to another aspect of the present utility model, there is provided a packaging system including: any of the semiconductor structures described above.
The packaging system comprises any one of the semiconductor structures, and the semiconductor structure comprises a substrate, a first metal part, a second metal part and a light emitting device, wherein the first metal part is positioned on part of the surface of the substrate, the surface of the first metal part, which is far away from the substrate, is provided with a step area, the step area comprises a first step area and a second step area, and the thickness of the first metal part corresponding to the first step area is smaller than that of the first metal part corresponding to the second step area; the second metal part is positioned on one side of the first metal part away from the substrate, and the second metal part is contacted with the first step region of the first metal part; the light emitting device is located on a side of the second metal part away from the first metal part and is in contact with the second metal part. The first metal part of the semiconductor structure is of a step structure, the step structure can enable the accuracy of transferring the light-emitting device to the first metal part to be improved, good welding can be conducted on the side edge of the second metal part through soldering tin combination of different heights, the first metal part can be a PCB bonding pad, the second metal part can be a chip bonding pad, and further the problems of poor yield loss and poor reliability caused by poor contact between the PCB bonding pad and the chip bonding pad in the prior art are solved.
In order to enable those skilled in the art to more clearly understand the technical scheme of the present utility model, the technical scheme of the present utility model will be described in detail with reference to specific embodiments.
Examples
This embodiment provides a semiconductor structure, as shown in fig. 3 and 4, including a substrate 101, a first metal portion 201, a second metal portion 202, a third metal portion 203, a fourth metal portion 204, a fifth metal portion 205, a sixth metal portion 206, and a light emitting device 301, where the first metal portion 201 is located on a part of a surface of the substrate 101, a surface of the first metal portion 201 away from the substrate 101 has a step region, the step region includes a first step region and a second step region, a thickness of the first metal portion 201 corresponding to the first step region is smaller than a thickness of the first metal portion 201 corresponding to the second step region, and a difference between the thickness of the first metal portion corresponding to the second step region and the thickness of the first metal portion corresponding to the first step region is 2.5 μm to 3.5 μm; the second metal part 202 is located at a side of the first metal part 201 away from the substrate, and the second metal part 202 contacts the first step region of the first metal part 201; the third metal part 203 is positioned on the surface of the substrate 101 on the side of the first metal part 201, the surface of the third metal part 203 away from the substrate 101 has the step region, and one side of the first step region of the first metal part 201 and one side of the first step region of the third metal part 203 are arranged opposite to each other; the fourth metal part 204 is located between the third metal part 203 and the light emitting device 301, and the fourth metal part 204 is in contact with the first step region of the third metal part 203; the area ratio of the surface of the second metal part and the fourth metal part far away from the light emitting device to the surface of the light emitting device close to the substrate ranges from 35% to 45%; the distance between the first metal part and the third metal part is a first distance, the distance between the second metal part and the fourth metal part is a second distance, the second distance is not greater than the first distance, and the difference between the first distance and the second distance is not greater than 15 μm; the fifth metal part 205 is located on a part of the surface of the substrate 101, the fifth metal part 205 is located on a side of the first metal part 201 away from the third metal part 203, and the fifth metal part 205 is in contact with the first metal part 201; the sixth metal portion 206 is located on a part of the surface of the substrate 101, the sixth metal portion 206 is located on a side of the third metal portion 203 away from the first metal portion 201, and the sixth metal portion 206 is in contact with the third metal portion 203; the width of the fifth metal part and the width of the sixth metal part in the preset direction are 20-30 μm; the light emitting device 301 is located on a side of the second metal part 202 away from the first metal part 201, and is in contact with the second metal part 202 and the fourth metal part 204.
From the above description, it can be seen that the above embodiments of the present utility model achieve the following technical effects:
1) The semiconductor structure comprises a substrate, a first metal part, a second metal part and a light emitting device, wherein the first metal part is positioned on part of the surface of the substrate, the surface of the first metal part, which is far away from the substrate, is provided with a step area, the step area comprises a first step area and a second step area, and the thickness of the first metal part corresponding to the first step area is smaller than that of the first metal part corresponding to the second step area; the second metal part is positioned on one side of the first metal part away from the substrate, and the second metal part is contacted with the first step region of the first metal part; the light emitting device is located on a side of the second metal part away from the first metal part and is in contact with the second metal part. The first metal part of the semiconductor structure is of a step structure, the step structure can enable the accuracy of transferring the light-emitting device to the first metal part to be improved, good welding can be conducted on the side edge of the second metal part through soldering tin combination of different heights, the first metal part can be a PCB bonding pad, the second metal part can be a chip bonding pad, and further the problems of poor yield loss and poor reliability caused by poor contact between the PCB bonding pad and the chip bonding pad in the prior art are solved.
2) The packaging system of the utility model comprises any one of the semiconductor structures, and the semiconductor structure comprises a substrate, a first metal part, a second metal part and a light emitting device, wherein the first metal part is positioned on part of the surface of the substrate, the surface of the first metal part, which is far away from the substrate, is provided with a step area, the step area comprises a first step area and a second step area, and the thickness of the first metal part corresponding to the first step area is smaller than that of the first metal part corresponding to the second step area; the second metal part is positioned on one side of the first metal part away from the substrate, and the second metal part is contacted with the first step region of the first metal part; the light emitting device is located on a side of the second metal part away from the first metal part and is in contact with the second metal part. The first metal part of the semiconductor structure is of a step structure, the step structure can enable the accuracy of transferring the light-emitting device to the first metal part to be improved, good welding can be conducted on the side edge of the second metal part through soldering tin combination of different heights, the first metal part can be a PCB bonding pad, the second metal part can be a chip bonding pad, and further the problems of poor yield loss and poor reliability caused by poor contact between the PCB bonding pad and the chip bonding pad in the prior art are solved.
The above description is only of the preferred embodiments of the present utility model and is not intended to limit the present utility model, but various modifications and variations can be made to the present utility model by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present utility model should be included in the protection scope of the present utility model.
Claims (10)
1. A semiconductor structure, comprising:
a substrate;
the first metal part is positioned on part of the surface of the substrate, the surface of the first metal part, which is far away from the substrate, is provided with a step area, the step area comprises a first step area and a second step area, and the thickness of the first metal part corresponding to the first step area is smaller than that of the first metal part corresponding to the second step area;
a second metal portion located at a side of the first metal portion away from the substrate, and in contact with the first step region of the first metal portion;
and the light emitting device is positioned on one side of the second metal part far away from the first metal part, and is contacted with the second metal part.
2. The semiconductor structure of claim 1, wherein a surface of the light emitting device proximate to the second metal portion is a first surface, a surface of the second metal portion distal from the light emitting device is a second surface, and a ratio of an area of the second surface to an area of the first surface ranges from 17.5% to 22.5%.
3. The semiconductor structure of claim 1, wherein a difference between a thickness of the first metal portion corresponding to the second step region and a thickness of the first metal portion corresponding to the first step region is in a range of 2.5 μm to 3.5 μm.
4. The semiconductor structure of claim 1, wherein the semiconductor structure further comprises:
and a third metal part positioned on a part of the surface of the substrate at one side of the first metal part, wherein the surface of the third metal part far away from the substrate is provided with the step area, and one side of the first step area of the first metal part and one side of the first step area of the third metal part are oppositely arranged.
5. The semiconductor structure of claim 4, wherein the semiconductor structure further comprises:
a fourth metal part located between the third metal part and the light emitting device, and the fourth metal part is in contact with the first step region of the third metal part.
6. The semiconductor structure of claim 5, wherein a distance between the first metal portion and the third metal portion is a first distance, and a distance between the second metal portion and the fourth metal portion is a second distance, the second distance being no greater than the first distance.
7. The semiconductor structure of claim 5, wherein the semiconductor structure further comprises:
a fifth metal part located on a part of the surface of the substrate, the fifth metal part being located on a side of the first metal part away from the third metal part, the fifth metal part being in contact with the first metal part;
and a sixth metal part on a part of the surface of the substrate, the sixth metal part being located on a side of the third metal part away from the first metal part, the sixth metal part being in contact with the third metal part.
8. The semiconductor structure according to claim 7, wherein a width of each of the fifth metal portion and the sixth metal portion in a predetermined direction is in a range of 20 μm to 30 μm, the predetermined direction is perpendicular to an arrangement direction of the first metal portion and the third metal portion, and the predetermined direction is perpendicular to a thickness direction of the substrate.
9. The semiconductor structure of any one of claims 1-8, wherein the material of the first metal portion and the second metal portion is one of copper and aluminum.
10. A packaging system, comprising: the semiconductor structure of any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321387444.6U CN219917206U (en) | 2023-05-31 | 2023-05-31 | Semiconductor structure and packaging system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321387444.6U CN219917206U (en) | 2023-05-31 | 2023-05-31 | Semiconductor structure and packaging system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN219917206U true CN219917206U (en) | 2023-10-27 |
Family
ID=88431736
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202321387444.6U Active CN219917206U (en) | 2023-05-31 | 2023-05-31 | Semiconductor structure and packaging system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN219917206U (en) |
-
2023
- 2023-05-31 CN CN202321387444.6U patent/CN219917206U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI462256B (en) | Chip package structure | |
| US20070001297A1 (en) | Circuit substrate | |
| US11289415B2 (en) | Semiconductor device including semiconductor chip having elongated bumps | |
| US11156351B2 (en) | Backlight module and method of manufacturing same | |
| TWI514635B (en) | Led light bar and manufacturing method of the same | |
| US8076771B2 (en) | Semiconductor device having metal cap divided by slit | |
| JP2019161174A (en) | Semiconductor device and method for manufacturing semiconductor device | |
| US20180308817A1 (en) | Manufacturing method of semiconductor structure | |
| CN217444385U (en) | Chip packaging structure | |
| TW201322396A (en) | Lead frame and chip flipping packaging device applying lead frame | |
| KR20050033111A (en) | Tape circuit substrate and semiconductor chip package using thereof | |
| JP2011009372A (en) | Semiconductor device and method of fabricating the same | |
| TWI452659B (en) | Circuit board, fabricating method thereof and package structure | |
| KR102348352B1 (en) | Light-emitting device | |
| CN219917206U (en) | Semiconductor structure and packaging system | |
| CN100550362C (en) | Circuit of a kind of crystal wafer chip dimension encapsulation and preparation method thereof | |
| CN111524873B (en) | Embedded packaging module and packaging method thereof | |
| TWI384591B (en) | Circuit board for led | |
| CN109935556B (en) | Light emitting diode packaging structure, heat dissipation substrate and manufacturing method of heat dissipation substrate | |
| TWI634823B (en) | Electronic device | |
| CN207909913U (en) | A kind of encapsulating structure of LED component | |
| US20160254241A1 (en) | Printed circuit board and soldering method | |
| CN113629028A (en) | Heat dissipation cover plate and chip | |
| US8283779B2 (en) | Peel-resistant semiconductor device with improved connector density, and method of manufacturing the same | |
| US20230197666A1 (en) | Chip packaging structure and method for preparing the same, and method for packaging semiconductor structure |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |