CN219875470U - Voltage equalizing system - Google Patents

Voltage equalizing system Download PDF

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Publication number
CN219875470U
CN219875470U CN202321368391.3U CN202321368391U CN219875470U CN 219875470 U CN219875470 U CN 219875470U CN 202321368391 U CN202321368391 U CN 202321368391U CN 219875470 U CN219875470 U CN 219875470U
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switching tube
circuit
voltage
llc
switching
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CN202321368391.3U
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Chinese (zh)
Inventor
刘美堂
马超
李海锋
张素丽
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Shandong Longertek Technology Co Ltd
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Shandong Longertek Technology Co Ltd
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Abstract

The utility model provides a voltage equalizing system, which comprises an input side and an output side, wherein the input side comprises a first input capacitor and a second input capacitor which are connected in series; the output side comprises a load resistor and a load switching power tube which are connected in series, a branch circuit where the load resistor and the load switching power tube are located is connected with two ends of an output capacitor, secondary sides of a first transformer and a second transformer are connected with a rectifying circuit, and the rectifying circuit is connected with two ends of the output capacitor. When the voltage equalizing system is in idle load, if the voltage difference between the first input capacitor and the second input capacitor is larger than a set difference value, the load switching power tube is conducted, the output voltage is consumed through the load resistor, the excessive accumulation of the output voltage is avoided, gains are adjusted through adjusting the on-off frequency of the upper bridge arm and the lower bridge arm of the first LLC switch circuit and the second LLC switch circuit, and voltage equalizing is further achieved.

Description

Voltage equalizing system
Technical Field
The utility model relates to the technical field of power supplies, in particular to a voltage equalizing system.
Background
With the rapid development of high-frequency power electronics in recent years, high-frequency conversion technology is adopted in more and more high-voltage application occasions. LLC converters are widely used in various occasions due to the characteristics of simple topological structure, high efficiency and the like. When LLC converters are used in a high voltage application in a multi-stage series, the parameters of the actual lines or components may not be completely identical, which may cause the voltages across the power transistors of each converter to be different, which may affect the safe operation of the converter.
The present utility model has been made in view of this.
Disclosure of Invention
The utility model aims to solve the technical problem of overcoming the defects in the prior art, and provides a voltage equalizing system, wherein when the system is in no-load state, if the voltage difference between a first input capacitor and a second input capacitor is larger than a set difference value, a load switching power tube is conducted, the output voltage is consumed through a load resistor, the output voltage is prevented from being accumulated too high, and gains are adjusted by adjusting the on-off frequency of an upper bridge arm and a lower bridge arm of a first LLC switch circuit and a second LLC switch circuit, so that voltage equalizing is realized.
In order to solve the technical problems, the utility model adopts the basic conception of the technical scheme that:
a pressure equalizing system comprises an input side and an output side,
the input side comprises a first input capacitor and a second input capacitor which are connected in series, two ends of the first input capacitor and the second input capacitor are respectively connected with a first LLC switch circuit and a second LLC switch circuit, the first LLC switch circuit is connected with the primary side of the first transformer, and the second LLC switch circuit is connected with the primary side of the second transformer;
the output side comprises a load resistor and a load switching power tube which are connected in series, a branch circuit where the load resistor and the load switching power tube are located is connected with two ends of an output capacitor, secondary sides of the first transformer and the second transformer are connected with a rectifying circuit, and the rectifying circuit is connected with two ends of the output capacitor.
Further, two ends of the first input capacitor and the second input capacitor are respectively connected with the first voltage sampling circuit and the second voltage sampling circuit, output ends of the first voltage sampling circuit and the second voltage sampling circuit are connected with the single chip microcomputer control circuit, and the single chip microcomputer control circuit is used for controlling the on or off of the load switching power tube.
Further, the parameters of the first transformer and the second transformer are the same, and the parameters comprise primary side turns, secondary side turns, inductance and leakage inductance values.
Further, the topology structures of the first LLC switching circuit and the second LLC switching circuit are the same.
Further, the first LLC switching circuit comprises a first full-bridge circuit and a first resonant network;
the first full-bridge circuit comprises a first switching tube, a second switching tube, a third switching tube and a fourth switching tube which are respectively connected in series, wherein the first switching tube and the third switching tube are communicated through a first resonant network.
Further, the first resonant network comprises a first resonant inductor, a first exciting inductor and a first resonant capacitor which are connected in series, and the primary side of the first transformer is connected with the first exciting inductor in parallel.
Further, the second LLC switching circuit comprises a second full bridge circuit and a second resonant network;
the second full-bridge circuit comprises a fifth switching tube, a sixth switching tube, a seventh switching tube and an eighth switching tube which are respectively connected in series, wherein the fifth switching tube and the seventh switching tube are communicated through a second resonance network.
Further, the second resonant network comprises a second resonant inductor, a second excitation inductor and a second resonant capacitor which are connected in series, and the primary side of the second transformer is connected with the second excitation inductor in parallel.
Further, the first switching tube, the third switching tube, the fifth switching tube and the seventh switching tube are simultaneously turned on or turned off;
the second switching tube, the fourth switching tube, the sixth switching tube and the eighth switching tube are simultaneously turned on or turned off.
After the technical scheme is adopted, compared with the prior art, the utility model has the following beneficial effects:
when the voltage equalizing system is in idle load, if the voltage difference between the first input capacitor and the second input capacitor is larger than a set difference value, the load switching power tube is conducted, the output voltage is consumed through the load resistor, the excessive accumulation of the output voltage is avoided, gains are adjusted through adjusting the on-off frequency of the upper bridge arm and the lower bridge arm of the first LLC switch circuit and the second LLC switch circuit, and voltage equalizing is further achieved.
The following describes the embodiments of the present utility model in further detail with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are included to provide a further understanding of the utility model and are incorporated in and constitute a part of this specification, illustrate embodiments of the utility model and together with the description serve to explain the utility model. It is evident that the drawings in the following description are only examples, from which other drawings can be obtained by a person skilled in the art without the inventive effort. In the drawings:
FIG. 1 is a schematic diagram of a pressure equalization system of the present utility model;
FIG. 2 is a topology block diagram of a first LLC switching circuit and a second LLC switching circuit of the present utility model;
FIG. 3 is a control relationship diagram of the pressure equalizing system of the present utility model.
The main elements in the figure are as follows: 1. a first input capacitance; 2. a second input capacitance; 3. a first LLC switching circuit; 301. a first switching tube; 302. a second switching tube; 303. a third switching tube; 304. a fourth switching tube; 305. a first resonant inductor; 306. a first excitation inductance; 307. a first resonant capacitor; 4. a second LLC switching circuit; 401. a fifth switching tube; 402. a sixth switching tube; 403. a seventh switching tube; 404. an eighth switching tube; 405. a second resonant inductor; 406. a second excitation inductance; 407. a second resonance capacitor; 5. a first transformer; 6. a second transformer; 7. a rectifying circuit; 8. an output capacitance; 9. a load resistor; 10. a load switching power tube; 11. a first voltage sampling circuit; 12. a second voltage sampling circuit; 13. and a singlechip control circuit.
It should be noted that the drawings and the written description are not intended to limit the scope of the inventive concept in any way, but to illustrate the inventive concept to those skilled in the art by referring to the specific embodiments.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present utility model more apparent, the technical solutions in the embodiments will be clearly and completely described with reference to the accompanying drawings in the embodiments of the present utility model, and the following embodiments are used to illustrate the present utility model, but are not intended to limit the scope of the present utility model.
In the description of the present utility model, it should be noted that the directions or positional relationships indicated by the terms "upper", "lower", "front", "rear", "left", "right", "vertical", "inner", "outer", etc. are based on the directions or positional relationships shown in the drawings, are merely for convenience of describing the present utility model and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present utility model.
In the description of the present utility model, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium. The specific meaning of the above terms in the present utility model will be understood in specific cases by those of ordinary skill in the art.
Along with the rapid development of high-frequency power electronic technology in the prior art, more and more high-voltage application occasions adopt LLC converters to carry out high-frequency conversion, but when the LLC converters are connected in series in multiple stages, the voltage on each LLC converter power tube can be different due to the fact that parameters of actual circuits or components cannot be completely consistent, and the situation can influence the working performance of the LLC converters, so that voltage equalization is needed.
As shown in fig. 1-3, the utility model provides a voltage equalizing system, which comprises an input side and an output side, wherein the input side comprises a first input capacitor 1 and a second input capacitor 2 which are connected in series, two ends of the first input capacitor 1 and the second input capacitor 2 are respectively connected with a first LLC switch circuit 3 and a second LLC switch circuit 4, the first LLC switch circuit 3 is connected with the primary side of a first transformer 5, and the second LLC switch circuit 4 is connected with the primary side of a second transformer 6.
The secondary sides of the first transformer 5 and the second transformer 6 are connected with a rectifying circuit 7, the rectifying circuit 7 is used for converting alternating current into direct current, and the rectifying circuit 7 is connected with two ends of an output capacitor 8.
The output side of the voltage equalizing system also comprises a load resistor 9 and a load switching power tube 10 which are connected in series, and a branch where the load resistor 9 and the load switching power tube 10 are positioned is connected with two ends of the output capacitor 8.
When the voltage equalizing system is in idle load, if the voltage difference between the first input capacitor 1 and the second input capacitor 2 is larger than the set difference value, the load switching power tube 10 is turned on, at the moment, the load resistor 9 can consume output voltage, the reliability of the voltage equalizing system is prevented from being influenced by excessive accumulation of the output voltage, and gains of the first LLC switch circuit 3 and the second LLC switch circuit 4 are adjusted by changing the on-off frequency of an upper bridge arm and a lower bridge arm of the first LLC switch circuit 3 and the second LLC switch circuit 4, so that voltage equalizing is realized.
The two ends of the first input capacitor 1 and the second input capacitor 2 are respectively connected with a first voltage sampling circuit 11 and a second voltage sampling circuit 12, the output ends of the first voltage sampling circuit 11 and the second voltage sampling circuit 12 are connected with a single chip microcomputer control circuit 13, and the single chip microcomputer control circuit 13 is used for controlling the on or off of the load switching power tube 10.
The single chip microcomputer control circuit 13 provides PWM driving signals for driving the first LLC switch circuit 3 and the second LLC switch circuit 4, wherein the PWM driving signals include a first PWM driving signal for driving an upper bridge arm of the first LLC switch circuit 3 and an upper bridge arm of the second LLC switch circuit 4, and a second PWM driving signal for driving a lower bridge arm of the first LLC switch circuit 3 and a lower bridge arm of the second LLC switch circuit 4.
According to the utility model, the frequency adjustment gain of PWM driving signals for driving the first LLC switching circuit 3 and the second LLC switching circuit 4 is adjusted through the singlechip control circuit 13, so that voltage sharing is realized, and the gains of the first LLC switching circuit 3 and the second LLC switching circuit 4 are reduced along with the increase of frequency.
Further, in the present utility model, the duty ratio of the first PWM driving signal and the second PWM driving signal is 50%, and the first PWM driving signal and the second PWM driving signal are complementary. Specifically, when the first PWM driving signal is at a high level, the second PWM driving signal is at a low level, and at this time, the upper bridge arms of the first LLC switch circuit 3 and the second LLC switch circuit 4 are turned on, and the lower bridge arm is turned off; when the first PWM driving signal is at a low level, the second PWM driving signal is at a high level, and at this time, the upper arm of the first LLC switch circuit 3 and the second LLC switch circuit 4 is turned off, and the lower arm is turned on. Therefore, the frequency of the PWM driving signal in the present utility model is the same as the on and off frequencies of the upper arm and the lower arm of the first LLC switch circuit 3 and the second LLC switch circuit 4.
In order to realize voltage equalizing, the parameters of the first transformer 5 and the second transformer 6 are the same, and the parameters comprise primary winding number, secondary winding number, inductance and leakage inductance.
The topology of the first LLC switch circuit 3 and the second LLC switch circuit 4 is identical.
As shown in fig. 2, in one embodiment of the present utility model, the first LLC switching circuit 3 includes a first full-bridge circuit and a first resonant network, the first full-bridge circuit including a first switching tube 301, a second switching tube 302, and a third switching tube 303 and a fourth switching tube 304 connected in series, respectively, the first switching tube 301 and the third switching tube 303, and the second switching tube 302 and the fourth switching tube 304 being connected by the first resonant network. Compared with the second switching tube 302 and the fourth switching tube 304 which are turned on, the directions of currents in the circuits when the first switching tube 301 and the third switching tube 303 are turned on are opposite, so that the direct current on the first input capacitor 1 is converted into alternating current.
The first resonant network includes a first resonant inductor 305, a first excitation inductor 306 and a first resonant capacitor 307 connected in series, and the primary side of the first transformer 5 is connected in parallel with the first excitation inductor 306, and the secondary side thereof is connected with the rectifying circuit 7.
The second LLC switching circuit 4 includes a second full-bridge circuit and a second resonant network, the second full-bridge circuit includes a fifth switching tube 401, a sixth switching tube 402, a seventh switching tube 403, and an eighth switching tube 404 connected in series, respectively, wherein the fifth switching tube 401 and the seventh switching tube 403, the sixth switching tube 402 and the eighth switching tube 404 are all connected through the second resonant network, and compared with when the sixth switching tube 402 and the eighth switching tube 404 are turned on, the current directions in the circuits when the fifth switching tube 401 and the seventh switching tube 403 are turned on are opposite, so as to convert the dc of the second input capacitor 2 into ac.
The second resonant network includes a second resonant inductor 405, a second exciting inductor 406 and a second resonant capacitor 407 connected in series, and the primary side of the second transformer 6 is connected in parallel with the second exciting inductor 406, and the secondary side thereof is connected with the rectifying circuit 7.
The upper bridge arm of the first LLC switch circuit 3 and the upper bridge arm of the second LLC switch circuit 4 are turned on or off simultaneously, specifically, the first switch tube 301, the third switch tube 303, the fifth switch tube 401, and the seventh switch tube 403 are turned on or off simultaneously.
The lower bridge arm of the first LLC switch circuit 3 and the lower bridge arm of the second LLC switch circuit 4 are turned on or off simultaneously, specifically, the second switch tube 302, the fourth switch tube 304, the sixth switch tube 402, and the eighth switch tube 404 are turned on or off simultaneously.
The working flow of the pressure equalizing system of the utility model is as follows:
the first voltage sampling circuit 11 collects the voltage of the first input capacitor 1 and feeds back the voltage to the single chip microcomputer control circuit 13, the second voltage sampling circuit 12 collects the voltage of the second input capacitor 2 and feeds back the voltage to the single chip microcomputer control circuit 13, and the single chip microcomputer control circuit 13 provides PWM driving signals for driving the first LLC switch circuit 3 and the second LLC switch circuit 4 according to the voltage difference between the first input capacitor 1 and the second input capacitor 2.
Specifically, when the voltage equalizing system runs in a load mode, the singlechip control circuit 13 controls the load switching power tube 10 to be turned off, the influence of the load resistor 9 on the working efficiency of the system is avoided, when the singlechip control circuit 13 judges that the voltage difference between the first input capacitor 1 and the second input capacitor 2 is larger than a set difference value, the frequency of the PWM driving signal is reduced until the voltage difference is smaller than or equal to the set difference value, and the singlechip control circuit 13 keeps the frequency of the current PWM driving signal.
When the system is idle, the output voltage of the system gradually accumulates as no load consumes the energy output by the system. In order to avoid the excessive accumulation of the output voltage, when the voltage equalizing system is in idle load, the voltage equalizing system is in an intermittent mode, namely, when the output voltage reaches a first set value, the singlechip control circuit 13 turns off the PWM driving signal; when the output voltage drops to the second set value, the single-chip microcomputer control circuit 13 controls the PWM driving signal to be turned on, preferably, the PWM driving signal is turned on at the maximum frequency each time.
When the single-chip microcomputer control circuit 13 judges that the voltage difference between the first input capacitor 1 and the second input capacitor 2 is larger than the set difference value, if the PWM driving signal is started, the single-chip microcomputer control circuit 13 reduces the frequency of the current PWM driving signal until the voltage difference is smaller than or equal to the set difference value, and the frequency of the current PWM driving signal is kept;
if the PWM driving signal is not started, the singlechip control circuit 13 controls the on-state of the load switching power tube 10, provides a load on the output side of the voltage equalizing system through the load resistor 9, consumes the output voltage of the system, and avoids the influence of the accumulation of the output voltage on the reliability of the system; on the other hand, the single chip microcomputer control circuit 13 starts the PWM driving signal and reduces the frequency thereof, and the voltage difference between the first input capacitor 1 and the second input capacitor 2 is reduced by increasing the gain of the first LLC switch circuit 3 and the second LLC switch circuit 4 until the voltage difference is smaller than or equal to the set difference value, and at the moment, the single chip microcomputer control circuit 13 keeps the frequency of the current PWM driving signal.
When the output voltage is accumulated to the first set value, the singlechip control circuit 13 controls the PWM driving signal to be closed, so that the reliability of the voltage equalizing system is ensured.
The foregoing description is only a preferred embodiment of the present utility model, and the present utility model is not limited to the above-mentioned embodiment, but is not limited to the above-mentioned embodiment, and any simple modification, equivalent change and modification made by the technical matter of the present utility model can be further combined or replaced by equivalent embodiments within the scope of the technical proposal of the present utility model without departing from the scope of the technical proposal of the present utility model.

Claims (9)

1. A pressure equalizing system is characterized by comprising an input side and an output side,
the input side comprises a first input capacitor and a second input capacitor which are connected in series, two ends of the first input capacitor and the second input capacitor are respectively connected with a first LLC switch circuit and a second LLC switch circuit, the first LLC switch circuit is connected with the primary side of the first transformer, and the second LLC switch circuit is connected with the primary side of the second transformer;
the output side comprises a load resistor and a load switching power tube which are connected in series, a branch circuit where the load resistor and the load switching power tube are located is connected with two ends of an output capacitor, secondary sides of the first transformer and the second transformer are connected with a rectifying circuit, and the rectifying circuit is connected with two ends of the output capacitor.
2. The voltage equalizing system according to claim 1, wherein two ends of the first input capacitor and the second input capacitor are respectively connected with a first voltage sampling circuit and a second voltage sampling circuit, output ends of the first voltage sampling circuit and the second voltage sampling circuit are connected with a single chip microcomputer control circuit, and the single chip microcomputer control circuit is used for controlling on or off of the load switching power tube.
3. The voltage grading system according to claim 1, wherein the first and second transformers have the same parameters including primary winding, secondary winding, inductance and leakage inductance.
4. A voltage grading system according to any of claims 1-3, characterized in that the topology of the first LLC switching circuit and the second LLC switching circuit is identical.
5. The voltage grading system according to claim 4, wherein the first LLC switching circuit comprises a first full bridge circuit and a first resonant network;
the first full-bridge circuit comprises a first switching tube, a second switching tube, a third switching tube and a fourth switching tube which are respectively connected in series, wherein the first switching tube and the third switching tube are communicated through a first resonant network.
6. The voltage grading system according to claim 5, wherein the first resonant network comprises a first resonant inductor, a first excitation inductor and a first resonant capacitor in series, and wherein the primary side of the first transformer is connected in parallel with the first excitation inductor.
7. The voltage grading system according to claim 5, wherein the second LLC switching circuit comprises a second full bridge circuit and a second resonant network;
the second full-bridge circuit comprises a fifth switching tube, a sixth switching tube, a seventh switching tube and an eighth switching tube which are respectively connected in series, wherein the fifth switching tube and the seventh switching tube are communicated through a second resonance network.
8. The voltage grading system according to claim 7, wherein the second resonant network comprises a second resonant inductor, a second excitation inductor and a second resonant capacitor in series, and the primary side of the second transformer is connected in parallel with the second excitation inductor.
9. The voltage equalizing system according to claim 7, wherein the first switching tube, the third switching tube, the fifth switching tube, and the seventh switching tube are simultaneously turned on or off;
the second switching tube, the fourth switching tube, the sixth switching tube and the eighth switching tube are simultaneously turned on or turned off.
CN202321368391.3U 2023-05-30 2023-05-30 Voltage equalizing system Active CN219875470U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202321368391.3U CN219875470U (en) 2023-05-30 2023-05-30 Voltage equalizing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202321368391.3U CN219875470U (en) 2023-05-30 2023-05-30 Voltage equalizing system

Publications (1)

Publication Number Publication Date
CN219875470U true CN219875470U (en) 2023-10-20

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Application Number Title Priority Date Filing Date
CN202321368391.3U Active CN219875470U (en) 2023-05-30 2023-05-30 Voltage equalizing system

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