CN219872325U

CN219872325U - System outage restarting circuit

Info

Publication number: CN219872325U
Application number: CN202321251011.8U
Authority: CN
Inventors: 李雪; 何柏雄
Original assignee: Shenzhen SDMC Technology Co Ltd
Current assignee: Shenzhen SDMC Technology Co Ltd
Priority date: 2023-05-23
Filing date: 2023-05-23
Publication date: 2023-10-20
Anticipated expiration: 2033-05-23

Abstract

The utility model belongs to the technical field of system power supply control devices, and particularly relates to a system power-off restarting circuit. According to the utility model, through the arrangement of the protection circuit and the central processing unit, when the system needs to be restarted, the control end of the central processing unit outputs a signal to the enabling end of the protection circuit to disconnect the power supply of the system, after the energy storage capacitor is completely released, the control end of the central processing unit loses the control capability, and the protection circuit recovers the power supply of the system due to the clamping effect of the pull-up resistor and the pull-down resistor on the enabling end, so that the hard restarting of the system after power failure is completed once; the utility model can finish the hard restart of the system by the instruction of the central processing unit, thereby being convenient for realizing the update of the system firmware and effectively improving the efficiency of system debugging.

Description

System outage restarting circuit

Technical Field

The utility model belongs to the technical field of system power supply control devices, and particularly relates to a system power-off restarting circuit.

Background

The reboot of the system is classified into soft reboot and hard reboot, the soft reboot is generally controlled by operating system instructions and the system is typically not powered down, however, the system needs to be powered down to be effective when firmware is updated. The hard restart is realized by completely disconnecting and reconnecting the system power supply and can reset the hardware state to update the firmware, but the hard restart is generally controlled by an operating system instruction, and is finished by manually pressing a power button switch or plugging in a power adapter, so that automation is difficult to realize, and inconvenience is brought to system debugging.

Disclosure of Invention

The technical problem to be solved by the utility model is to overcome the defect that the hard power-off restarting of the system cannot be controlled by an operating system instruction in the prior art and brings obstacles to the debugging of the system, thereby providing a system power-off restarting circuit.

A system power-off restarting circuit comprises a central processing unit and a protection circuit; the input end of the protection circuit is connected with an input power supply, and the output end outputs power for a system, and provides power for the system comprising the central processing unit; the control end of the CPU is connected with the enabling end of the protection circuit and is used for controlling the system power supply of the protection circuit; the enabling end is respectively connected with a pull-up resistor and a pull-down resistor; the system also comprises an energy storage capacitor, wherein the energy storage capacitor is used for supplying power to the central processing unit when the power supply of the system fails.

Further, the protection circuit is an overvoltage protection chip.

Further, the protection circuit is an overcurrent protection chip.

Further, the control terminal is a GPIO port.

Further, the input power supply is connected with the enabling end by taking the electric voltage.

Further, the protection circuit is one of overvoltage protection chips with the models of TPS25924X, ETA7014 and LP 5280.

Further, the protection circuit is one of overcurrent protection chips with the models of SY6280 and JW7111S, WP P21T 5-B.

Further, the protection circuit comprises an input end, a power end, an output end, an enabling end and a grounding end; the input end and the power end are connected with an input power supply, the grounding end is grounded, the output end outputs power for the system, and the enabling end is connected with the control end of the central processing unit.

The beneficial effects are that:

1. according to the utility model, through the arrangement of the protection circuit and the central processing unit, when the system needs to be restarted, the control end of the central processing unit outputs a signal to the enabling end of the protection circuit to disconnect the power supply of the system, after the energy storage capacitor is completely released, the control end of the central processing unit loses the control capability, and the protection circuit recovers the power supply of the system due to the clamping effect of the pull-up resistor and the pull-down resistor on the enabling end, so that the hard restarting of the system after power failure is completed once; the utility model can finish the hard restart of the system by the instruction of the central processing unit, thereby being convenient for realizing the update of the system firmware and effectively improving the efficiency of system debugging.

Drawings

In order to more clearly illustrate the embodiments of the utility model or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the utility model, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Reference numerals illustrate:

FIG. 1 is a schematic block diagram of the overall structure of the present utility model;

fig. 2 is a schematic circuit structure of the present utility model.

Detailed Description

In order that the above objects, features and advantages of the utility model will be readily understood, a more particular description of the utility model will be rendered by reference to the appended drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present utility model. The present utility model may be embodied in many other forms than described herein and similarly modified by those skilled in the art without departing from the spirit of the utility model, whereby the utility model is not limited to the specific embodiments disclosed below.

Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present utility model, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise.

In the present utility model, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; either directly or indirectly, through intermediaries, or both, may be in communication with each other or in interaction with each other, unless expressly defined otherwise. The specific meaning of the above terms in the present utility model can be understood by those of ordinary skill in the art according to the specific circumstances.

Referring to fig. 1, the present embodiment provides a system power-off restarting circuit, which includes a central processing unit and a protection circuit; the input end of the protection circuit is connected with an input power supply, and the output end outputs power for a system, and provides power for the system comprising the central processing unit; the control end of the CPU is connected with the enabling end of the protection circuit and is used for controlling the system power supply of the protection circuit; the enabling end is respectively connected with a pull-up resistor and a pull-down resistor; the system also comprises an energy storage capacitor, wherein the energy storage capacitor is used for supplying power to the central processing unit when the power supply of the system fails.

Specifically, the protection circuit comprises an input end, a power end, an output end, an enabling end and a grounding end; the input end and the power end are connected with an input power supply, the grounding end is grounded, the output end outputs power for the system, and the enabling end is connected with the control end of the central processing unit.

The protection circuit is an overvoltage protection chip or an overcurrent protection chip; the overvoltage protection chip can be one of the overvoltage protection chips with the models of TPS25924X, ETA7014 and LP5280, and the overcurrent protection chip can be one of the overcurrent protection chips with the models of SY6280 and JW7111S, WP P21T 5-B.

In this embodiment, the protection circuit is preferably an overvoltage protection chip, and the model is ETA7014. The overvoltage protection chip ETA7014 has an input terminal IN, an output terminal OUT, a power supply terminal VCC, an enable terminal EN, and a ground terminal GND, and is turned on when the enable terminal inputs a high level.

In this embodiment, the control terminal is a GPIO port (General-purpose input/output), that is, a General-purpose input/output port, and the central processor can freely control the GPIO port, so as to control the enable terminal of the overvoltage protection chip; in this test example, the default level of the GPIO is high, and when uncontrolled, it is high, so that the ensuring unit affects normal power-up of the system.

Specifically, referring to fig. 2, the input terminal IN and the power terminal of the overvoltage protection chip are connected to a DC12V power supply, the ground terminal GND is grounded, the output terminal OUT outputs 12V direct current power supply, and the enable terminal EN is connected to the GPIO port of the central processing unit.

The input end IN and the grounding end GND are connected with a first capacitor C1, the specification of the first capacitor C1 is 0.1 mu F, the second capacitor C2 is connected, the specification of the second capacitor C2 is 10 mu F/25V, a polar capacitor C3 is connected IN the forward direction, and the specification of the polar capacitor C3 is 220 mu F/25V. The first capacitor C1 and the second capacitor C2 play a role in decoupling in the circuit, and the third capacitor C3 mainly plays a role in auxiliary protection of a back-end circuit device in the circuit. The power supply circuit further comprises a clamping diode TVS1 connected IN series between the input end IN and the ground end GND, when surge impact occurs, the clamping diode TVS1 acts first, and voltage is clamped on the characteristic VC value of the clamping diode TVS1, so that a back-end circuit is protected. If the surge impact is negative pressure impact, the third capacitor C3 compensates the circuit potential after the clamping diode TVS1 acts, so that the voltage of the circuit is stabilized in the working range of each chip, and the device is not damaged.

The enabling end EN is connected with a pull-up resistor R1, the other end of the pull-up resistor R1 is connected with a 12V direct current power supply, and the specification of the pull-up resistor is 27KΩ/1%; the enable end EN is connected with a pull-down resistor R2, the other end of the pull-down resistor R1 is grounded, and the specification of the pull-down resistor R2 is 10KΩ/1%. When the central processing unit is powered off, the enabling end EN is enabled by the clamping action of the pull-up voltage division of the pull-up resistor R1 and the pull-down voltage division of the pull-down resistor R2.

As a further improvement of this embodiment, the input power supply takes the voltage and connects the enable terminal EN, so that when the CPU does not work, the input power supply keeps the enable terminal EN at a high level, and ensures normal power-up of the system.

Working principle: when the system needs to be powered off and restarted, the central processing unit controls the control end GPIO to output a low level to the enable end EN of the overvoltage protection chip, so that the overvoltage protection chip is closed, and the power supply output is stopped. Under the power supply of the energy storage capacitor, the CPU continues to work for a period of time, and the level of the enable end EN is continuously pulled down, so that the overvoltage chip is ensured to stop working; until the energy storage capacitor is completely released, the GPIO end of the central processing unit loses control over the enable end EN, the enable end is restored to a high level under the clamping action of the pull-up voltage division of the pull-up resistor R1 and the pull-down resistor R2, and the overvoltage protection chip is restarted to supply power for the system, so that the power-off restarting of the system is completed once.

The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.

The above examples illustrate only a few embodiments of the utility model, which are described in detail and are not to be construed as limiting the scope of the claims. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the utility model, which are all within the scope of the utility model. Accordingly, the scope of protection of the present utility model is to be determined by the appended claims.

Claims

1. The system power-off restarting circuit is characterized by comprising a central processing unit and a protection circuit; the input end of the protection circuit is connected with an input power supply, and the output end outputs power for a system, and provides power for the system comprising the central processing unit; the control end of the CPU is connected with the enabling end of the protection circuit and is used for controlling the system power supply of the protection circuit; the enabling end is respectively connected with a pull-up resistor and a pull-down resistor; the system also comprises an energy storage capacitor, wherein the energy storage capacitor is used for supplying power to the central processing unit when the power supply of the system fails.

2. The system power-down restarting circuit of claim 1, wherein the protection circuit is an overvoltage protection chip.

3. The system power-down restarting circuit of claim 1, wherein the protection circuit is an over-current protection chip.

4. The system power-down restarting circuit of claim 1, wherein the control terminal is a GPIO port.

5. The system power-down restarting circuit of claim 1, wherein the input power source is connected to the enable terminal by a voltage divider.

6. The system power down restart circuit of claim 1 wherein the protection circuit is one of the overvoltage protection chips of types TPS25924X, ETA, LP 5280.

7. The system power-down restarting circuit of claim 1 wherein the protection circuit is one of the types SY6280, JW7111S, WP P21T5-B over-current protection chips.

8. The system power-down restarting circuit of claim 1, wherein the protection circuit includes an input terminal, a power terminal, an output terminal, an enable terminal, and a ground terminal; the input end and the power end are connected with an input power supply, the grounding end is grounded, the output end outputs power for the system, and the enabling end is connected with the control end of the central processing unit.