CN219843532U - Power module and apparatus - Google Patents

Abstract

The utility model discloses a power module and equipment. The substrate extends along a first direction and a second direction which are orthogonal, and is provided with a first side and a second side which are opposite; the rectification circuit unit and the power factor correction circuit unit are arranged close to the first side of the substrate, the rectification circuit unit and the power factor correction circuit unit are distributed along the first direction, the inversion circuit unit is arranged close to the second side of the substrate, and the inversion circuit unit is positioned on one side of the rectification circuit unit and the power factor correction circuit unit away from the first side of the substrate; the power factor correction circuit unit is electrically connected with the rectification circuit unit, and the power factor correction circuit unit is electrically connected with the inversion circuit unit. The power module has the advantages of high integration level, reasonable distribution of internal circuit units and good heat dissipation performance.

Description

Power module and apparatus

Technical Field

The present utility model relates to the field of semiconductor technologies, and in particular, to a power module and a device including the power module.

Background

In the related art, in the layout of the power module, the power chips are distributed unreasonably, which can lead to large stray inductance of the current loop in the module and the service performance of the image power module.

Disclosure of Invention

The present utility model aims to solve at least one of the technical problems existing in the prior art. Therefore, an object of the present utility model is to provide a power module, which has reasonable distribution, high integration of internal structure, and small stray inductance of current loop in the module.

Another object of the utility model is to propose a device.

In order to achieve the above object, a power module according to an embodiment of a first aspect of the present utility model includes: a substrate extending in first and second orthogonal directions having first and second opposite sides; a rectifying circuit unit, a power factor correction circuit unit, and an inverter circuit unit disposed on the substrate; wherein the rectifying circuit unit and the power factor correction circuit unit are both arranged near the first side of the substrate, and the rectifying circuit unit and the power factor correction circuit unit are arranged along the first direction, the inverter circuit unit is arranged near the second side of the substrate, and the inverter circuit unit is positioned at one side of the rectifying circuit unit and the power factor correction circuit unit away from the first side of the substrate; the power factor correction circuit unit is electrically connected with the rectification circuit unit, and the power factor correction circuit unit is electrically connected with the inverter circuit unit.

According to the power module provided by the embodiment of the utility model, the rectifying circuit unit, the power factor correction circuit unit and the inversion circuit unit are integrated, the packaging space inside the module is effectively utilized, the occupied space of the power factor correction circuit unit in practical application is reduced, the module integration level is improved, the distribution of each unit is reasonable, the chips of the circuit unit are uniformly distributed, the internal heat dissipation is facilitated, the internal stray inductance can be reduced, and the work efficiency of the module is improved.

In some embodiments, the substrate includes a stack of a first copper layer, an intermediate layer, and a second copper layer; the first copper layer is provided with a first conductive region, a second conductive region and a third conductive region, the first conductive region and the second conductive region are close to the first edge of the substrate, the first conductive region and the second conductive region are arranged along the first direction, and the third conductive region is close to the second edge of the substrate; the power factor correction circuit unit is arranged in the first conductive area, the rectification circuit unit is arranged in the second conductive area, and the inverter circuit unit is arranged in the third conductive area.

In some embodiments, the first conductive region includes a first conductive sub-region and a second conductive sub-region arranged along a second direction, an end of the first conductive sub-region away from the first side of the substrate and an end of the second conductive sub-region near the first side of the substrate having an intersection in the first direction; the power factor correction circuit unit comprises a first power chip and a second power chip, wherein the first power chip is arranged in the first conductive subarea, the second power chip is arranged in the second conductive subarea, and the first conductive subarea further comprises a first blank area.

In some embodiments, the power factor correction circuit unit further comprises a first freewheeling diode chip and a second freewheeling diode chip; the first free-wheeling diode chip is arranged in the first conductive sub-area, the first free-wheeling diode and the first power chip are arranged in parallel, the second free-wheeling diode chip is arranged in the second conductive sub-area, and the second free-wheeling diode chip and the second power chip are arranged in parallel.

In some embodiments, the first conductive region further comprises a third conductive sub-region located on a side of the first conductive sub-region remote from the first side of the substrate and surrounding an end of the second conductive sub-region remote from the first side of the substrate; the power factor correction circuit unit further comprises a first fast recovery diode chip and a second fast recovery diode chip, wherein the first fast recovery diode chip is arranged in the third conductive subarea, the first fast recovery diode chip and the first conductive subarea are electrically connected through bonding wires to be connected with the first power chip, the second fast recovery diode chip is arranged in the third conductive subarea, and the second fast recovery diode chip and the second conductive subarea are electrically connected through bonding wires to be connected with the second power chip; the portion of the third conductive sub-region located between the first fast recovery diode chip and the second fast recovery diode chip is a second blank region.

In some embodiments, the second conductive region comprises a fourth conductive sub-region, a fifth conductive sub-region and a sixth conductive sub-region, the fourth conductive sub-region being adjacent to the first conductive sub-region and extending in the second direction, the fifth conductive sub-region and the sixth conductive sub-region being located on a side of the fourth conductive sub-region remote from the first conductive sub-region and being arranged in the first direction; the rectifying circuit unit comprises a first rectifying diode chip, a second rectifying diode chip, a third rectifying diode chip and a fourth rectifying diode chip; the first rectifier diode chip and the second rectifier diode chip are arranged in the fourth conductive sub-area, the third rectifier diode chip is arranged in the fifth conductive sub-area, the fourth rectifier diode chip is arranged in the sixth conductive sub-area, the first rectifier diode chip and the fifth conductive sub-area are electrically connected through bonding wires to be connected with the third rectifier diode chip, and the second rectifier diode chip and the sixth conductive sub-area are electrically connected to be connected with the fourth rectifier diode.

In some embodiments, the inverter circuit unit includes three upper bridge inverter power chips and three lower bridge inverter power chips; the third conductive region comprises a seventh conductive sub-region and an eighth conductive sub-region, the seventh conductive sub-region is located at one side of the third conductive sub-region and is arranged close to the second edge of the substrate, the eighth conductive sub-region and the seventh conductive sub-region are arranged along the first direction, and the eighth conductive sub-region is connected with the second empty package region; the seventh conductive subarea comprises three upper bridge chip conductive areas which are arranged along the second direction, and the three upper bridge inverter power chips are respectively arranged in the three upper bridge chip conductive areas; the three lower bridge inverter power chips are arranged in the eighth conductive subarea along the second direction, and the three lower bridge inverter power chips are electrically connected with the three upper bridge chip conductive areas through bonding wires respectively.

In some embodiments, the three upper bridge inverter power dies include a first upper bridge inverter power die, a second upper bridge inverter power die, and a third upper bridge inverter power die; the three lower bridge inverter power chips comprise a first lower bridge inverter power chip, a second lower bridge inverter power chip and a third lower bridge inverter power chip; the first upper bridge inversion power chip is electrically connected with the first lower bridge inversion power chip, the second upper bridge inversion power chip is electrically connected with the second lower bridge inversion power chip, and the third upper bridge inversion power chip is electrically connected with the third lower bridge inversion power chip.

In some embodiments, the first copper layer is further formed with a fourth conductive region between the second conductive region and the third conductive region; the power module further comprises a temperature detection unit, and the temperature detection unit is arranged in the fourth conductive area.

In some embodiments, the first copper layer is further formed with a chip pin conductive region, the chip pin conductive region is disposed near an edge of the substrate, and the chip pin conductive region is electrically connected with a corresponding chip in the power factor correction circuit unit, a corresponding chip in the rectifier circuit unit, and a corresponding chip in the inverter circuit unit through bonding wires; the power module further comprises a pin terminal, and one end of the pin terminal is connected with the chip pin conducting area.

In some embodiments, the power module further comprises: the shell is buckled on the substrate, a sealing cavity is formed by the shell and the substrate, a through hole is formed in the shell, and the other end of the pin terminal is led out of the shell through the through hole; the power factor correction circuit unit, the rectification circuit unit and the inverter circuit unit are all arranged in the sealing cavity, and silica gel is filled in the sealing cavity.

In order to achieve the above object, an apparatus according to an embodiment of the second aspect of the present utility model includes the power module.

According to the device provided by the embodiment of the utility model, the power module provided by the embodiment of the utility model can be used for providing working efficiency and stability, and has good heat dissipation performance.

Additional aspects and advantages of the utility model will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the utility model.

Drawings

The foregoing and/or additional aspects and advantages of the utility model will become apparent and may be better understood from the following description of embodiments taken in conjunction with the accompanying drawings in which:

FIG. 1 is a schematic diagram of the internal distribution of a power module according to one embodiment of the utility model;

FIG. 2 is a schematic illustration of a substrate structure according to one embodiment of the utility model;

FIG. 3 is a schematic diagram of the internal distribution of a power module according to one embodiment of the utility model;

FIG. 4 is a schematic diagram of the internal circuit topology of a power module according to one embodiment of the utility model;

FIG. 5 is a side cross-sectional view of a power module according to one embodiment of the utility model;

fig. 6 is a block diagram of an apparatus according to one embodiment of the utility model.

Detailed Description

Embodiments of the present utility model will be described in detail below, by way of example with reference to the accompanying drawings.

A power module according to an embodiment of the present utility model is described below with reference to fig. 1 to 5.

Fig. 1 is a schematic diagram of an internal layout of a power module according to an embodiment of the present utility model, and as shown in fig. 1, a power module 100 of an embodiment of the present utility model includes a substrate 20, a rectifying circuit unit 15, a power factor correction circuit unit 16, and an inverter circuit unit 17.

The substrate 20 extends along a first direction and a second direction which are orthogonal, and has a first side L1 and a second side L2 which are opposite. The rectifying circuit unit 15, the power factor correction circuit unit 16, and the inverter circuit unit 17 are provided on the substrate 20.

Wherein the rectifying circuit unit 15 and the power factor correction circuit unit 16 are both disposed near the first side of the substrate 20, and the rectifying circuit unit 15 and the power factor correction circuit unit 16 are arranged along the first direction, the inverter circuit unit 17 is disposed near the second side of the substrate 20, and the inverter circuit unit 17 is located at a side of the rectifying circuit unit 15 and the power factor correction circuit unit 16 away from the first side L1 of the substrate. The power factor correction circuit unit 16 is electrically connected to the rectifying circuit unit 15, and the power factor correction circuit unit 16 is electrically connected to the inverter circuit unit 17.

According to the power module 100 of the embodiment of the utility model, the rectifying circuit unit 15, the power factor correction circuit unit 16 and the inverter circuit unit 17 are integrated, so that the packaging space inside the module is effectively utilized, the occupied space of the power factor correction circuit unit 16 in practical application is reduced, the module integration level is improved, the units are distributed reasonably, the power chips are distributed uniformly, the internal heat dissipation is facilitated, the internal stray inductance can be reduced, and the work efficiency of the module is improved.

The optimization of the substrate is described below with respect to the topology of the internal circuitry of the power module 100.

In some embodiments of the present utility model, the substrate 20 adopts a DBC structure, and fig. 2 is a schematic diagram of the substrate according to an embodiment of the present utility model, and as shown in fig. 2, the substrate 20 includes a first copper layer 10, an intermediate layer 11, and a second copper layer 12 stacked.

The first copper layer 10 is formed with a first conductive region, a second conductive region, and a third conductive region, the first conductive region and the second conductive region are adjacent to the first side L1 of the substrate, and the first conductive region and the second conductive region are arranged along the first direction, and the third conductive region is adjacent to the second side L2 of the substrate. The power factor correction circuit unit 16 is disposed in the first conductive region, the rectification circuit unit 15 is disposed in the second conductive region, and the inverter circuit unit 17 is disposed in the third conductive region.

The intermediate layer 11 may be made of Al ₂ O ₃ I.e. ceramic, which can withstand large voltages and has an insulating effect.

The substrate 20 adopts a DBC structure, so that a large amount of heat generated in the power module during operation can be effectively conducted to the outside of the power module 100, and the chips and bonding wires in the power module 100 are ensured not to fail due to heat accumulation. The optimized substrate design layout can effectively reduce stray inductance in a topological circuit inside the module and improve the working efficiency of the power module.

Further, in the embodiment, as shown in fig. 3, the first conductive region includes a first conductive sub-region 111 and a second conductive sub-region 112 arranged along the second direction, and an end of the first conductive sub-region 111 away from the first edge L1 of the substrate and an end of the second conductive sub-region 112 close to the first edge L1 of the substrate have a staggered portion in the first direction.

Fig. 4 is a schematic diagram of an internal circuit of a power module according to an embodiment of the present utility model, which can be divided into three parts according to functions, namely, a rectifying circuit unit 15, a power factor correction circuit unit 16, and an inverter circuit unit 17. The fluctuating alternating current commercial power enters the rectifying circuit unit 15 and is converted into direct current from alternating current after rectification. The power factor correction circuit unit 16 suppresses harmonic components in the current by high-frequency chopping. The dc power subjected to the power factor correction is input to the inverter circuit unit 17, and the inverter circuit unit 17 converts the dc power into an ac power supply of a specific frequency for use under the control of an external driving circuit.

As shown in fig. 1, the pfc circuit unit 16 includes two power chips 2, such as IGBT chips, for example, a first power chip 2-1 and a second power chip 2-2 in fig. 4, the first power chip 2-1 is disposed in a first conductive sub-area 111, the second power chip 2-2 is disposed in a second conductive sub-area 112, and the first conductive sub-area 111 further includes a first blank area 113.

Since the pfc circuit unit 16 generates a large amount of heat along with the high-frequency switching during the operation of the power module 100, in the embodiment of the present utility model, the first blank area 113 is set by widening the area of the pfc circuit unit 16 corresponding to the substrate, so as to reserve a larger heat dissipation area, thereby avoiding the power module failure caused by the local excessive temperature of the pfc circuit unit 16.

As shown in fig. 1, the pfc circuit unit 16 further includes two flywheel diode chips 4, i.e., a first flywheel diode chip 4-1 and a second flywheel diode chip 4-2 as shown in fig. 4, which are matched to the power chip 4. The first freewheeling diode chip 4-1 is disposed in the first conductive sub-area 111, the first freewheeling diode chip 4-1 is disposed in parallel with the first power chip 2-1, the second freewheeling diode chip 4-2 is disposed in the second conductive sub-area 112, and the second freewheeling diode chip 4-2 is disposed in parallel with the second power chip 2-2.

As shown in fig. 3, the first conductive region further comprises a third conductive sub-region 114, said third conductive sub-region 114 being located on a side of said first conductive sub-region 111 remote from the first side of the substrate and surrounding an end of said second conductive sub-region 112 remote from said first side L1 of the substrate.

The pfc circuit unit 16 further includes two fast recovery diode chips 5, namely a first fast recovery diode chip 5-1 and a second fast recovery diode chip 5-2, the first fast recovery diode chip 5-1 is disposed in the third conductive sub-area 114, the first fast recovery diode chip 5-1 and the first conductive sub-area 111 are electrically connected by a bonding wire to connect the first power chip 2-1, the second fast recovery diode chip 5-2 is disposed in the third conductive sub-area 114, and the second fast recovery diode chip 5-2 and the second conductive sub-area 112 are electrically connected by a bonding wire to connect the second power chip 2-2.

Wherein a portion of the third conductive sub-region 114 between the first fast recovery diode chip 5-1 and the second fast recovery diode chip 5-2 is a second blank region 115. Similarly, the second blank region 115 is beneficial to increasing the heat dissipation area, and avoids the power module failure caused by the local over-high temperature of the pfc circuit unit 16.

In the above, the power module 100 according to the embodiment of the present utility model integrates the PFC circuit unit 16, for example, two IGBT chips, two flywheel diode chips, and two fast recovery diode chips are soldered on the first copper layer 10 of the substrate 20 to form the PFC unit, which plays a role in PFC. Specifically, for the suppression requirement of current harmonics in the application of commercial variable frequency equipment, such as commercial variable frequency air conditioner, the power factor correction circuit unit 16 in the embodiment of the utility model cancels the braking unit in the existing power module, optimally designs the internal substrate 20 of the power module, and forms the PFC unit through the high-frequency low-conduction-loss IGBT chip, the freewheeling diode and the fast recovery diode chip, thereby integrating the PFC function into the power module 100, reserving a blank area on the substrate 20, facilitating the heat dissipation of the PFC unit and avoiding the failure of the power module 100 caused by overhigh local temperature.

As shown in fig. 3, the second conductive region comprises a fourth conductive sub-region 116, a fifth conductive sub-region 117 and a sixth conductive sub-region 118, the fourth conductive sub-region 116 being adjacent to the first conductive sub-region 111 and extending in the second direction, the fifth conductive sub-region 117 and the sixth conductive sub-region 118 being located on a side of the fourth conductive sub-region 116 remote from the first conductive sub-region 111 and being arranged in the first direction.

As shown in fig. 1, the rectifying circuit unit 15 includes four rectifying diode chips 3, namely, a first rectifying diode chip 3-1, a second rectifying diode chip 3-2, a third rectifying diode chip 3-3, and a fourth rectifying diode chip 3-4 as shown in fig. 4.

The first rectifier diode chip 3-1 and the second rectifier diode chip 3-2 are disposed in the fourth conductive sub-area 116, the third rectifier diode chip 3-3 is disposed in the fifth conductive sub-area 117, the fourth rectifier diode chip 3-4 is disposed in the sixth conductive sub-area 118, the first rectifier diode chip 3-1 and the fifth conductive sub-area 117 are electrically connected to connect the third rectifier diode chip 3-3 through bonding wires, and the second rectifier diode chip 3-2 is electrically connected to the sixth conductive sub-area 118 to connect the fourth rectifier diode chip 3-4.

As described above, the four rectifier diode chips are soldered to the first copper layer 10 of the substrate 20 to form the rectifier circuit unit 15, so as to convert the unstable ac power input from the input terminal into a relatively stable dc power.

As shown in fig. 4, the inverter circuit unit 17 includes three upper bridge inverter power chips (6U, 6V, 6W) and three lower bridge inverter power chips (15U, 15V, 15W).

As shown in fig. 3, the third conductive region includes a seventh conductive sub-region 119 and an eighth conductive sub-region 120, the seventh conductive sub-region 119 is located at one side of the third conductive sub-region 114 and is disposed near the second side of the substrate, the eighth conductive sub-region is disposed near the second side L2 of the substrate, and the eighth conductive sub-region 120 and the seventh conductive sub-region 119 are arranged along the first direction, and the eighth conductive sub-region 120 is connected to the second blank region 115.

The seventh conductive sub-area 119 includes three upper bridge chip conductive areas arranged along the second direction, and three upper bridge inverter power chips are respectively disposed in the three upper bridge chip conductive areas; the three lower bridge inverter power chips are arranged in the eighth conductive area 120 along the second direction, and the three lower bridge inverter power chips are electrically connected with the three upper bridge chip conductive areas through bonding wires respectively.

For example, as shown in fig. 4, the three upper bridge inverter power chips include a first upper bridge inverter power chip 6U, a second upper bridge inverter power chip 6V, and a third upper bridge inverter power chip 6W; the three lower bridge inverter power chips comprise a first lower bridge inverter power chip 15U, a second lower bridge inverter power chip 15V and a third lower bridge inverter power chip 15W; the first upper bridge inverter power chip 6U is electrically connected with the first lower bridge inverter power chip 15U, the second upper bridge inverter power chip 6V is electrically connected with the second lower bridge inverter power chip 15V, and the third upper bridge inverter power chip 6W is electrically connected with the third lower bridge inverter power chip 15W.

Specifically, in the embodiment, as shown in fig. 1, a flywheel diode chip 7 may be further configured corresponding to each inverter power chip, for example, six IGBT chips, six flywheel diode chips are soldered on the first copper layer 10 of the substrate 20, constituting the inverter circuit unit 17. The inverter circuit unit 17 converts the dc power subjected to the power factor correction into ac power of a specific frequency, and outputs the ac power to the outside of the power module 100 through an output terminal.

In the embodiment, as shown in fig. 3, the inverter circuit unit 17 adopts a symmetrical design, so that the length of a current loop on the substrate 20 is reduced, and thus, the current flowing through each inverter power chip of the inverter circuit unit 17 is effectively balanced, the heat productivity of the inverter power chip is more even, the module failure caused by local overheating is avoided, the stray inductance of the internal loop of the power module can be effectively reduced by a shorter current loop, and the working efficiency of the power module is improved.

In an embodiment, as shown in fig. 4, the power module 100 further includes a temperature detecting unit 9, such as a thermistor, and the first copper layer 10 is further formed with a fourth conductive region 121, and the fourth conductive region 121 is located between the second conductive region and the third conductive region; the temperature detection unit 9 is disposed in the fourth conductive region 121.

Specifically, as shown in fig. 1, a plurality of bonding wires 8 connect the power chip, the flywheel diode chip, the fast recovery diode chip and the first copper layer 10 on the substrate, so that a current loop is formed inside the power module 100. The temperature detecting unit 9, for example, a thermistor is welded on the first copper layer 10, and can change the resistance value along with the change of the surface temperature of the substrate 20, and the temperature of the substrate 20 inside the power module can be accurately estimated by detecting the resistance value of the thermistor through the metal terminals at the two ends of the thermistor, so as to play a role in protecting the temperature of the power module 100.

As shown in fig. 3, the first copper layer 10 is further formed with a chip lead conductive region 130, where the chip lead conductive region 130 is disposed near an edge of the substrate 20, and the chip lead conductive region 130 is electrically connected to a corresponding chip in the pfc circuit unit 16, a corresponding chip in the rectifying circuit unit 15, and a corresponding chip in the inverter circuit unit 17 through bonding wires 8.

The power module 100 further includes a pin terminal 1, and one end of the pin terminal 1 is connected to the chip pin conductive area 130, so as to implement a current loop and strong and weak electric signal transmission inside the power module 100. Specifically, the pin terminal 1 may be a metal pin terminal welded to the first copper layer 10, and functions as a current input, a current output, a driving signal input, a thermistor resistance signal output, and the like.

Fig. 5 is a side sectional view of a power module according to an embodiment of the present utility model, as shown in fig. 5, the power module further includes a housing 13, the housing 13 is fastened on a substrate 20, the housing 13 and the substrate 20 enclose a sealed cavity, a via hole is provided on the housing 13, and the other end of the pin terminal 1 is led out of the housing 13 through the via hole; the power factor correction circuit unit 16, the rectifying circuit unit 15 and the inverter circuit unit 17 are all disposed in a sealed cavity, and the sealed cavity is also filled with the silicone gel 14.

Specifically, the pin terminal 1 is an output pin of the power module 100, and the output pin is led out through a via hole on the upper surface of the power module housing 13, and finally welded or plugged onto a drive PCB board to form a current loop. The silica gel 14 is poured into the power module shell 13, and the silica gel 14 covers the PFC unit IGBT chip 2, the rectifier diode chip 3, the follow current diode chip 4 matched with the PFC unit IGBT chip, the PFC unit fast recovery diode chip 5, the inversion unit IGBT chip 6, the inversion unit follow current diode chip 7, the aluminum bonding wire 8, the thermistor 9 and the first copper layer 10, so that the functions of insulation, dust isolation and vapor isolation are achieved.

In summary, the power module 100 of the embodiment of the present utility model integrates PFC into the power module without changing the size of the original package structure of the power module, which can reduce the overall volume of the power module and the driving circuit, and is beneficial to the miniaturized design of an air conditioner controller, etc., the internal circuit unit distribution is reasonable, and the optimized DBC design can effectively reduce the stray inductance of the internal current loop of the power module. And the heat dissipation device has the heat dissipation advantage, and can timely dissipate heat generated on the chip inside the power module.

Based on the power module of the above embodiment, the second aspect of the present utility model further provides an apparatus, which may include, but is not limited to, a variable frequency air conditioner and the like.

Fig. 6 is a block diagram of an apparatus according to an embodiment of the present utility model, and as shown in fig. 6, the apparatus 1000 includes the power module 100 of the above embodiment, and the specific structure of the power module 100 may be described with reference to the above embodiment, which is not repeated herein.

According to the device 1000 of the embodiment of the present utility model, by adopting the power module 100 of the above embodiment, the working efficiency and stability can be provided, and the heat dissipation performance is good.

In the description of the present specification, reference to the terms "one embodiment," "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the utility model. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples.

While embodiments of the present utility model have been shown and described, it will be understood by those of ordinary skill in the art that: many changes, modifications, substitutions and variations may be made to the embodiments without departing from the spirit and principles of the utility model, the scope of which is defined by the claims and their equivalents.

Claims (12)

1. A power module, comprising:

a substrate extending in first and second orthogonal directions having first and second opposite sides;

a rectifying circuit unit, a power factor correction circuit unit, and an inverter circuit unit disposed on the substrate;

wherein the rectifying circuit unit and the power factor correction circuit unit are both arranged near the first side of the substrate, and the rectifying circuit unit and the power factor correction circuit unit are arranged along the first direction, the inverter circuit unit is arranged near the second side of the substrate, and the inverter circuit unit is positioned at one side of the rectifying circuit unit and the power factor correction circuit unit away from the first side of the substrate;

the power factor correction circuit unit is electrically connected with the rectification circuit unit, and the power factor correction circuit unit is electrically connected with the inverter circuit unit.

2. The power module of claim 1, wherein the power module comprises a power supply,

the substrate comprises a first copper layer, an intermediate layer and a second copper layer which are laminated;

the first copper layer is provided with a first conductive region, a second conductive region and a third conductive region, the first conductive region and the second conductive region are close to the first edge of the substrate, the first conductive region and the second conductive region are arranged along the first direction, and the third conductive region is close to the second edge of the substrate;

the power factor correction circuit unit is arranged in the first conductive area, the rectification circuit unit is arranged in the second conductive area, and the inverter circuit unit is arranged in the third conductive area.

3. The power module of claim 2, wherein the power module comprises a power supply,

the first conductive region comprises a first conductive sub-region and a second conductive sub-region which are arranged along a second direction, and a staggered part exists between one end of the first conductive sub-region far away from the first edge of the substrate and one end of the second conductive sub-region close to the first edge of the substrate in the first direction;

the power factor correction circuit unit comprises a first power chip and a second power chip, wherein the first power chip is arranged in the first conductive subarea, the second power chip is arranged in the second conductive subarea, and the first conductive subarea further comprises a first blank area.

4. The power module of claim 3, wherein the power module comprises a power supply,

the power factor correction circuit unit further comprises a first freewheeling diode chip and a second freewheeling diode chip;

the first free-wheeling diode chip is arranged in the first conductive sub-area, the first free-wheeling diode and the first power chip are arranged in parallel, the second free-wheeling diode chip is arranged in the second conductive sub-area, and the second free-wheeling diode chip and the second power chip are arranged in parallel.

5. The power module of claim 4, wherein the power module further comprises a power supply,

the first conductive region further comprises a third conductive sub-region, the third conductive sub-region is located at one side of the first conductive sub-region away from the first side of the substrate, and the third conductive sub-region surrounds one end of the second conductive sub-region away from the first side of the substrate;

the power factor correction circuit unit further comprises a first fast recovery diode chip and a second fast recovery diode chip, wherein the first fast recovery diode chip is arranged in the third conductive subarea, the first fast recovery diode chip and the first conductive subarea are electrically connected through bonding wires to be connected with the first power chip, the second fast recovery diode chip is arranged in the third conductive subarea, and the second fast recovery diode chip and the second conductive subarea are electrically connected through bonding wires to be connected with the second power chip;

the portion of the third conductive sub-region located between the first fast recovery diode chip and the second fast recovery diode chip is a second blank region.

6. The power module of claim 5, wherein the power module further comprises a power supply,

the second conductive region comprises a fourth conductive sub-region, a fifth conductive sub-region and a sixth conductive sub-region, the fourth conductive sub-region being adjacent to the first conductive sub-region and extending in the second direction, the fifth conductive sub-region and the sixth conductive sub-region being located on a side of the fourth conductive sub-region remote from the first conductive sub-region and being arranged in the first direction;

the rectifying circuit unit comprises a first rectifying diode chip, a second rectifying diode chip, a third rectifying diode chip and a fourth rectifying diode chip;

the first rectifier diode chip and the second rectifier diode chip are arranged in the fourth conductive sub-area, the third rectifier diode chip is arranged in the fifth conductive sub-area, the fourth rectifier diode chip is arranged in the sixth conductive sub-area, the first rectifier diode chip and the fifth conductive sub-area are electrically connected through bonding wires to be connected with the third rectifier diode chip, and the second rectifier diode chip and the sixth conductive sub-area are electrically connected to be connected with the fourth rectifier diode.

7. The power module of claim 6, wherein the power module further comprises a power supply,

the inverter circuit unit comprises three upper bridge inverter power chips and three lower bridge inverter power chips;

the third conductive region comprises a seventh conductive sub-region and an eighth conductive sub-region, the seventh conductive sub-region is located at one side of the third conductive sub-region and is arranged close to the second edge of the substrate, the eighth conductive sub-region and the seventh conductive sub-region are arranged along the first direction, and the eighth conductive sub-region is connected with the second blank region;

the seventh conductive subarea comprises three upper bridge chip conductive areas which are arranged along the second direction, and the three upper bridge inverter power chips are respectively arranged in the three upper bridge chip conductive areas;

the three lower bridge inverter power chips are arranged in the eighth conductive subarea along the second direction, and the three lower bridge inverter power chips are electrically connected with the three upper bridge chip conductive areas through bonding wires respectively.

8. The power module of claim 7, wherein the power module further comprises a power supply,

the three upper bridge inverter power chips comprise a first upper bridge inverter power chip, a second upper bridge inverter power chip and a third upper bridge inverter power chip;

the three lower bridge inverter power chips comprise a first lower bridge inverter power chip, a second lower bridge inverter power chip and a third lower bridge inverter power chip;

the first upper bridge inversion power chip is electrically connected with the first lower bridge inversion power chip, the second upper bridge inversion power chip is electrically connected with the second lower bridge inversion power chip, and the third upper bridge inversion power chip is electrically connected with the third lower bridge inversion power chip.

9. The power module of claim 8, wherein the power module further comprises a power supply,

the first copper layer is further formed with a fourth conductive region, and the fourth conductive region is located between the second conductive region and the third conductive region;

the power module further comprises a temperature detection unit, and the temperature detection unit is arranged in the fourth conductive area.

10. The power module of claim 8, wherein the power module further comprises a power supply,

the first copper layer is also provided with a chip pin conducting area, the chip pin conducting area is arranged close to the edge of the substrate, and the chip pin conducting area is electrically connected with a corresponding chip in the power factor correction circuit unit, a corresponding chip in the rectification circuit unit and a corresponding chip in the inverter circuit unit through bonding wires;

the power module further comprises a pin terminal, and one end of the pin terminal is connected with the chip pin conducting area.

11. The power module of claim 10, further comprising:

the shell is buckled on the substrate, a sealing cavity is formed by the shell and the substrate, a through hole is formed in the shell, and the other end of the pin terminal is led out of the shell through the through hole;

the power factor correction circuit unit, the rectification circuit unit and the inverter circuit unit are all arranged in the sealing cavity, and silica gel is filled in the sealing cavity.

12. An apparatus comprising the power module of any of claims 1-11.