CN219833987U - Rectifying and amplifying circuit of photovoltaic inverter - Google Patents
Rectifying and amplifying circuit of photovoltaic inverter Download PDFInfo
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Abstract
The utility model discloses a rectifying and amplifying circuit of a photovoltaic inverter. The circuit includes a bias voltage terminal; an input voltage terminal; the first differential circuit is used for receiving voltage signals of the bias voltage terminal and the input voltage terminal, and outputting a first gain signal after differential by the first single-power-supply operational amplifier; the second differential circuit is used for receiving voltage signals of the bias voltage terminal and the input voltage terminal, and outputting a second gain signal after being subjected to differential by the second single-power-supply operational amplifier; and an adder circuit having an input terminal connected to the output terminal of the first differential circuit and the output terminal of the second differential circuit, respectively, and a signal output terminal for outputting the target signal after rectifying the first gain signal and the second gain signal. The rectification amplifying circuit of the photovoltaic inverter replaces the original dual-power operational amplifier, saves a negative power supply, saves cost and also realizes the precise rectification and amplification functions of signals.
Description
Technical Field
The utility model belongs to the field of photovoltaic inverters, and particularly relates to a rectifying and amplifying circuit of a photovoltaic inverter.
Background
With the increasing prominence of energy problems, new energy technologies such as solar photovoltaic power generation technology and the like are widely paid attention to worldwide, and as a core component of a photovoltaic power generation system, the performance of a photovoltaic inverter is related to the power supply quality, the operation reliability and the power generation efficiency of the photovoltaic power generation system. Under partial application scenes, the internal circuit of the photovoltaic inverter is required to rectify signals, however, the existing signal rectification circuits mostly use dual-power operational amplifiers, the cost is high, and the unilateral protection function of output signals cannot be realized.
Disclosure of Invention
The utility model provides an improved rectifying and amplifying circuit of a photovoltaic inverter aiming at the technical problems.
In order to achieve the above purpose, the utility model adopts the following technical scheme:
a rectifying and amplifying circuit of a photovoltaic inverter, comprising:
a bias voltage terminal;
an input voltage terminal;
the first differential circuit is used for receiving the voltage signals of the bias voltage terminal and the input voltage terminal, outputting a first gain signal after being differentiated by the first single-power operational amplifier, wherein the inverting input end of the first single-power operational amplifier is connected with the bias voltage terminal, and the non-inverting input end of the first single-power operational amplifier is connected with the input voltage terminal;
the second differential circuit is used for receiving the voltage signals of the bias voltage terminal and the input voltage terminal, outputting a second gain signal after being subjected to differential operation by a second single-power operational amplifier, wherein the inverting input end of the second single-power operational amplifier is connected with the input voltage terminal, and the non-inverting input end of the second single-power operational amplifier is connected with the bias voltage terminal;
and an adder circuit having an input terminal connected to the output terminal of the first differential circuit and the output terminal of the second differential circuit, respectively, and a signal output terminal for outputting the target signal after rectifying the first gain signal and the second gain signal.
Preferably, the first differential circuit comprises a first differential resistor, a second differential resistor, a first filter circuit and a second filter circuit;
one end of the first differential resistor is connected with the bias voltage terminal, and the other end of the first differential resistor is connected with the inverting input end of the first single power supply operational amplifier;
one end of the second differential resistor is connected with the input voltage terminal, and the other end of the second differential resistor is connected with the non-inverting input end of the first single-power-supply operational amplifier;
one end of the first filter circuit is connected to a connection point of the first differential resistor and the inverting input end of the first single-power-supply operational amplifier, and the other end of the first filter circuit is connected to the output end of the first single-power-supply operational amplifier;
one end of the second filter circuit is connected to a connection point of the second differential resistor and the non-inverting input end of the first single-power-supply operational amplifier, and the other end of the second filter circuit is grounded.
Further, the first filter circuit comprises a first filter capacitor and a third differential resistor, and the first filter capacitor and the third differential resistor are connected in parallel; the second filter circuit comprises a second filter capacitor and a fourth differential resistor, and the second filter capacitor and the fourth differential resistor are connected in parallel.
Further, the resistance value of the first differential resistor is equal to the resistance value of the second differential resistor; the resistance value of the third differential resistor is equal to the resistance value of the fourth differential resistor; the capacitance value of the first filter capacitor is equal to the capacitance value of the second filter capacitor.
Preferably, the second differential circuit includes a fifth differential resistor, a sixth differential resistor, a third filter circuit, and a fourth filter circuit;
one end of the fifth differential resistor is connected with the input voltage terminal, and the other end of the fifth differential resistor is connected with the inverting input end of the second single power supply operational amplifier;
one end of the sixth differential resistor is connected with the bias voltage terminal, and the other end of the sixth differential resistor is connected with the non-inverting input end of the second single-power-supply operational amplifier;
one end of the third filter circuit is connected to a connection point of the fifth differential resistor and the inverting input end of the second single-power-supply operational amplifier, and the other end of the third filter circuit is connected to the output end of the second single-power-supply operational amplifier;
one end of the fourth filter circuit is connected to a connection point of the sixth differential resistor and the non-inverting input end of the second single-power-supply operational amplifier, and the other end of the fourth filter circuit is grounded.
Further, the third filter circuit comprises a third filter capacitor and a seventh differential resistor, and the third filter capacitor and the seventh differential resistor are connected in parallel; the fourth filter circuit comprises a fourth filter capacitor and an eighth differential resistor, and the fourth filter capacitor and the eighth differential resistor are connected in parallel.
Further, the resistance value of the fifth differential resistor is equal to the resistance value of the sixth differential resistor; the resistance value of the seventh differential resistor is equal to the resistance value of the eighth differential resistor; the capacitance value of the third filter capacitor is equal to the capacitance value of the fourth filter capacitor.
Further, the second differential circuit further includes a third single power supply operational amplifier, a non-inverting input terminal of the third single power supply operational amplifier is connected to a connection point of the input voltage terminal and the second differential resistor, an inverting input terminal of the third single power supply operational amplifier is connected to the fifth differential resistor, and an output terminal of the third single power supply operational amplifier is connected to the fifth differential resistor.
Preferably, the adder circuit includes a ninth differential resistor, a tenth differential resistor, a fourth single power supply operational amplifier, a fifth filter circuit, and a sixth filter circuit;
one end of the ninth differential resistor is connected with the output end of the first single-power-supply operational amplifier, and the other end of the ninth differential resistor is connected to a connection point of the tenth differential resistor and the reverse input end of the fourth single-power-supply operational amplifier;
one end of the tenth differential resistor is connected with the output end of the second single-power-supply operational amplifier, and the other end of the tenth differential resistor is connected with the reverse input end of the fourth single-power-supply operational amplifier;
one end of the fifth filter circuit is connected with the non-inverting input end of the fourth single-power-supply operational amplifier, and the other end of the fifth filter circuit is connected with the output end of the fourth single-power-supply operational amplifier;
one end of the sixth filter circuit is connected with the non-inverting input end of the fourth single-power-supply operational amplifier, and the other end of the sixth filter circuit is grounded.
Further, the fifth filter circuit comprises a fifth filter capacitor and a twelfth differential resistor, and the fifth filter capacitor and the twelfth differential resistor are connected in parallel; the sixth filter circuit comprises a sixth filter capacitor and an eleventh differential resistor, and the sixth filter capacitor and the eleventh differential resistor are connected in parallel; the capacitance value of the fifth filter capacitor is equal to the capacitance value of the sixth filter capacitor.
Compared with the prior art, the utility model has the following advantages:
according to the rectification amplifying circuit, voltage signals of the bias voltage terminal and the input voltage terminal pass through the first single-power-supply operational amplifier and the second single-power-supply operational amplifier respectively, signal rectification containing alternating current components is achieved, the rectified signals are added through the adder circuit, the original dual-power-supply operational amplifier is replaced, a negative power supply is omitted, cost is saved, precise rectification and amplification functions of the signals are achieved, compared with the input signals of the input voltage terminal, the target signals are rectified to be forward, and the unilateral protection function of the output signals is achieved.
Drawings
In order to more clearly illustrate the technical solutions of the present utility model, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present utility model, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is an equivalent circuit diagram of a rectifying and amplifying circuit according to an embodiment of the present utility model;
FIG. 2 is a simulated waveform diagram in an embodiment of the utility model;
wherein, 1, bias voltage terminal; 2. an input voltage terminal; 3. a first differential circuit; 31. a first single-supply operational amplifier; 32. a first differential resistor; 33. a second differential resistor; 34. a first filter circuit; 341. a first filter capacitor; 342. a third differential resistor; 35. a second filter circuit; 351. a second filter capacitor; 352. a fourth differential resistor; 4. a second differential circuit; 41. a second single-power operational amplifier; 42. a fifth differential resistor; 43. a sixth differential resistor; 44. a third filter circuit; 441. a third filter capacitor; 442. a seventh differential resistor; 45. a fourth filter circuit; 451. a fourth filter capacitor; 452. an eighth differential resistor; 46. a third single power supply operational amplifier; 5. an adder circuit; 51. a ninth differential resistor; 52. a tenth differential resistor; 53. a fourth single power supply operational amplifier; 54. a fifth filter circuit; 541. a fifth filter capacitor; 542. a twelfth differential resistor; 55. a sixth filter circuit; 551. a sixth filter capacitor; 552. and an eleventh differential resistor.
Detailed Description
Preferred embodiments of the present utility model will be described in detail below with reference to the attached drawings so that the advantages and features of the present utility model can be more easily understood by those skilled in the art. The description of these embodiments is provided to assist understanding of the present utility model, but is not intended to limit the present utility model. In addition, technical features of the embodiments of the present utility model described below may be combined with each other as long as they do not collide with each other.
As shown in fig. 1, the rectifying and amplifying circuit of the photovoltaic inverter in the present embodiment includes a bias voltage terminal 1, an input voltage terminal 2, a first differential circuit 3, a second differential circuit 4, and an adder circuit 5.
The following describes each component and its connection relation in detail:
the first differential circuit 3 is configured to receive the voltage signals of the bias voltage terminal 1 and the input voltage terminal 2, and output a first gain signal after differential by the first single power operational amplifier 31, where an inverting input terminal of the first single power operational amplifier 31 is connected to the bias voltage terminal 1, and a non-inverting input terminal of the first single power operational amplifier 31 is connected to the input voltage terminal 2. The first differential circuit 3 further includes a first differential resistor 32, a second differential resistor 33, a first filter circuit 34, and a second filter circuit 35. Specifically, one end of the first differential resistor 32 is connected to the bias voltage terminal 1, and the other end of the first differential resistor 32 is connected to the inverting input terminal of the first single power supply operational amplifier 31. One end of the second differential resistor 33 is connected to the input voltage terminal 2, and the other end of the second differential resistor 33 is connected to the non-inverting input terminal of the first single power operational amplifier 31.
One end of the first filter circuit 34 is connected to a connection point of the first differential resistor 32 and the inverting input terminal of the first single-power operational amplifier 31, and the other end of the first filter circuit 34 is connected to the output terminal of the first single-power operational amplifier 31. The first filter circuit 34 includes a first filter capacitor 341 and a third differential resistor 342, and the first filter capacitor 341 and the third differential resistor 342 are connected in parallel. One end of the second filter circuit 35 is connected to a connection point between the second differential resistor 33 and the non-inverting input terminal of the first single-power operational amplifier 31, and the other end of the second filter circuit 35 is grounded. The second filter circuit 35 includes a second filter capacitor 351 and a fourth differential resistor 352, and the second filter capacitor 351 and the fourth differential resistor 352 are connected in parallel.
The second differential circuit 4 is configured to receive the voltage signals of the bias voltage terminal 1 and the input voltage terminal 2, and output a second gain signal after differential by the second single-power operational amplifier 41, where an inverting input terminal of the second single-power operational amplifier 41 is connected to the input voltage terminal 2, and a non-inverting input terminal of the second single-power operational amplifier 41 is connected to the bias voltage terminal 1. The second differential circuit 4 further includes a fifth differential resistor 42, a sixth differential resistor 43, a third filter circuit 44, and a fourth filter circuit 45. Specifically, one end of the fifth differential resistor 42 is connected to the input voltage terminal 2, and the other end of the fifth differential resistor 42 is connected to the inverting input terminal of the second single power operational amplifier 41. One end of the sixth differential resistor 43 is connected to the bias voltage terminal 1, and the other end of the sixth differential resistor 43 is connected to the non-inverting input terminal of the second single power operational amplifier 41.
One end of the third filter circuit 44 is connected to a connection point of the fifth differential resistor 42 and the inverting input terminal of the second single-power operational amplifier 41, and the other end of the third filter circuit 44 is connected to the output terminal of the second single-power operational amplifier 41. The third filter circuit 44 includes a third filter capacitor 441 and a seventh differential resistor 442, and the third filter capacitor 441 and the seventh differential resistor 442 are connected in parallel. One end of the fourth filter circuit 45 is connected to a connection point of the sixth differential resistor 43 and the non-inverting input terminal of the second single power supply operational amplifier 41, and the other end of the fourth filter circuit 45 is grounded. The fourth filter circuit 45 includes a fourth filter capacitor 451 and an eighth differential resistor 452, and the fourth filter capacitor 451 and the eighth differential resistor 452 are connected in parallel.
The second differential circuit 4 further includes a third single-power operational amplifier 46, the non-inverting input terminal of the third single-power operational amplifier 46 is connected to the connection point of the input voltage terminal 2 and the second differential resistor 33, the inverting input terminal of the third single-power operational amplifier 46 is connected to the fifth differential resistor 42, and the output terminal of the third single-power operational amplifier 46 is connected to the fifth differential resistor 42. In other embodiments, the rectifying and amplifying circuit may not be provided with the third single-power operational amplifier 46, and in this embodiment, the third single-power operational amplifier 46 is preferably provided, which may function as a voltage follower, and reduce the coherence of the signal of the input voltage terminal 2 in the first differential circuit 3 and the second differential circuit 4.
The adder circuit 5 has input terminals connected to the output terminal of the first differential circuit 3 and the output terminal of the second differential circuit 4, respectively, and a signal output terminal for outputting the target signal after rectifying the first gain signal and the second gain signal. Specifically, the adder circuit 5 includes a ninth differential resistor 51, a tenth differential resistor 52, a fourth single power supply operational amplifier 53, a fifth filter circuit 54, and a sixth filter circuit 55. One end of the ninth differential resistor 51 is connected to the output terminal of the first single-power operational amplifier 31, and the other end of the ninth differential resistor 51 is connected to a connection point of the tenth differential resistor 52 and the inverting input terminal of the fourth single-power operational amplifier 53. One end of the tenth differential resistor 52 is connected to the output terminal of the second single power supply operational amplifier 41, and the other end of the tenth differential resistor 52 is connected to the inverting input terminal of the fourth single power supply operational amplifier 53.
One end of the fifth filter circuit 54 is connected to the non-inverting input terminal of the fourth single-power operational amplifier 53, and the other end of the fifth filter circuit 54 is connected to the output terminal of the fourth single-power operational amplifier 53. The fifth filter circuit 54 includes a fifth filter capacitor 541 and a twelfth differential resistor 542, and the fifth filter capacitor 541 and the twelfth differential resistor 542 are connected in parallel. One end of the sixth filter circuit 55 is connected to the non-inverting input terminal of the fourth single power operational amplifier 53, and the other end of the sixth filter circuit 55 is grounded. The sixth filter circuit 55 includes a sixth filter capacitor 551 and an eleventh differential resistor 552, and the sixth filter capacitor 551 and the eleventh differential resistor 552 are connected in parallel.
For simplicity of description, the first differential resistor is denoted by R1, the second differential resistor is denoted by R2 …, and so on; the first filter capacitance is denoted by C1, the second filter capacitance by C2 by … and so on; the bias voltage terminal is denoted by Vref, the input voltage terminal is denoted by Vin, vo1 is the voltage output by the output terminal of the first differential circuit, and Vo2 is the voltage output by the output terminal of the second differential circuit. In this embodiment, the resistances and the resistance values have the following relationships: r1=r2, r3=r4, r5=r6, and r7=r8. The capacitance values of the capacitors have the following relationship: c1 =c2, c3=c4, c5=c6. When Vin > Vref, vo1=vref+ (Vin-Vref) R3/R1, vo2=0; when Vin < Vref, vo2=vref+ (Vin-Vref) R7/R5, vo1=0. Therefore, the adder circuit adds and amplifies two paths of signals Vo1 and Vo2, the output target signals are above zero, the precise rectification and amplification functions of the signals are realized, and the rectified output signals can also be used for sampling protection for an MCU or a later-stage circuit.
As shown in fig. 2, fig. 2 is a waveform diagram of signal simulation, and Vin, vout, vo and Vo2 are distinguished by color shades. Taking Vin as an example, which is clamped at 1.5V and contains a sinusoidal alternating component, two paths of signals Vo1 and Vo2 are added by the adder circuit 5 to obtain Vout. It can be seen that the waveform of the input signal Vin has forward and backward waves, while the output target signal Vout has only forward waves, and the backward voltage signal is rectified to forward, so that the unilateral protection function of the output signal is realized, and the signal amplification function is also realized.
In summary, in the rectifying and amplifying circuit, the voltage signals of the bias voltage terminal and the input voltage terminal pass through the first single-power operational amplifier and the second single-power operational amplifier respectively, so that signal rectification containing alternating current components is realized, the rectified signals are added through the adder circuit, the original dual-power operational amplifier is replaced, a negative power supply is omitted, the cost is saved, the precise rectifying and amplifying functions of the signals are realized, the target signals are rectified to be forward compared with the input signals of the input voltage terminal, and the unilateral protection function of the output signals is realized.
As used in this specification and in the claims, the terms "comprises" and "comprising" merely indicate that the steps and elements are explicitly identified, and do not constitute an exclusive list, as other steps or elements may be included in a method or apparatus. The term "and/or" as used herein includes any combination of one or more of the associated listed items.
It should be noted that, unless otherwise specified, when a feature is referred to as being "fixed" or "connected" to another feature, it may be directly or indirectly fixed or connected to the other feature. Further, the descriptions of the upper, lower, left, right, etc. used in the present utility model are merely with respect to the mutual positional relationship of the constituent elements of the present utility model in the drawings.
The above-described embodiments are provided for illustrating the technical concept and features of the present utility model, and are intended to be preferred embodiments for those skilled in the art to understand the present utility model and implement the same according to the present utility model, not to limit the scope of the present utility model. All equivalent changes or modifications made according to the principles of the present utility model should be construed to be included within the scope of the present utility model.
Claims (10)
1. A rectifying and amplifying circuit of a photovoltaic inverter, comprising:
a bias voltage terminal;
an input voltage terminal;
the first differential circuit is used for receiving the voltage signals of the bias voltage terminal and the input voltage terminal, outputting a first gain signal after being differentiated by the first single-power operational amplifier, wherein the inverting input end of the first single-power operational amplifier is connected with the bias voltage terminal, and the non-inverting input end of the first single-power operational amplifier is connected with the input voltage terminal;
the second differential circuit is used for receiving the voltage signals of the bias voltage terminal and the input voltage terminal, outputting a second gain signal after being subjected to differential operation by a second single-power operational amplifier, wherein the inverting input end of the second single-power operational amplifier is connected with the input voltage terminal, and the non-inverting input end of the second single-power operational amplifier is connected with the bias voltage terminal;
and an adder circuit having an input terminal connected to the output terminal of the first differential circuit and the output terminal of the second differential circuit, respectively, and a signal output terminal for outputting the target signal after rectifying the first gain signal and the second gain signal.
2. The rectifier-amplifier circuit of claim 1, wherein the first differential circuit comprises a first differential resistor, a second differential resistor, a first filter circuit, and a second filter circuit;
one end of the first differential resistor is connected with the bias voltage terminal, and the other end of the first differential resistor is connected with the inverting input end of the first single power supply operational amplifier;
one end of the second differential resistor is connected with the input voltage terminal, and the other end of the second differential resistor is connected with the non-inverting input end of the first single-power-supply operational amplifier;
one end of the first filter circuit is connected to a connection point of the first differential resistor and the inverting input end of the first single-power-supply operational amplifier, and the other end of the first filter circuit is connected to the output end of the first single-power-supply operational amplifier;
one end of the second filter circuit is connected to a connection point of the second differential resistor and the non-inverting input end of the first single-power-supply operational amplifier, and the other end of the second filter circuit is grounded.
3. The rectifying and amplifying circuit of a photovoltaic inverter according to claim 2, wherein the first filter circuit comprises a first filter capacitor and a third differential resistor, the first filter capacitor and the third differential resistor being connected in parallel; the second filter circuit comprises a second filter capacitor and a fourth differential resistor, and the second filter capacitor and the fourth differential resistor are connected in parallel.
4. The rectifying and amplifying circuit of a photovoltaic inverter according to claim 3, wherein a resistance value of said first differential resistor is equal to a resistance value of said second differential resistor; the resistance value of the third differential resistor is equal to the resistance value of the fourth differential resistor; the capacitance value of the first filter capacitor is equal to the capacitance value of the second filter capacitor.
5. The rectifier-amplifier circuit of a photovoltaic inverter according to claim 2, wherein the second differential circuit includes a fifth differential resistor, a sixth differential resistor, a third filter circuit, and a fourth filter circuit;
one end of the fifth differential resistor is connected with the input voltage terminal, and the other end of the fifth differential resistor is connected with the inverting input end of the second single power supply operational amplifier;
one end of the sixth differential resistor is connected with the bias voltage terminal, and the other end of the sixth differential resistor is connected with the non-inverting input end of the second single-power-supply operational amplifier;
one end of the third filter circuit is connected to a connection point of the fifth differential resistor and the inverting input end of the second single-power-supply operational amplifier, and the other end of the third filter circuit is connected to the output end of the second single-power-supply operational amplifier;
one end of the fourth filter circuit is connected to a connection point of the sixth differential resistor and the non-inverting input end of the second single-power-supply operational amplifier, and the other end of the fourth filter circuit is grounded.
6. The rectifier-amplifier circuit of a photovoltaic inverter according to claim 5, wherein the third filter circuit includes a third filter capacitor and a seventh differential resistor, the third filter capacitor and the seventh differential resistor being connected in parallel; the fourth filter circuit comprises a fourth filter capacitor and an eighth differential resistor, and the fourth filter capacitor and the eighth differential resistor are connected in parallel.
7. The rectifying and amplifying circuit of a photovoltaic inverter according to claim 6, wherein a resistance value of the fifth differential resistor is equal to a resistance value of the sixth differential resistor; the resistance value of the seventh differential resistor is equal to the resistance value of the eighth differential resistor; the capacitance value of the third filter capacitor is equal to the capacitance value of the fourth filter capacitor.
8. The rectifier amplifier circuit of claim 5, wherein the second differential circuit further comprises a third single power supply operational amplifier, the non-inverting input of the third single power supply operational amplifier being connected to the connection point of the input voltage terminal and the second differential resistor, the inverting input of the third single power supply operational amplifier being connected to the fifth differential resistor, the output of the third single power supply operational amplifier being connected to the fifth differential resistor.
9. The rectifying and amplifying circuit of a photovoltaic inverter according to claim 1, wherein the adder circuit includes a ninth differential resistor, a tenth differential resistor, a fourth single power supply operational amplifier, a fifth filter circuit, and a sixth filter circuit;
one end of the ninth differential resistor is connected with the output end of the first single-power-supply operational amplifier, and the other end of the ninth differential resistor is connected to a connection point of the tenth differential resistor and the reverse input end of the fourth single-power-supply operational amplifier;
one end of the tenth differential resistor is connected with the output end of the second single-power-supply operational amplifier, and the other end of the tenth differential resistor is connected with the reverse input end of the fourth single-power-supply operational amplifier;
one end of the fifth filter circuit is connected with the non-inverting input end of the fourth single-power-supply operational amplifier, and the other end of the fifth filter circuit is connected with the output end of the fourth single-power-supply operational amplifier;
one end of the sixth filter circuit is connected with the non-inverting input end of the fourth single-power-supply operational amplifier, and the other end of the sixth filter circuit is grounded.
10. The rectifier-amplifier circuit of claim 9, wherein the fifth filter circuit includes a fifth filter capacitor and a twelfth differential resistor, the fifth filter capacitor and the twelfth differential resistor being connected in parallel; the sixth filter circuit comprises a sixth filter capacitor and an eleventh differential resistor, and the sixth filter capacitor and the eleventh differential resistor are connected in parallel; the capacitance value of the fifth filter capacitor is equal to the capacitance value of the sixth filter capacitor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320143593.1U CN219833987U (en) | 2023-01-16 | 2023-01-16 | Rectifying and amplifying circuit of photovoltaic inverter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320143593.1U CN219833987U (en) | 2023-01-16 | 2023-01-16 | Rectifying and amplifying circuit of photovoltaic inverter |
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| CN219833987U true CN219833987U (en) | 2023-10-13 |
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| CN202320143593.1U Active CN219833987U (en) | 2023-01-16 | 2023-01-16 | Rectifying and amplifying circuit of photovoltaic inverter |
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| Country | Link |
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| CN (1) | CN219833987U (en) |
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2023
- 2023-01-16 CN CN202320143593.1U patent/CN219833987U/en active Active
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