CN113156186B - Pulse current sampling circuit based on CT sampling - Google Patents
Pulse current sampling circuit based on CT sampling Download PDFInfo
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Abstract
The application discloses a pulse current sampling circuit based on CT sampling, which comprises a CT sampling circuit and a signal conditioning circuit; the CT sampling circuit comprises a current transformer CT, a first resistor R1, a second resistor R2, a diode Q1 and a sixth capacitor C6; the signal conditioning circuit comprises a first operational amplifier U1, a second operational amplifier C2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a first capacitor C1, a second capacitor C2, a third capacitor C3 and a fourth capacitor C4. The application improves the sampling accuracy of the narrow pulse current with lower device cost, reduces the common mode interference voltage of the sampling signal, optimizes the sampling bandwidth of the sampling conditioning loop, and has good application value.
Description
Technical Field
The application relates to the technical field of power electronics, in particular to a pulse current sampling circuit based on CT sampling.
Background
In a power electronic system, a CT (Current Transformer ) is a device for converting a primary side large current into a secondary side small current according to an electromagnetic induction principle to measure, and is increasingly favored by people due to the characteristics of low cost, high precision and quick response.
Currently, CT is relatively suitable for sampling pulse signals because it requires magnetic reset. In some special application occasions or special working states, the power electronic circuit system has a narrow pulse voltage or current of hundred nanoseconds, the common sampling conditioning circuit has the problems of slow response and low accuracy for the precision of sampling the narrow pulse current of hundred nanoseconds, the loop control performance of the power supply circuit is affected, and in addition, the common mode interference voltage of a current sampling signal in a higher electromagnetic interference environment also affects the normal operation of an operational amplifier in the sampling conditioning circuit.
Therefore, there is a need to provide a new sampling conditioning circuit to solve the above technical problems.
Disclosure of Invention
The application provides a pulse current sampling circuit based on CT sampling, which aims to solve the defects in the prior art.
In order to achieve the above object, the present application provides the following technical solutions:
a pulse current sampling circuit based on CT sampling comprises a CT sampling circuit and a signal conditioning circuit; wherein,,
the CT sampling circuit comprises a current transformer CT, a first resistor R1, a second resistor R2, a diode Q1 and a sixth capacitor C6; the signal conditioning circuit comprises a first operational amplifier U1, a second operational amplifier C2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a first capacitor C1, a second capacitor C2, a third capacitor C3 and a fourth capacitor C4;
the primary side of the current transformer CT is connected in series in a sampled circuit, the homonymous end of the secondary side of the current transformer CT is connected with the non-inverting input end of the first operational amplifier U1, and the heteronymous end of the secondary side of the current transformer CT is connected with the inverting input end of the first operational amplifier U1 and is connected with the power supply ground;
the two ends of the first resistor R1 are respectively connected with the homonymous end and the heteronymous end of the secondary side of the current transformer CT; one end of the second resistor R2 and one end of the sixth capacitor C6 are respectively connected with the homonymous end of the secondary side of the current transformer CT through the diode Q1, and the other end of the second resistor R2 and the other end of the sixth capacitor C6 are respectively connected with the heteronymous end of the secondary side of the current transformer CT; the anode of the diode Q1 is connected with the homonymous end of the secondary side of the current transformer CT, and the cathode of the diode Q1 is connected with the non-inverting input end of the first operational amplifier U1; the fourth resistor R4 is connected in series between the synonym end of the secondary side of the current transformer CT and the inverting input end of the first operational amplifier U1;
the third resistor R3 is connected in parallel with the first capacitor C1 and then connected in series between the non-inverting input end of the first operational amplifier U1 and a first reference voltage; one end of the fifth resistor R5 is connected with the inverting input end of the first operational amplifier U1 after being connected with the second capacitor C2 in parallel, and the other end of the fifth resistor R5 is connected with the output end of the first operational amplifier U1; the sixth resistor R6 is connected in series between the output end of the first operational amplifier U1 and the inverting input end of the second operational amplifier U2;
the seventh resistor R7 is connected in parallel with the third capacitor C3 and then connected in series between the non-inverting input end of the second operational amplifier U2 and a second reference voltage; one end of the eighth resistor R8 is connected with the inverting input end of the second operational amplifier U2 after being connected with the fourth capacitor C4 in parallel, and the other end of the eighth resistor R8 is connected with the output end of the second operational amplifier U2; the ninth resistor R9 is connected in series to the output terminal of the second operational amplifier U2.
Further, the pulse current sampling circuit based on CT sampling further comprises an analog-to-digital converter ADC sampling front end;
the sampling front end of the analog-to-digital converter ADC comprises a tenth resistor R10, a fifth capacitor C5 and a sampling switch SW1;
one end of the tenth resistor R10 is connected with the ninth resistor R9, and the other end of the tenth resistor R is connected with one end of the fifth capacitor C5;
the other end of the fifth capacitor C5 is grounded.
The sampling switch SW1 is connected between the ninth resistor R9 and the tenth resistor R10.
Further, in the pulse current sampling circuit based on CT sampling, the cut-off frequency of the RC filter circuit formed by the second capacitor C2 and the fifth resistor R5 is 1/2 pi R5C2.
Further, in the pulse current sampling circuit based on CT sampling, the diode Q1 is a fast recovery diode.
Further, in the pulse current sampling circuit based on CT sampling, the conversion relationship between the primary side and the secondary side of the current transformer CT is:
U R2 ＝ip×R2/N；
wherein U is R2 The voltage of the second resistor R2, ip is the current of the sampled circuit, and N is the current transformation ratio of the current transformer CT.
Further, in the pulse current sampling circuit based on CT sampling, the sixth capacitor is a nanofarad capacitor.
Further, in the pulse current sampling circuit based on CT sampling, the first resistor is a reset resistor.
The pulse current sampling circuit based on CT sampling provided by the embodiment of the application improves the sampling accuracy of narrow pulse current with lower device cost, reduces the common-mode interference voltage of a sampling signal, optimizes the sampling bandwidth of a sampling conditioning loop and has good application value.
Drawings
In order to more clearly illustrate the embodiments of the application or the technical solutions of the prior art, the drawings which are used in the description of the embodiments or the prior art will be briefly described, it being obvious that the drawings in the description below are only some embodiments of the application, and that other drawings can be obtained from these drawings without inventive faculty for a person skilled in the art.
Fig. 1 is a schematic circuit diagram of a pulse current sampling circuit based on CT sampling according to a first embodiment of the present application;
fig. 2 is a schematic circuit diagram of a PFC circuit according to a first embodiment of the present application.
Detailed Description
In order to make the objects, features and advantages of the present application more obvious and understandable, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is apparent that the embodiments described below are only some embodiments of the present application, not all embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
In the description of the present application, it will be understood that when one component is referred to as being "connected" to another component, it can be directly connected to the other component or intervening components may also be present. When an element is referred to as being "disposed on" another element, it can be directly on the other element or intervening elements may also be present.
Furthermore, the terms "long," "short," "inner," "outer," and the like, as used herein, refer to an orientation or positional relationship based on that shown in the drawings, for convenience of description of the present application, and are not intended to indicate or imply that the apparatus or elements referred to must have this particular orientation, operate in a particular orientation configuration, and thus should not be construed as limiting the application.
The technical scheme of the application is further described below by the specific embodiments with reference to the accompanying drawings.
Example 1
In view of the above-mentioned drawbacks of the conventional sampling conditioning circuit, the present inventors have actively studied and innovated based on the fact that the design and manufacture of such products have been performed for many years and in combination with the application of the theory, so as to hope to create a technology capable of solving the drawbacks of the prior art, so that the sampling conditioning circuit has more practicability. After continuous research and design and repeated sample test and improvement, the application with practical value is finally created.
Referring to fig. 1, an embodiment of the present application provides a pulse current sampling circuit based on CT sampling, including a CT sampling circuit and a signal conditioning circuit; wherein,,
the CT sampling circuit comprises a current transformer CT, a first resistor R1, a second resistor R2, a diode Q1 and a sixth capacitor C6; the signal conditioning circuit comprises a first operational amplifier U1, a second operational amplifier C2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a first capacitor C1, a second capacitor C2, a third capacitor C3 and a fourth capacitor C4;
the primary side of the current transformer CT is connected in series in a sampled circuit, the homonymous end of the secondary side of the current transformer CT is connected with the non-inverting input end of the first operational amplifier U1, and the heteronymous end of the secondary side of the current transformer CT is connected with the inverting input end of the first operational amplifier U1 and is connected with the power supply ground;
the two ends of the first resistor R1 are respectively connected with the homonymous end and the heteronymous end of the secondary side of the current transformer CT; one end of the second resistor R2 and one end of the sixth capacitor C6 are respectively connected with the homonymous end of the secondary side of the current transformer CT through the diode Q1, and the other end of the second resistor R2 and the other end of the sixth capacitor C6 are respectively connected with the heteronymous end of the secondary side of the current transformer CT; the anode of the diode Q1 is connected with the homonymous end of the secondary side of the current transformer CT, and the cathode of the diode Q1 is connected with the non-inverting input end of the first operational amplifier U1; the fourth resistor R4 is connected in series between the synonym end of the secondary side of the current transformer CT and the inverting input end of the first operational amplifier U1;
the third resistor R3 is connected in parallel with the first capacitor C1 and then connected in series between the non-inverting input end of the first operational amplifier U1 and a first reference voltage; one end of the fifth resistor R5 is connected with the inverting input end of the first operational amplifier U1 after being connected with the second capacitor C2 in parallel, and the other end of the fifth resistor R5 is connected with the output end of the first operational amplifier U1; the sixth resistor R6 is connected in series between the output end of the first operational amplifier U1 and the inverting input end of the second operational amplifier U2;
the seventh resistor R7 is connected in parallel with the third capacitor C3 and then connected in series between the non-inverting input end of the second operational amplifier U2 and a second reference voltage; one end of the eighth resistor R8 is connected with the inverting input end of the second operational amplifier U2 after being connected with the fourth capacitor C4 in parallel, and the other end of the eighth resistor R8 is connected with the output end of the second operational amplifier U2; the ninth resistor R9 is connected in series to the output terminal of the second operational amplifier U2.
In this embodiment, the pulse current sampling circuit based on CT sampling further includes an analog-to-digital converter ADC sampling front end;
the sampling front end of the analog-to-digital converter ADC comprises a tenth resistor R10, a fifth capacitor C5 and a sampling switch SW1;
one end of the tenth resistor R10 is connected with the ninth resistor R9, and the other end of the tenth resistor R is connected with one end of the fifth capacitor C5;
the other end of the fifth capacitor C5 is grounded.
The sampling switch SW1 is connected between the ninth resistor R9 and the tenth resistor R10.
As shown in fig. 1, the current transformer CT is used as a front end of sampling, and is used for collecting pulse current flowing through a power switch device in a sampled circuit. The secondary side of the current transformer CT is a magnetic reset circuit and a current-voltage conversion circuit, the first resistor R1 is a reset resistor and is used for consuming exciting current of the current transformer CT in the period that no current is generated on the primary side of the current transformer CT, and the diode Q1 is used for ensuring that the magnetic reset current only passes through the first resistor R1 and does not pass through other devices in the magnetic reset period. The second resistor R2 converts the current of the secondary side corresponding to the time period when the current ip exists on the primary side of the current transformer CT into a voltage signal, and the conversion relationship between the primary side and the secondary side of the current transformer CT is as follows:
U R2 ＝ip×R2/N；
wherein U is R2 The voltage of the second resistor R2, ip is the current of the sampled circuit, and N is the current transformation ratio of the current transformer CT.
The operational amplifier U1 is used for proportionally amplifying an output signal of the current transformer CT and adding R5/R4 times of a first reference voltage Vref1, the second capacitor C2 is a filter capacitor, the cut-off frequency of an RC filter circuit formed by the second capacitor C2 and the fifth resistor R5 is 1/2 pi R5C2, the operational amplifier U2 is used for inverting the output voltage of the operational amplifier U1 and adding R8/R6 times of a second reference voltage Vref2, and the output voltage of the second operational amplifier U2 is input through a ninth resistor R9 to reach the front end of ADC sampling. The fifth capacitor C5 inside the analog-to-digital converter ADC is charged by a voltage, and the analog-to-digital converter ADC converts the voltage of the fifth capacitor C5 into a digital signal.
It should be noted that, because the diode has a junction capacitance, in the case of detecting the fast narrow pulse signal, the embodiment needs to select the diode Q1 as a fast recovery diode with a low junction capacitance, so as to reduce the voltage rise time of the diode conducting device and improve the response speed of the sampling circuit;
in the circuit with rapid change of voltage and current, there is very high common-mode interference voltage, if the secondary side of the current transformer CT adopts a differential sampling mode to sample, there is very high common-mode voltage, once the common-mode voltage exceeds the maximum common-mode voltage which can be born by the subsequent operational amplifier, serious distortion of signals is caused, and loop control of a power supply system is affected. The capacitor with a large capacitance is needed for filtering common-mode interference signals, which greatly affects the rising time of sampling signals, and particularly for narrow pulse signals, signal distortion is easy to occur. The design is that the common mode interference signal is converted into a differential mode signal and returns through the power supply, noise does not pass through an operational amplifier, and meanwhile, the influence on the rising rate of the pulse signal is reduced;
the rising time of the narrow pulse is very fast, the conditioning filter circuit and the operational amplifier are required to have matched cut-off frequency and bandwidth, if the bandwidth is too large, the signal will have overshoot phenomenon and high-frequency noise, and if the bandwidth is too small, the sampling signal will be distorted. In this embodiment, the time constant corresponding to the filter cut-off frequency is required to be at least less than one third of the pulse width time, and in addition, the slew rate of the operational amplifier needs to be ensured to meet the output requirement of the signal, that is, the output voltage of the operational amplifier can reach the actual voltage in the required shortest time.
The sampling of a common ADC generally realizes voltage sampling by charging a capacitor in the ADC, and because the capacitor charging time is related to charging current which is limited by the resistance of the front end of the capacitor, the cut-off frequency of an RC filter circuit formed by the resistance of the front end of the sampling, the internal resistance and the sampling capacitor needs to be calculated when collecting narrow pulses, the design method is required to ensure that the rising time corresponding to the cut-off frequency which is 3 times of the RC circuit of the front end of the ADC is less than the minimum required pulse width time, and the matching resistance of the front end of the ADC is obtained according to the cut-off frequency and the sampling capacitor and the resistance in the ADC;
through the above, when the current transformer CT collects the narrow pulse current signal, the high signal response speed can be kept in each serial circuit link of the signal later stage, and finally, the MCU (micro controller) can obtain the accurate narrow pulse signal, and the design method of the characteristic 2 can ensure that the circuit has high anti-interference capability and ensures good signal quality. The circuit design method is mainly used for sampling the power electronic power circuit signals.
For the case of sampling a narrow pulse current of hundred nanoseconds in this embodiment, reference may be made to fig. 2, fig. 2 is a classical PFC (Power Factor Correction ) circuit, the input of the circuit is ac, the input is rectified into dc voltage through uncontrolled rectification by diodes D1, D2, D3, D4, the rectified voltage is a PFC circuit, and the DSP control board controls the current and output voltage of L1 by controlling a power switch Q11, so that the power supply has a higher power factor. The relationship satisfied by the input voltage Uo and the output voltage Urec of the PFC circuit is as follows:
uo=urec/(1-D), D being the duty cycle of Q11;
the working principle of the circuit of fig. 2 is: when Q11 is on, the rectified voltage is applied to the inductor L1, the inductor current gradually increases, the diode D4 is reversely cut off, the capacitor C12 discharges the load R11, and the capacitor voltage is reduced. When Q11 is off, diode D4 is on, the inductor current is switched to diode D4, the current flows through capacitor C12 and load R11, and the capacitor voltage gradually increases.
When the embodiment is applied to the circuit shown in fig. 2, the situation that a narrow pulse width signal appears in Q1 under the condition of high input voltage is mainly solved, when the output voltage is unchanged and the input voltage gradually rises, the duty ratio D of Q11 can be known to gradually decrease according to the relation that the input voltage Uo and the output voltage Urec of the PFC circuit meet, for example, when the input ac line voltage is 435V, the output voltage is 440V, and the switching frequency is 50kHz, the theoretical calculated pulse width of Q11 is only 274ns. In this case, the pulse current sampling circuit based on CT sampling provided in the present embodiment is suitably employed.
In this embodiment, the current of the power switch Q11 branch is sampled by the pulse current sampling circuit based on CT sampling, which is designed in this embodiment, and the control system requires that the peak value of the sampled signal with 274ns pulse width is not distorted, so at least the voltage signal collected by the ADC sampling capacitor is required to rise to the maximum value within 274ns. The filter time constant of the RC circuit of the front stage is required to be smaller than 91ns which is the rise time of one third, the corresponding cut-off frequency is 1.749MHz, the bandwidth of the front-stage operational amplifier under the corresponding gain is required to be larger than 1.749MHz, and the slew rate of the operational amplifier is required to be ensured to meet the requirement. For example, when the transformation ratio of CT is 100:1, primary side current 30A, secondary side converting resistor 10Ω, when the operational amplifier scaling factor is 1, the output voltage variation amplitude of the operational amplifier is 3V, and the slew rate of the operational amplifier is required to be at least 10.9V/us.
The pulse current sampling circuit based on CT sampling provided by the embodiment of the application improves the sampling accuracy of narrow pulse current with lower device cost, has good cost advantage, exerts the advantages of respective devices to a great extent, can enable pulse current signals with the time length of 274ns or more of CT sampling to have higher accuracy, reduces common-mode interference voltage of sampling signals, optimizes the sampling bandwidth of a sampling conditioning loop, provides a basis for good control, and has good application value.
The description of the foregoing embodiments has been provided for the purposes of illustration and description. It is not intended to be exhaustive or to limit the disclosure. Individual elements or features of a particular embodiment are generally not limited to the particular embodiment, but, where applicable, may be interchanged and used with the selected embodiment even if not specifically shown or described. The same elements or features may also be varied in many ways. Such variations are not to be regarded as a departure from the disclosure, and all such modifications are intended to be included within the scope of the disclosure.
Example embodiments are provided so that this disclosure will be thorough, and will fully convey the scope to those skilled in the art. Numerous details are set forth, such as examples of specific parts, devices, and methods, in order to provide a thorough understanding of embodiments of the present disclosure. It will be apparent to one skilled in the art that the exemplary embodiments may be embodied in many different forms without the use of specific details, and neither should be construed to limit the scope of the disclosure. In certain example embodiments, well-known processes, well-known device structures, and well-known techniques are not described in detail.
The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. The terms "comprises" and "comprising" are inclusive and, therefore, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. The method steps, processes, and operations described herein are not to be construed as necessarily requiring their performance in the particular order discussed and illustrated, unless specifically indicated. It should also be appreciated that additional or alternative steps may be employed.
When an element or layer is referred to as being "on," "engaged with," "connected to" or "coupled to" another element or layer, it can be directly on, engaged with, connected to or coupled to the other element or layer, or intervening elements or layers may also be present. In contrast, when an element or layer is referred to as being "directly on" … …, "" directly engaged with "… …," "directly connected to" or "directly coupled to" another element or layer, there may be no intervening elements or layers present. Other words used to describe the relationship of elements should be interpreted in a similar manner (e.g., "between … …" and "directly between … …", "adjacent" and "directly adjacent", etc.). The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items. Although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms may be only used to distinguish one element, component, region or section from another element, component, region or section. Unless clearly indicated by the context, terms such as the terms "first," "second," and other numerical values are used herein to not imply a sequence or order. Accordingly, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the example embodiments.
Spatially relative terms, such as "inner," "outer," "below," "beneath," "lower," "above," "upper" and the like, may be used herein for ease of description to describe one element or feature's relationship to another element or feature's illustrated in the figures. Spatially relative terms may be intended to encompass different orientations of the device in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the example term "below" … … can encompass both upward and downward orientations. The device may be otherwise oriented (rotated 90 degrees or otherwise) and interpreted in the relative description of the space herein.
Claims (7)
1. The pulse current sampling circuit based on CT sampling is characterized by comprising a CT sampling circuit and a signal conditioning circuit; wherein,,
the CT sampling circuit comprises a current transformer CT, a first resistor R1, a second resistor R2, a diode Q1 and a sixth capacitor C6; the signal conditioning circuit comprises a first operational amplifier U1, a second operational amplifier C2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a first capacitor C1, a second capacitor C2, a third capacitor C3 and a fourth capacitor C4;
the primary side of the current transformer CT is connected in series in a sampled circuit, the homonymous end of the secondary side of the current transformer CT is connected with the non-inverting input end of the first operational amplifier U1, and the heteronymous end of the secondary side of the current transformer CT is connected with the inverting input end of the first operational amplifier U1 and is connected with the power supply ground;
the two ends of the first resistor R1 are respectively connected with the homonymous end and the heteronymous end of the secondary side of the current transformer CT; one end of the second resistor R2 and one end of the sixth capacitor C6 are respectively connected with the homonymous end of the secondary side of the current transformer CT through the diode Q1, and the other end of the second resistor R2 and the other end of the sixth capacitor C6 are respectively connected with the heteronymous end of the secondary side of the current transformer CT; the anode of the diode Q1 is connected with the homonymous end of the secondary side of the current transformer CT, and the cathode of the diode Q1 is connected with the non-inverting input end of the first operational amplifier U1; the fourth resistor R4 is connected in series between the synonym end of the secondary side of the current transformer CT and the inverting input end of the first operational amplifier U1;
the third resistor R3 is connected in parallel with the first capacitor C1 and then connected in series between the non-inverting input end of the first operational amplifier U1 and a first reference voltage; one end of the fifth resistor R5 is connected with the inverting input end of the first operational amplifier U1 after being connected with the second capacitor C2 in parallel, and the other end of the fifth resistor R5 is connected with the output end of the first operational amplifier U1; the sixth resistor R6 is connected in series between the output end of the first operational amplifier U1 and the inverting input end of the second operational amplifier U2;
the seventh resistor R7 is connected in parallel with the third capacitor C3 and then connected in series between the non-inverting input end of the second operational amplifier U2 and a second reference voltage; one end of the eighth resistor R8 is connected with the inverting input end of the second operational amplifier U2 after being connected with the fourth capacitor C4 in parallel, and the other end of the eighth resistor R8 is connected with the output end of the second operational amplifier U2; the ninth resistor R9 is connected in series to the output terminal of the second operational amplifier U2.
2. The CT sampling-based pulse current sampling circuit of claim 1, further comprising an analog-to-digital converter ADC sampling front-end;
the sampling front end of the analog-to-digital converter ADC comprises a tenth resistor R10, a fifth capacitor C5 and a sampling switch SW1;
one end of the tenth resistor R10 is connected with the ninth resistor R9, and the other end of the tenth resistor R is connected with one end of the fifth capacitor C5;
the other end of the fifth capacitor C5 is grounded;
the sampling switch SW1 is connected between the ninth resistor R9 and the tenth resistor R10.
3. The pulse current sampling circuit based on CT sampling according to claim 1, wherein the cut-off frequency of the RC filter circuit composed of the second capacitor C2 and the fifth resistor R5 is 1/2 pi R5C2.
4. The CT sampling-based pulse current sampling circuit of claim 1, wherein the diode Q1 is a fast recovery diode.
5. The pulse current sampling circuit based on CT sampling according to claim 1, wherein the conversion relationship between the primary side and the secondary side of the current transformer CT is:
U R2 ＝ip×R2/N；
wherein U is R2 The voltage of the second resistor R2, ip is the current of the sampled circuit, and N is the current transformation ratio of the current transformer CT.
6. The CT sampling based pulse current sampling circuit of claim 1 wherein the sixth capacitance is a nanofarad-level capacitance.
7. The CT sampling based pulse current sampling circuit of claim 1 wherein the first resistor is a reset resistor.
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| CN110022065A (en) * | 2019-05-16 | 2019-07-16 | 池州学院 | A kind of single-phase grid-connected photovoltaic power generation system |
| CN110082700A (en) * | 2019-05-13 | 2019-08-02 | 国网天津市电力公司电力科学研究院 | A kind of electric energy meter measurement error on-line monitoring circuit and method based on CT sampling |
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| US20120153934A1 (en) * | 2010-12-16 | 2012-06-21 | Hubei Shengjia Electric Apparatus Co., Ltd. | Voltage and current sampling device |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107271763A (en) * | 2017-06-20 | 2017-10-20 | 常熟开关制造有限公司(原常熟开关厂） | Current sampling circuit, electronic trip unit, breaker |
| CN107968654A (en) * | 2017-12-29 | 2018-04-27 | 浙江九州量子信息技术股份有限公司 | A kind of narrow pulse peak using compensation network |
| CN208367085U (en) * | 2018-06-26 | 2019-01-11 | 成都晶博电气科技有限公司 | A kind of Current Voltage acquisition control module |
| CN110082700A (en) * | 2019-05-13 | 2019-08-02 | 国网天津市电力公司电力科学研究院 | A kind of electric energy meter measurement error on-line monitoring circuit and method based on CT sampling |
| CN110022065A (en) * | 2019-05-16 | 2019-07-16 | 池州学院 | A kind of single-phase grid-connected photovoltaic power generation system |
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